ChipDocs.org
⌘K
2284 PARTSUpload PDF
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32WB09TEF7TR

STID: C33832882WLCSP-36(2.8x3) · 36 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32WB09TEF7TR (WLCSP-36(2.8x3))A2VSSSDA4VDDA_VCAPA6VDD2B1VDDSDB3VFBSDB5RSTNB7VSSAC4PB6C6PB3D1VLXSDD3PB12D5PB2D7PB0E4PB7E6PB1F1PB14F3PB13F5PB4N7PA8N5RF1N1OSCOUTM6PA11M4VSSRFTRXM2VDDRFL7PA0L5PA10L1OSCINK6PA9K4VSSIFADCJ7PA1J3VSSIOJ1VSSSXH5PB5G6PA3G2PB15F7PA2Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.827.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9mm
2. 2D FOOTPRINT
A2A4A6B1B3B5B7C4C6D1D3D5D7E4E6F1F3F5F7G2G6H5J1J3J7K4K6L1L5L7M2M4M6N1N5N7E=2.80mm · Pitch e=0.40mmD=3.00mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 2.80mm × 3.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (36/36)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A2VSSSDGNDGround Reference Pin (VSSSD)
A4VDDA_VCAPPowerPower Supply Input (VDDA_VCAP — 3.3V VDD (Max 4.0V))
A6VDD2PowerPower Supply Input (VDD2 — 3.3V VDD (Max 4.0V))
B1VDDSDPowerPower Supply Input (VDDSD — 3.3V VDD (Max 4.0V))
B3VFBSDI/OMultiplexed I/O & Peripheral Pin VFBSD (General)
B5RSTNI/OMultiplexed I/O & Peripheral Pin RSTN (General)
B7VSSAGNDGround Reference Pin (VSSA)
C4PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C)
C6PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, ADC)
D1VLXSDI/OMultiplexed I/O & Peripheral Pin VLXSD (General)
D3PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, RTC/CLK)
D5PB2I/OMultiplexed I/O & Peripheral Pin PB2 (UART, ADC)
D7PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC)
E4PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C, PWM)
E6PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC)
F1PB14I/OMultiplexed I/O & Peripheral Pin PB14 (RTC/CLK)
F3PB13I/OMultiplexed I/O & Peripheral Pin PB13 (PWM, RTC/CLK)
F5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (PWM)
F7PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, SWD/JTAG)
G2PB15I/OMultiplexed I/O & Peripheral Pin PB15 (UART)
G6PA3I/OMultiplexed I/O & Peripheral Pin PA3 (SPI, ADC, SWD/JTAG)
H5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (PWM)
J1VSSSXGNDGround Reference Pin (VSSSX)
J3VSSIOGNDGround Reference Pin (VSSIO)
J7PA1I/OMultiplexed I/O & Peripheral Pin PA1 (I2C)
K4VSSIFADCGNDGround Reference Pin (VSSIFADC)
K6PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, RTC/CLK)
L1OSCINI/OMultiplexed I/O & Peripheral Pin OSCIN (RTC/CLK)
L5PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART)
L7PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, I2C)
M2VDDRFPowerPower Supply Input (VDDRF — 3.3V VDD (Max 4.0V))
M4VSSRFTRXGNDGround Reference Pin (VSSRFTRX)
M6PA11I/OMultiplexed I/O & Peripheral Pin PA11 (SPI, RTC/CLK)
N1OSCOUTI/OMultiplexed I/O & Peripheral Pin OSCOUT (RTC/CLK)
N5RF1I/OMultiplexed I/O & Peripheral Pin RF1 (General)
N7PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI)
PIN A2 VSSSD
GND
Ground Reference Pin (VSSSD)
Design note: Add: SMPSGround
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32WB09TEF7TR (ST · WLCSP-36(2.8x3))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32WB09TEF7TR (WLCSP-36(2.8x3)) - 2. Standard Pinout (Top View)
True package pinout (36 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32WB09TEF7TR (WLCSP-36(2.8x3)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32WB09TEF7TR (WLCSP-36(2.8x3)) - 4. Package Dimensions (D×E×A)
WLCSP-36(2.8x3) · 2.80×3.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32WB09TEF7TR (WLCSP-36(2.8x3)) - 5. Recommended Land Pattern
IPC-7351B Footprint (36 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32WB09TEF7TR (WLCSP-36(2.8x3)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32WB09
P1 · p01_fig01EXACT PACKAGE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Low Energy and 2.4 GHz radio solution
Low Energy and 2.4 GHz radio solution
P1 · p01_fig02EXACT PACKAGE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — VFQFPN32 5x5 mm
VFQFPN32 5x5 mm
P26 · p26_fig01EXACT PACKAGE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Figure 8. WLCSP36 ballout
Figure 8. WLCSP36 ballout
P30 · p30_fig01EXACT PACKAGE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Figure 9. Application circuit: DC-DC converter, WLCSP36 package
Figure 9. Application circuit: DC-DC converter, WLCSP36 package
P59 · p59_fig01EXACT PACKAGE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Figure 19. WLCSP36 - Outline
Figure 19. WLCSP36 - Outline
P60 · p60_fig01EXACT PACKAGE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — A1 - 0.15 - - 0.0059 -
A1 - 0.15 - - 0.0059 -
P61 · p61_fig01EXACT PACKAGE
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Figure 20. WLCSP36 - Footprint example
Figure 20. WLCSP36 - Footprint example
P1 · p01_fig02P1
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P25 · p25_fig011032×769px
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Figure 7. VFQFPN32 pinout
Figure 7. VFQFPN32 pinout
P26 · p26_fig01P26
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Datasheet Page 26 (p26_fig01)
Datasheet Page 26 (p26_fig01)
P30 · p30_fig01P30
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Datasheet Page 30 (p30_fig01)
Datasheet Page 30 (p30_fig01)
P51 · p51_fig011478×551px
STM32WB09TEF7TR (WLCSP-36(2.8x3)) — Figure 13. Recommended RSTN pin protection
Figure 13. Recommended RSTN pin protection
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32WB09TEF7TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32WB09TEF7TR (WLCSP-36(2.8x3)) is a 36-pin embedded microcontroller unit (mcu) featuring a 3.00 × 2.80 × 0.40 mm mechanical envelope (lead pitch e = 0.39 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Bluetooth / BLE, UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2.4 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
22 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
3.00 × 2.80 × 0.40 mm (A1=0.15 mm)
Package family: WLCSP (WLCSP-36(2.8x3))
Pin Count & Lead PitchN / e
36 Pins | Pitch e = 0.39 mm (15.4 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Bluetooth / BLE, UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol36 auto-grouped pins
OK
IPC-7351B Land Pattern36 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-36(2.8x3))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.00 × 2.80 mm
Height (A) & Pitch (e)IPC-7351B
A=0.40mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
36P / 36Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-36(2.8x3)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32WB09TEF7TR (WLCSP-36(2.8x3))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32WB09TEF7TR (WLCSP-36(2.8x3))?

Manufactured by ST, the STM32WB09TEF7TR is housed in a WLCSP-36(2.8x3) package with 36 pins and a 0.40 mm lead pitch. Key pins include: A2 (VSSSD: Ground Reference Pin (VSSSD)), A4 (VDDA_VCAP: Power Supply Input (VDDA_VCAP — 3.3V VDD (Max 4.0V))), A6 (VDD2: Power Supply Input (VDD2 — 3.3V VDD (Max 4.0V))), B1 (VDDSD: Power Supply Input (VDDSD — 3.3V VDD (Max 4.0V))), B3 (VFBSD: Multiplexed I/O & Peripheral Pin VFBSD (General)), B5 (RSTN: Multiplexed I/O & Peripheral Pin RSTN (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32WB09TEF7TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32WB09TEF7TR (WLCSP-36(2.8x3)) has a nominal body envelope of 2.80 × 3.00 mm, pitch e = 0.40 mm, and 36 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32WB09TEF7TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32WB09TEF7TR (ST, WLCSP-36(2.8x3)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (36 pins) & STM32WB09 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A2VSSSDGND0V electrical ground return terminal (VSSSD) for internal core logic, I/O drivers, and analog sub-blocks.
A4VDDA_VCAPPower_InPrimary positive power supply input (VDDA_VCAP) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A6VDD2Power_InPrimary positive power supply input (VDD2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B1VDDSDPower_InPrimary positive power supply input (VDDSD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B3VFBSDDigital_IOSignal terminal VFBSD (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VFBSD. Supported peripheral buses: General.
B5RSTNDigital_IOSignal terminal RSTN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: RSTN. Supported peripheral buses: General.
B7VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
C4PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: I2C.
C6PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: UART, SPI, ADC.
D1VLXSDDigital_IOSignal terminal VLXSD (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSD. Supported peripheral buses: General.
D3PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: UART, RTC/CLK.
D5PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: UART, ADC.
D7PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: UART, ADC.
E4PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, I2C, PWM.
E6PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC.
F1PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: RTC/CLK.
F3PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: PWM, RTC/CLK.
F5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: PWM.
F7PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, SWD/JTAG.
G2PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: UART.
G6PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCKTIM2CH2. Supported peripheral buses: SPI, ADC, SWD/JTAG.
H5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: PWM.
J1VSSSXGND0V electrical ground return terminal (VSSSX) for internal core logic, I/O drivers, and analog sub-blocks.
J3VSSIOGND0V electrical ground return terminal (VSSIO) for internal core logic, I/O drivers, and analog sub-blocks.
J7PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: I2C.
K4VSSIFADCGND0V electrical ground return terminal (VSSIFADC) for internal core logic, I/O drivers, and analog sub-blocks.
K6PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, RTC/CLK.
L1OSCINDigital_IOSignal terminal OSCIN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: OSCIN. Supported peripheral buses: RTC/CLK.
L5PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART.
L7PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
M2VDDRFPower_InPrimary positive power supply input (VDDRF) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
M4VSSRFTRXGND0V electrical ground return terminal (VSSRFTRX) for internal core logic, I/O drivers, and analog sub-blocks.
M6PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: SPI, RTC/CLK.
N1OSCOUTDigital_IOSignal terminal OSCOUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: OSCOUT. Supported peripheral buses: RTC/CLK.
N5RF1RF_50OhmSignal terminal RF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: RF1. Supported peripheral buses: General.
N7PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, SPI.
ExplorePartsPackagesMFRsUpload