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PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC32MM0016GPL036-I/MV

MICROCHIPWQFN-40-EP(5x5) · 41 Pins · Pitch 0.40mmDISCREPANCY REVIEW REQUIRED5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5))1RP142RP153RP164RP35RP46SOSCI7SOSCO8RP119U1CTS10U1RTS11RP20/RA912TDO13TDI14U1TX15U1RX16RB6/PGEC317RP11/RB718RP7/RB819RP120RP221RC841EP40N/C39RP15/RB1/PGE38RP14/RB0/PGE37RP2/RA136RP1/RA035MCLR34AVDD33AVSS32RP10/RB1531RP9/RB1430RP13/RB1329RP12/RB1228RP18/RB11/PG27RP17/RB10/PG26VDD25N/C24VCAP23N/C22RP19/RC9Grid Pitch = 2.54mm (IEEE-315)-20.3-15.2-10.2-5.105.110.215.220.333.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132333435363738394041E=5.00mm · Pitch e=0.40mmD=5.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 5.00mm × 5.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (41/41)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1RP14I/OMultiplexed I/O & Peripheral Pin RP14 (General)
2RP15I/OMultiplexed I/O & Peripheral Pin RP15 (General)
3RP16I/OMultiplexed I/O & Peripheral Pin RP16 (General)
4RP3I/OMultiplexed I/O & Peripheral Pin RP3 (General)
5RP4I/OMultiplexed I/O & Peripheral Pin RP4 (General)
6SOSCII/OMultiplexed I/O & Peripheral Pin SOSCI (General)
7SOSCOI/OMultiplexed I/O & Peripheral Pin SOSCO (General)
8RP11I/OMultiplexed I/O & Peripheral Pin RP11 (General)
9U1CTSI/OMultiplexed I/O & Peripheral Pin U1CTS (UART)
10U1RTSI/OMultiplexed I/O & Peripheral Pin U1RTS (UART)
11RP20/RA9I/OMultiplexed I/O & Peripheral Pin RP20/RA9 (General)
12TDOI/OMultiplexed I/O & Peripheral Pin TDO (SWD/JTAG)
13TDII/OMultiplexed I/O & Peripheral Pin TDI (SWD/JTAG)
14U1TXI/OMultiplexed I/O & Peripheral Pin U1TX (UART)
15U1RXI/OMultiplexed I/O & Peripheral Pin U1RX (UART)
16RB6/PGEC3I/OMultiplexed I/O & Peripheral Pin RB6/PGEC3 (General)
17RP11/RB7I/OMultiplexed I/O & Peripheral Pin RP11/RB7 (General)
18RP7/RB8I/OMultiplexed I/O & Peripheral Pin RP7/RB8 (General)
19RP1I/OMultiplexed I/O & Peripheral Pin RP1 (General)
20RP2I/OMultiplexed I/O & Peripheral Pin RP2 (General)
21RC8I/OMultiplexed I/O & Peripheral Pin RC8 (General)
22RP19/RC9I/OMultiplexed I/O & Peripheral Pin RP19/RC9 (General)
23N/CI/OMultiplexed I/O & Peripheral Pin N/C (General)
24VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
25N/CI/OMultiplexed I/O & Peripheral Pin N/C (General)
26VDDPowerPower Supply Input (VDD — 2.0V to 3.6V)
27RP17/RB10/PGED2I/OMultiplexed I/O & Peripheral Pin RP17/RB10/PGED2 (General)
28RP18/RB11/PGEC2I/OMultiplexed I/O & Peripheral Pin RP18/RB11/PGEC2 (General)
29RP12/RB12I/OMultiplexed I/O & Peripheral Pin RP12/RB12 (General)
30RP13/RB13I/OMultiplexed I/O & Peripheral Pin RP13/RB13 (General)
31RP9/RB14I/OMultiplexed I/O & Peripheral Pin RP9/RB14 (General)
32RP10/RB15I/OMultiplexed I/O & Peripheral Pin RP10/RB15 (General)
33AVSSGNDGround Reference Pin (AVSS)
34AVDDPowerPower Supply Input (AVDD — 2.0V to 3.6V)
35MCLRI/OMultiplexed I/O & Peripheral Pin MCLR (General)
36RP1/RA0I/OMultiplexed I/O & Peripheral Pin RP1/RA0 (General)
37RP2/RA1I/OMultiplexed I/O & Peripheral Pin RP2/RA1 (General)
38RP14/RB0/PGED1I/OMultiplexed I/O & Peripheral Pin RP14/RB0/PGED1 (General)
39RP15/RB1/PGEC1I/OMultiplexed I/O & Peripheral Pin RP15/RB1/PGEC1 (General)
40N/CI/OMultiplexed I/O & Peripheral Pin N/C (General)
41EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 RP14
I/O
Multiplexed I/O & Peripheral Pin RP14 (General)
Design note: Signal terminal RP14 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP14. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
1. Realistic 3D PackageREPRESENTATIVE
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) - 2. Standard Pinout (Top View)
True package pinout (41 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) - 4. Package Dimensions (D×E×A)
WQFN-40-EP(5x5) · 5.00×5.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (41 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for PIC32MM0016G
P1 · p01_fig01377×200px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — 32-Bit Flash Microcontroller with MIPS32® microAptiv™ UC Core with Low Power and Low Pin Count
32-Bit Flash Microcontroller with MIPS32® microAptiv™ UC Core with Low Power and Low Pin Count
P13 · p13_fig011777×1769px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — FIGURE 1-1: PIC32MM0064GPL036 FAMILY BLOCK DIAGRAM
FIGURE 1-1: PIC32MM0064GPL036 FAMILY BLOCK DIAGRAM
P235 · p235_fig011777×2571px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — PIC32MM0064GPL036 FAMILY
PIC32MM0064GPL036 FAMILY
P252 · p252_fig011778×2733px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — PIC32MM0064GPL036 FAMILY | DS60001324C-page 252  2015-2018 Microchip Technology Inc. | RECOMMENDED LAND PATTERN | For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/p
PIC32MM0064GPL036 FAMILY | DS60001324C-page 252  2015-2018 Microchip Technology Inc. | RECOMMENDED LAND PATTERN | For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/p
P254 · p254_fig011778×2733px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — PIC32MM0064GPL036 FAMILY | DS60001324C-page 254  2015-2018 Microchip Technology Inc. | Microchip Technology Drawing C04-272B-M2 Sheet 2 of 2 | For the most current package drawings, please see the Microchip Packaging Specification located
PIC32MM0064GPL036 FAMILY | DS60001324C-page 254  2015-2018 Microchip Technology Inc. | Microchip Technology Drawing C04-272B-M2 Sheet 2 of 2 | For the most current package drawings, please see the Microchip Packaging Specification located
P254 · p254_fig01P254
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — Datasheet Page 254 (p254_fig01)
Datasheet Page 254 (p254_fig01)
P255 · p255_fig011778×2733px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) —  2015-2018 Microchip Technology Inc. DS60001324C-page 255 | PIC32MM0064GPL036 FAMILY | RECOMMENDED LAND PATTERN | Dimension Limits | Units | C2 | Optional Center Pad Width | Contact Pad Spacing | Optional Center Pad Length | Contact Pitch
 2015-2018 Microchip Technology Inc. DS60001324C-page 255 | PIC32MM0064GPL036 FAMILY | RECOMMENDED LAND PATTERN | Dimension Limits | Units | C2 | Optional Center Pad Width | Contact Pad Spacing | Optional Center Pad Length | Contact Pitch
P255 · p255_fig01P255
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — Datasheet Page 255 (p255_fig01)
Datasheet Page 255 (p255_fig01)
P249 · p249_fig011791×2723px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — PACKAGE_DIMENSIONS — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))
PACKAGE_DIMENSIONS — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))
P250 · p250_fig011791×2723px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — RECOMMENDED_FOOTPRINT — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))
RECOMMENDED_FOOTPRINT — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))
P253 · p253_fig011791×2723px
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — RECOMMENDED_FOOTPRINT — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))
RECOMMENDED_FOOTPRINT — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))
P236 · p236_fig01All Packages in PDF
PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) — RECOMMENDED_FOOTPRINT — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))
RECOMMENDED_FOOTPRINT — PIC32MM0016GPL028-I/ML (QFN-28-EP(6x6))

Technical Specifications & Part Details (PIC32MM0016GPL036-I/MV)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) is a 40-pin standard electronic & interconnect component featuring a 5.00 × 5.00 × 0.60 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 2.0V to 3.6V supply operation across -40°C to +125°C with integrated UART, SPI, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
2.0V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +125°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
25 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
5.00 × 5.00 × 0.60 mm (A1=0.03 mm)
Package family: QFN (WQFN-40-EP(5x5))
Pin Count & Lead PitchN / e
40 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol41 auto-grouped pins
OK
IPC-7351B Land Pattern41 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteEPAD 3.80×3.80mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — PIC32MM0016G (3)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (WQFN-40-EP(5x5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.00 × 5.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.60mm · e=0.40mm
Pad Size (W × L)Level B
0.30 × 1.10 mm
Pins / Total PadsTopology
41P / 41Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WQFN-40-EP(5x5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5))?

Manufactured by MICROCHIP, the PIC32MM0016GPL036-I/MV is housed in a WQFN-40-EP(5x5) package with 41 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 2.0V to 3.6V. Key pins include: 1 (RP14: Multiplexed I/O & Peripheral Pin RP14 (General)), 2 (RP15: Multiplexed I/O & Peripheral Pin RP15 (General)), 3 (RP16: Multiplexed I/O & Peripheral Pin RP16 (General)), 4 (RP3: Multiplexed I/O & Peripheral Pin RP3 (General)), 5 (RP4: Multiplexed I/O & Peripheral Pin RP4 (General)), 6 (SOSCI: Multiplexed I/O & Peripheral Pin SOSCI (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC32MM0016GPL036-I/MV?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC32MM0016GPL036-I/MV (WQFN-40-EP(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.40 mm, and 41 copper pads plus a central exposed thermal pad (EPAD) of 3.80 × 3.80 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC32MM0016GPL036-I/MV?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC32MM0016GPL036-I/MV (MICROCHIP, WQFN-40-EP(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (41 pins) & PIC32MM0016G Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1RP14Digital_IOSignal terminal RP14 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP14. Supported peripheral buses: General.
2RP15Digital_IOSignal terminal RP15 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP15. Supported peripheral buses: General.
3RP16Digital_IOSignal terminal RP16 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP16. Supported peripheral buses: General.
4RP3Digital_IOSignal terminal RP3 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP3. Supported peripheral buses: General.
5RP4Digital_IOSignal terminal RP4 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP4. Supported peripheral buses: General.
6SOSCIDigital_IOSignal terminal SOSCI (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: SOSCI. Supported peripheral buses: General.
7SOSCODigital_IOSignal terminal SOSCO (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: SOSCO. Supported peripheral buses: General.
8RP11Digital_IOSignal terminal RP11 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP11. Supported peripheral buses: General.
9U1CTSDigital_IOSignal terminal U1CTS (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: U1CTS. Supported peripheral buses: UART.
10U1RTSDigital_IOSignal terminal U1RTS (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: U1RTS. Supported peripheral buses: UART.
11RP20/RA9Digital_IOSignal terminal RP20/RA9 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP20/RA9. Supported peripheral buses: General.
12TDODigital_IOSignal terminal TDO (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: TDO. Supported peripheral buses: SWD/JTAG.
13TDIDigital_IOSignal terminal TDI (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: TDI. Supported peripheral buses: SWD/JTAG.
14U1TXDigital_IOSignal terminal U1TX (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: U1TX. Supported peripheral buses: UART.
15U1RXDigital_IOSignal terminal U1RX (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: U1RX. Supported peripheral buses: UART.
16RB6/PGEC3Digital_IOSignal terminal RB6/PGEC3 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RB6/PGEC3. Supported peripheral buses: General.
17RP11/RB7Digital_IOSignal terminal RP11/RB7 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP11/RB7. Supported peripheral buses: General.
18RP7/RB8Digital_IOSignal terminal RP7/RB8 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP7/RB8. Supported peripheral buses: General.
19RP1Digital_IOSignal terminal RP1 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP1. Supported peripheral buses: General.
20RP2Digital_IOSignal terminal RP2 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP2. Supported peripheral buses: General.
21RC8Digital_IOSignal terminal RC8 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RC8. Supported peripheral buses: General.
22RP19/RC9Digital_IOSignal terminal RP19/RC9 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP19/RC9. Supported peripheral buses: General.
23N/CDigital_IOSignal terminal N/C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: N/C. Supported peripheral buses: General.
24VCAPDigital_IOSignal terminal VCAP (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
25N/CDigital_IOSignal terminal N/C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: N/C. Supported peripheral buses: General.
26VDDPower_InPrimary positive power supply input (VDD) operating in the 2.0V to 3.6V domain (Max rating: 3.6V).
27RP17/RB10/PGED2Digital_IOSignal terminal RP17/RB10/PGED2 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP17/RB10/PGED2. Supported peripheral buses: General.
28RP18/RB11/PGEC2Digital_IOSignal terminal RP18/RB11/PGEC2 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP18/RB11/PGEC2. Supported peripheral buses: General.
29RP12/RB12Digital_IOSignal terminal RP12/RB12 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP12/RB12. Supported peripheral buses: General.
30RP13/RB13Digital_IOSignal terminal RP13/RB13 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP13/RB13. Supported peripheral buses: General.
31RP9/RB14Digital_IOSignal terminal RP9/RB14 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP9/RB14. Supported peripheral buses: General.
32RP10/RB15Digital_IOSignal terminal RP10/RB15 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP10/RB15. Supported peripheral buses: General.
33AVSSGND0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks.
34AVDDPower_InPrimary positive power supply input (AVDD) operating in the 2.0V to 3.6V domain (Max rating: 3.6V).
35MCLRDigital_IOSignal terminal MCLR (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: MCLR. Supported peripheral buses: General.
36RP1/RA0Digital_IOSignal terminal RP1/RA0 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP1/RA0. Supported peripheral buses: General.
37RP2/RA1Digital_IOSignal terminal RP2/RA1 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP2/RA1. Supported peripheral buses: General.
38RP14/RB0/PGED1Digital_IOSignal terminal RP14/RB0/PGED1 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP14/RB0/PGED1. Supported peripheral buses: General.
39RP15/RB1/PGEC1Digital_IOSignal terminal RP15/RB1/PGEC1 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP15/RB1/PGEC1. Supported peripheral buses: General.
40N/CDigital_IOSignal terminal N/C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: N/C. Supported peripheral buses: General.
41EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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