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MCP2515-I/SO (SOIC-18-300mil) — Symbol, Footprint IPC-7351B & 3D STEP Model

MCP2515-I/SO

MICROCHIPID: C12368SOIC-18-300mil · 18 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · MCP2515-I/SO (SOIC-18-300mil)1TXCAN2RXCAN3CLKOUT4TX0RTS5TX1RTS6TX2RTS7OSC28OSC19VSS18VDD17RESET16CS15SO14SI13SCK12INT11RX0BF10RX1BFGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.817.812.77.62.5-2.5-7.6-12.7-17.8mm
2. 2D FOOTPRINT
123456789101112131415161718E=7.50mm · Pitch e=1.27mmD=11.55mm-8-6-4-20246897531-1-3-5-7-9mm
3. 3D CAD MODEL
Package Body: 7.50mm × 11.55mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (18/18)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1TXCANI/OMultiplexed I/O & Peripheral Pin TXCAN (General)
2RXCANI/OMultiplexed I/O & Peripheral Pin RXCAN (General)
3CLKOUTI/OMultiplexed I/O & Peripheral Pin CLKOUT (General)
4TX0RTSI/OMultiplexed I/O & Peripheral Pin TX0RTS (General)
5TX1RTSI/OMultiplexed I/O & Peripheral Pin TX1RTS (General)
6TX2RTSI/OMultiplexed I/O & Peripheral Pin TX2RTS (General)
7OSC2I/OMultiplexed I/O & Peripheral Pin OSC2 (RTC/CLK)
8OSC1I/OMultiplexed I/O & Peripheral Pin OSC1 (RTC/CLK)
9VSSGNDGround Reference Pin (VSS)
10RX1BFI/OMultiplexed I/O & Peripheral Pin RX1BF (General)
11RX0BFI/OMultiplexed I/O & Peripheral Pin RX0BF (General)
12INTI/OMultiplexed I/O & Peripheral Pin INT (General)
13SCKI/OMultiplexed I/O & Peripheral Pin SCK (SPI)
14SII/OMultiplexed I/O & Peripheral Pin SI (General)
15SOI/OMultiplexed I/O & Peripheral Pin SO (General)
16CSI/OMultiplexed I/O & Peripheral Pin CS (General)
17RESETISystem Enable & Hardware Reset (RESET)
18VDDPowerPower Supply Input (VDD — 2.7V – 5.5V)
PIN 1 TXCAN
I/O
Multiplexed I/O & Peripheral Pin TXCAN (General)
Design note: TransmitoutputpintoCANbus | Alt: —
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: MCP2515-I/SO (MICROCHIP · SOIC-18-300mil)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
MCP2515-I/SO (SOIC-18-300mil) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
MCP2515-I/SO (SOIC-18-300mil) - 2. Standard Pinout (Top View)
True package pinout (18 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
MCP2515-I/SO (SOIC-18-300mil) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
MCP2515-I/SO (SOIC-18-300mil) - 4. Package Dimensions (D×E×A)
SOIC-18-300mil · 7.50×11.55mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
MCP2515-I/SO (SOIC-18-300mil) - 5. Recommended Land Pattern
IPC-7351B Footprint (18 Pads)Expand ›
6. Application SchematicSCHEMATIC
MCP2515-I/SO (SOIC-18-300mil) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for MCP2515
P77 · p77_fig01EXACT PACKAGE
MCP2515-I/SO (SOIC-18-300mil) — XXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXXXXX
XXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXXXXX
P77 · p77_fig03EXACT PACKAGE
MCP2515-I/SO (SOIC-18-300mil) — XXXXXXXX
XXXXXXXX
P1 · p01_fig01580×308px
MCP2515-I/SO (SOIC-18-300mil) — Stand-Alone CAN Controller with SPI Interface
Stand-Alone CAN Controller with SPI Interface
P1 · p01_fig022734×2720px
MCP2515-I/SO (SOIC-18-300mil) —  2003-2012 Microchip Technology Inc. DS21801G-page 1 | device(s) • Start-of-Frame (SOF) Signal is Available for Monitoring the SOF Signal: - Can be used for time-slot-based protocols | Package Types | 16 | 5 | TXCAN | RXCAN | VDD | RESET |
 2003-2012 Microchip Technology Inc. DS21801G-page 1 | device(s) • Start-of-Frame (SOF) Signal is Available for Monitoring the SOF Signal: - Can be used for time-slot-based protocols | Package Types | 16 | 5 | TXCAN | RXCAN | VDD | RESET |
P1 · p01_fig01P1
MCP2515-I/SO (SOIC-18-300mil) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P1 · p01_fig02P1
MCP2515-I/SO (SOIC-18-300mil) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P4 · p04_fig01P4
MCP2515-I/SO (SOIC-18-300mil) — Datasheet Page 4 (p04_fig01)
Datasheet Page 4 (p04_fig01)
P57 · p57_fig011253×697px
MCP2515-I/SO (SOIC-18-300mil) — FIGURE 9-1: RESET PIN CONFIGURATION EXAMPLE
FIGURE 9-1: RESET PIN CONFIGURATION EXAMPLE
P77 · p77_fig02948×735px
MCP2515-I/SO (SOIC-18-300mil) — MCP2515
MCP2515
P77 · p77_fig04751×920px
MCP2515-I/SO (SOIC-18-300mil) — MCP2515
MCP2515
P77 · p77_fig06636×812px
MCP2515-I/SO (SOIC-18-300mil) — 2515
2515
P77 · p77_fig01P77
MCP2515-I/SO (SOIC-18-300mil) — Datasheet Page 77 (p77_fig01)
Datasheet Page 77 (p77_fig01)
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (MCP2515-I/SO)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:MCP2515-I/SO (SOIC-18-300mil) is a 18-pin standard electronic & interconnect component featuring a 11.55 × 7.50 × 2.50 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 2.7V – 5.5V supply operation across -40°C to +85°C with integrated SPI, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
2.7V – 5.5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
10 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
11.55 × 7.50 × 2.50 mm (A1=0.00 mm)
Package family: SOIC (SOIC-18-300mil)
Pin Count & Lead PitchN / e
18 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
SPI, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol18 auto-grouped pins
OK
IPC-7351B Land Pattern18 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOIC-18-300mil)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
11.55 × 7.50 mm
Height (A) & Pitch (e)IPC-7351B
A=2.70mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.90 mm
Pins / Total PadsTopology
18P / 18Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOIC-18-300mil
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — MCP2515-I/SO (SOIC-18-300mil)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of MCP2515-I/SO (SOIC-18-300mil)?

Manufactured by MICROCHIP, the MCP2515-I/SO is housed in a SOIC-18-300mil package with 18 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 2.7V – 5.5V. Key pins include: 1 (TXCAN: Multiplexed I/O & Peripheral Pin TXCAN (General)), 2 (RXCAN: Multiplexed I/O & Peripheral Pin RXCAN (General)), 3 (CLKOUT: Multiplexed I/O & Peripheral Pin CLKOUT (General)), 4 (TX0RTS: Multiplexed I/O & Peripheral Pin TX0RTS (General)), 5 (TX1RTS: Multiplexed I/O & Peripheral Pin TX1RTS (General)), 6 (TX2RTS: Multiplexed I/O & Peripheral Pin TX2RTS (General)).

What are the IPC-7351B PCB Footprint dimensions for MCP2515-I/SO?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MCP2515-I/SO (SOIC-18-300mil) has a nominal body envelope of 7.50 × 11.55 mm, pitch e = 1.27 mm, and 18 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MCP2515-I/SO?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MCP2515-I/SO (MICROCHIP, SOIC-18-300mil) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (18 pins) & MCP2515 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1TXCANDigital_IOSignal terminal TXCAN (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: TXCAN. Supported peripheral buses: General.
2RXCANDigital_IOSignal terminal RXCAN (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: RXCAN. Supported peripheral buses: General.
3CLKOUTDigital_IOSignal terminal CLKOUT (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: CLKOUT. Supported peripheral buses: General.
4TX0RTSDigital_IOSignal terminal TX0RTS (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: TX0RTS. Supported peripheral buses: General.
5TX1RTSDigital_IOSignal terminal TX1RTS (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: TX1RTS. Supported peripheral buses: General.
6TX2RTSDigital_IOSignal terminal TX2RTS (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: TX2RTS. Supported peripheral buses: General.
7OSC2Digital_IOSignal terminal OSC2 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: OSC2. Supported peripheral buses: RTC/CLK.
8OSC1Digital_IOSignal terminal OSC1 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: OSC1. Supported peripheral buses: RTC/CLK.
9VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
10RX1BFDigital_IOSignal terminal RX1BF (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: RX1BF. Supported peripheral buses: General.
11RX0BFDigital_IOSignal terminal RX0BF (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: RX0BF. Supported peripheral buses: General.
12INTDigital_IOSignal terminal INT (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: INT. Supported peripheral buses: General.
13SCKDigital_IOSignal terminal SCK (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: SCK. Supported peripheral buses: SPI.
14SIDigital_IOSignal terminal SI (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: SI. Supported peripheral buses: General.
15SODigital_IOSignal terminal SO (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: SO. Supported peripheral buses: General.
16CSDigital_IOSignal terminal CS (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: CS. Supported peripheral buses: General.
17RESETDigital_IOActive-low hardware reset terminal (RESET): pulling this pin Low resets the processor core and peripherals.
18VDDPower_InPrimary positive power supply input (VDD) operating in the 2.7V – 5.5V domain (Max rating: 5.5V).
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