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CH375B (SOP-28-300mil) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH375B

WCHID: C8962SOP-28-300mil · 28 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH375B (SOP-28-300mil)1INT#2RSTI3WR#4RD#5TXD6RXD7NC8A09V310UD+11UD-12GND13XI14XO28VCC27CS#26RST#25RST24ACT#23GND22D721D620D519D418D317D216D115D0Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.222.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728E=7.50mm · Pitch e=1.27mmD=17.90mm-10-8-6-4-20246810131197531-1-3-5-7-9-11-13mm
3. 3D CAD MODEL
Package Body: 7.50mm × 17.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1INT#I/OMultiplexed I/O & Peripheral Pin INT# (General)
2RSTII/OMultiplexed I/O & Peripheral Pin RSTI (General)
3WR#I/OMultiplexed I/O & Peripheral Pin WR# (General)
4RD#I/OMultiplexed I/O & Peripheral Pin RD# (General)
5TXDI/OMultiplexed I/O & Peripheral Pin TXD (UART)
6RXDI/OMultiplexed I/O & Peripheral Pin RXD (UART)
7NCI/OMultiplexed I/O & Peripheral Pin NC (General)
8A0I/OMultiplexed I/O & Peripheral Pin A0 (General)
9V3PowerRegulated Power Output (V3 — 3.3V to 5V)
10UD+I/OMultiplexed I/O & Peripheral Pin UD+ (USB)
11UD-I/OMultiplexed I/O & Peripheral Pin UD- (USB)
12GNDGNDGround Reference Pin (GND)
13XII/OMultiplexed I/O & Peripheral Pin XI (RTC/CLK)
14XOI/OMultiplexed I/O & Peripheral Pin XO (RTC/CLK)
15D0I/OMultiplexed I/O & Peripheral Pin D0 (General)
16D1I/OMultiplexed I/O & Peripheral Pin D1 (General)
17D2I/OMultiplexed I/O & Peripheral Pin D2 (General)
18D3I/OMultiplexed I/O & Peripheral Pin D3 (General)
19D4I/OMultiplexed I/O & Peripheral Pin D4 (General)
20D5I/OMultiplexed I/O & Peripheral Pin D5 (General)
21D6I/OMultiplexed I/O & Peripheral Pin D6 (General)
22D7I/OMultiplexed I/O & Peripheral Pin D7 (General)
23GNDGNDGround Reference Pin (GND)
24ACT#I/OMultiplexed I/O & Peripheral Pin ACT# (USB)
25RSTI/OMultiplexed I/O & Peripheral Pin RST (General)
26RST#I/OMultiplexed I/O & Peripheral Pin RST# (General)
27CS#I/OMultiplexed I/O & Peripheral Pin CS# (General)
28VCCPowerPower Supply Input (VCC — 3.3V to 5V)
PIN 1 INT#
I/O
Multiplexed I/O & Peripheral Pin INT# (General)
Design note: 在复位完成后为中断请求输出 低电平有效 ，
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 6 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH375B (WCH · SOP-28-300mil)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH375B (SOP-28-300mil) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH375B (SOP-28-300mil) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH375B (SOP-28-300mil) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH375B (SOP-28-300mil) - 4. Package Dimensions (D×E×A)
SOP-28-300mil · 7.50×17.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH375B (SOP-28-300mil) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH375B (SOP-28-300mil) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (6 figures · Page 1/1)
Showing 1–6 of 6 uncropped original figures for CH375
P2 · p02_fig01EXACT PACKAGE
CH375B (SOP-28-300mil) — 封装形式 塑体宽度 引脚间距 封装说明 订货型号 SOP-28 7.62mm 300mil 1.27mm 50mil 标准的28 脚贴片 CH375C SOP-28 7.62mm 300mil 1.27mm 50mil 标准的28 脚贴片 CH375B 区别：CH375B 必须外接晶体及振荡电容；
封装形式 塑体宽度 引脚间距 封装说明 订货型号 SOP-28 7.62mm 300mil 1.27mm 50mil 标准的28 脚贴片 CH375C SOP-28 7.62mm 300mil 1.27mm 50mil 标准的28 脚贴片 CH375B 区别：CH375B 必须外接晶体及振荡电容；
P1 · p01_fig011648×885px
CH375B (SOP-28-300mil) — 2、特点
2、特点
P2 · p02_fig01P2
CH375B (SOP-28-300mil) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P13 · p13_fig011588×1424px
CH375B (SOP-28-300mil) — 在设计印刷线路板PCB 时，需要注意：退耦电容C3 和C4 尽量靠近CH375 的相连引脚；使D+和 D-信号线贴近平行布线，尽量在两侧提供地线或者覆铜，减少来自外界的信号干扰；尽量缩短XI 和 XO 引脚相关信号线的长度，为了减少干扰，可以在相关元器件周边环绕地线或者覆铜。
在设计印刷线路板PCB 时，需要注意：退耦电容C3 和C4 尽量靠近CH375 的相连引脚；使D+和 D-信号线贴近平行布线，尽量在两侧提供地线或者覆铜，减少来自外界的信号干扰；尽量缩短XI 和 XO 引脚相关信号线的长度，为了减少干扰，可以在相关元器件周边环绕地线或者覆铜。
P14 · p14_fig011127×689px
CH375B (SOP-28-300mil) — 8.3. 单片机读写U 盘文件（USB 存储设备的文件级接口）
8.3. 单片机读写U 盘文件（USB 存储设备的文件级接口）
P14 · p14_fig021533×661px
CH375B (SOP-28-300mil) — 一般情况下，单片机或嵌入式系统处理USB 存储设备的文件系统需要实现上图左边的4 个层次， 右边是USB 存储设备的内部结构层次。由于CH375 不仅是一个通用的USB-HOST 硬件接口芯片，还内
一般情况下，单片机或嵌入式系统处理USB 存储设备的文件系统需要实现上图左边的4 个层次， 右边是USB 存储设备的内部结构层次。由于CH375 不仅是一个通用的USB-HOST 硬件接口芯片，还内

Technical Specifications & Part Details (CH375B)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH375B (SOP-28-300mil) is a 28-pin standard electronic & interconnect component featuring a 17.90 × 7.50 × 2.50 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 3.3V to 5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.3V to 5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
17.90 × 7.50 × 2.50 mm (A1=0.20 mm)
Package family: SOP (SOP-28-300mil)
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOP-28-300mil)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
17.90 × 7.50 mm
Height (A) & Pitch (e)IPC-7351B
A=2.50mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.90 mm
Pins / Total PadsTopology
28P / 28Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOP-28-300mil
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH375B (SOP-28-300mil)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH375B (SOP-28-300mil)?

Manufactured by WCH, the CH375B is housed in a SOP-28-300mil package with 28 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 3.3V to 5V. Key pins include: 1 (INT#: Multiplexed I/O & Peripheral Pin INT# (General)), 2 (RSTI: Multiplexed I/O & Peripheral Pin RSTI (General)), 3 (WR#: Multiplexed I/O & Peripheral Pin WR# (General)), 4 (RD#: Multiplexed I/O & Peripheral Pin RD# (General)), 5 (TXD: Multiplexed I/O & Peripheral Pin TXD (UART)), 6 (RXD: Multiplexed I/O & Peripheral Pin RXD (UART)).

What are the IPC-7351B PCB Footprint dimensions for CH375B?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH375B (SOP-28-300mil) has a nominal body envelope of 7.50 × 17.90 mm, pitch e = 1.27 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH375B?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH375B (WCH, SOP-28-300mil) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & CH375 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1INT#Digital_IOSignal terminal INT# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: INT#. Supported peripheral buses: General.
2RSTIDigital_IOSignal terminal RSTI (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RSTI. Supported peripheral buses: General.
3WR#Digital_IOSignal terminal WR# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: WR#. Supported peripheral buses: General.
4RD#Digital_IOSignal terminal RD# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RD#. Supported peripheral buses: General.
5TXDDigital_IOSignal terminal TXD (I/O, 3.3V to 5V domain). Multiplexed alternate functions: TXD. Supported peripheral buses: UART.
6RXDDigital_IOSignal terminal RXD (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RXD. Supported peripheral buses: UART.
7NCNCSignal terminal NC (I/O, 3.3V to 5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
8A0Digital_IOSignal terminal A0 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: A0. Supported peripheral buses: General.
9V3Power_OutRegulated power output rail (V3) operating in the 3.3V to 5V domain (Max rating: 5.0V).
10UD+Digital_IOSignal terminal UD+ (I/O, 3.3V to 5V domain). Multiplexed alternate functions: UD+. Supported peripheral buses: USB.
11UD-Digital_IOSignal terminal UD- (I/O, 3.3V to 5V domain). Multiplexed alternate functions: UD-. Supported peripheral buses: USB.
12GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
13XIDigital_IOSignal terminal XI (I/O, 3.3V to 5V domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK.
14XODigital_IOSignal terminal XO (I/O, 3.3V to 5V domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK.
15D0Digital_IOSignal terminal D0 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D0. Supported peripheral buses: General.
16D1Digital_IOSignal terminal D1 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D1. Supported peripheral buses: General.
17D2Digital_IOSignal terminal D2 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D2. Supported peripheral buses: General.
18D3Digital_IOSignal terminal D3 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D3. Supported peripheral buses: General.
19D4Digital_IOSignal terminal D4 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D4. Supported peripheral buses: General.
20D5Digital_IOSignal terminal D5 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D5. Supported peripheral buses: General.
21D6Digital_IOSignal terminal D6 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D6. Supported peripheral buses: General.
22D7Digital_IOSignal terminal D7 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: D7. Supported peripheral buses: General.
23GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
24ACT#Digital_IOSignal terminal ACT# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: ACT#. Supported peripheral buses: USB.
25RSTDigital_IOSignal terminal RST (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RST. Supported peripheral buses: General.
26RST#Digital_IOSignal terminal RST# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RST#. Supported peripheral buses: General.
27CS#Digital_IOSignal terminal CS# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: CS#. Supported peripheral buses: General.
28VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V to 5V domain (Max rating: 5.0V).
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