SSOP-28-208mil · 28P
28P10.2×5.3×1.85mmP=0.65mm
DSPIC33EP32M / DSPIC33EP64G (SSOP-28-208mil)
Synchronized Pinout (Symbol / 2D / 3D) (45/45)
Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D| Pin | Symbol | Type | Function (EN) |
|---|---|---|---|
| 1 | TMS/ASDA1/RP41/RB9(4) | I/O | Multiplexed I/O & Peripheral Pin TMS/ASDA1/RP41/RB9(4) (General) |
| 2 | RP54/RC6 | I/O | Multiplexed I/O & Peripheral Pin RP54/RC6 (General) |
| 3 | RP55/RC7 | I/O | Multiplexed I/O & Peripheral Pin RP55/RC7 (General) |
| 4 | RP56/RC8 | I/O | Multiplexed I/O & Peripheral Pin RP56/RC8 (General) |
| 5 | RP57/RC9 | I/O | Multiplexed I/O & Peripheral Pin RP57/RC9 (General) |
| 6 | VSS | GND | Ground Reference Pin (VSS) |
| 7 | VCAP | I/O | Multiplexed I/O & Peripheral Pin VCAP (General) |
| 8 | RP42/PWM3H/RB10 | I/O | Multiplexed I/O & Peripheral Pin RP42/PWM3H/RB10 (PWM) |
| 9 | RP43/PWM3L/RB11 | I/O | Multiplexed I/O & Peripheral Pin RP43/PWM3L/RB11 (PWM) |
| 10 | RPI44/PWM2H/RB12 | I/O | Multiplexed I/O & Peripheral Pin RPI44/PWM2H/RB12 (PWM) |
| 11 | RPI45/PWM2L/CTPLS/RB13 | I/O | Multiplexed I/O & Peripheral Pin RPI45/PWM2L/CTPLS/RB13 (PWM) |
| 12 | TDO/RA10 | I/O | Multiplexed I/O & Peripheral Pin TDO/RA10 (General) |
| 13 | TDI/RA7 | I/O | Multiplexed I/O & Peripheral Pin TDI/RA7 (General) |
| 14 | RPI46/PWM1H/T3CK/RB14 | I/O | Multiplexed I/O & Peripheral Pin RPI46/PWM1H/T3CK/RB14 (PWM) |
| 15 | RPI47/PWM1L/T5CK/RB15 | I/O | Multiplexed I/O & Peripheral Pin RPI47/PWM1L/T5CK/RB15 (PWM) |
| 16 | AVSS | GND | Ground Reference Pin (AVSS) |
| 17 | AVDD | Power | Power Supply Input (AVDD — 3.0V to 3.6V) |
| 18 | MCLR# | I/O | Multiplexed I/O & Peripheral Pin MCLR# (General) |
| 19 | AN0/OA2OUT/RA0 | I/O | Multiplexed I/O & Peripheral Pin AN0/OA2OUT/RA0 (General) |
| 20 | AN1/C2IN1+/RA1 | I/O | Multiplexed I/O & Peripheral Pin AN1/C2IN1+/RA1 (General) |
| 21 | IO10 | I/O | GPIO10 / RTC_GPIO10 / TOUCH10 / ADC1_CH9 / FSPICS0 |
| 22 | IO11 | I/O | GPIO11 / RTC_GPIO11 / TOUCH11 / ADC2_CH0 / FSPID |
| 23 | IO12 | I/O | GPIO12 / RTC_GPIO12 / TOUCH12 / ADC2_CH1 / FSPICLK |
| 24 | IO13 | I/O | GPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ |
| 25 | IO14 | I/O | GPIO14 / RTC_GPIO14 / TOUCH14 / ADC2_CH3 / FSPIWP |
| 26 | AN7/C3IN1-/C4IN1-/RC1 | I/O | Multiplexed I/O & Peripheral Pin AN7/C3IN1-/C4IN1-/RC1 (General) |
| 27 | IO47 | I/O | GPIO47 / SPICLK_P_DIFF / SUBSPICLK_P_DIFF |
| 28 | VDD | Power | Power Supply Input (VDD — 3.0V to 3.6V) |
| 29 | VSS | GND | Ground Reference Pin (VSS) |
| 30 | OSC1/CLKI/RA2 | I/O | Multiplexed I/O & Peripheral Pin OSC1/CLKI/RA2 (RTC/CLK) |
| 31 | OSC2/CLKO/RA3 | I/O | Multiplexed I/O & Peripheral Pin OSC2/CLKO/RA3 (RTC/CLK) |
| 32 | SDA2/RPI24/RA8 | I/O | Multiplexed I/O & Peripheral Pin SDA2/RPI24/RA8 (I2C) |
| 33 | FLT32/SCL2/RP36/RB4 | I/O | Multiplexed I/O & Peripheral Pin FLT32/SCL2/RP36/RB4 (I2C) |
| 34 | IO34 | I/O | General Purpose Digital I/O Pin IO34 |
| 35 | SDI1/RPI25/RA9 | I/O | Multiplexed I/O & Peripheral Pin SDI1/RPI25/RA9 (General) |
| 36 | SCK1/RPI51/RC3 | I/O | Multiplexed I/O & Peripheral Pin SCK1/RPI51/RC3 (SPI) |
| 37 | SDA1/RPI52/RC4 | I/O | Multiplexed I/O & Peripheral Pin SDA1/RPI52/RC4 (I2C) |
| 38 | SCL1/RPI53/RC5 | I/O | Multiplexed I/O & Peripheral Pin SCL1/RPI53/RC5 (I2C) |
| 39 | VSS | GND | Exposed Thermal & Ground Pad (VSS) |
| 40 | VDD | Power | Power Supply Input (VDD — 3.0V to 3.6V) |
| 41 | PGED2/ASDA2/RP37/RB5 | I/O | Multiplexed I/O & Peripheral Pin PGED2/ASDA2/RP37/RB5 (General) |
| 42 | PGEC2/ASCL2/RP38/RB6 | I/O | Multiplexed I/O & Peripheral Pin PGEC2/ASCL2/RP38/RB6 (General) |
| 43 | RP39/INT0/RB7 | I/O | Multiplexed I/O & Peripheral Pin RP39/INT0/RB7 (General) |
| 44 | IO44 | I/O | General Purpose Digital I/O Pin IO44 |
| 45 | EP | GND | Exposed Thermal & Ground Pad (EP) |
PIN 1 TMS/ASDA1/RP41/RB9(4)
I/OMultiplexed I/O & Peripheral Pin TMS/ASDA1/RP41/RB9(4) (General)
Design note: Signal terminal TMS/ASDA1/RP41/RB9(4) (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: TMS/ASDA1/RP41/RB9(4). Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner
Extracted Drawings Gallery (6 Standard Drawings + 11 Extracted Figures)
Read the original datasheet PDF directly or click any drawing to view fullscreen1. Realistic 3D PackageREPRESENTATIVE
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
True package pinout (45 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
VTLA-44(6x6) · 6.00×6.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
IPC-7351B Footprint (45 Pads)Expand ›
6. Application SchematicSCHEMATIC
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (11 figures · Page 1/1)
Showing 1–11 of 11 uncropped original figures for DSPIC33EP32M / DSPIC33EP64G
P1 · p01_fig01376×201px
P27 · p27_fig011777×1658px
P34 · p34_fig011298×980px
P36 · p36_fig011471×1006px
P36 · p36_fig021162×699px
P36 · p36_fig02P36
P121 · p121_fig011777×980px
P509 · p509_fig011778×2547px
P509 · p509_fig01P509
P512 · p512_fig011268×1145px
P500 · p500_fig011778×2529px
Technical Specifications & Part Details (dsPIC33EP32MC204T-I/TL)
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)Detailed Overview:dsPIC33EP32MC204T-I/TL (VTLA-44(6x6)) is a 44-pin standard electronic & interconnect component featuring a 6.00 × 6.00 × 1.00 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V to 3.6V supply operation across -40°C to +85°C with integrated UART, SPI, I2C, ADC, PWM, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
140 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
6.00 × 6.00 × 1.00 mm (A1=0.02 mm)
Package family: OTHER (VTLA-44(6x6))
Pin Count & Lead PitchN / e
44 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, PWM, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.
5-Point Standards Verification
Automated compliance checks prior to exportIEEE-315 Symbol45 auto-grouped pins
IPC-7351B Land Pattern45 pads · Pitch 0.50mm
IPC-7525 60% Solder PasteEPAD 4.60×4.60mm windowed grid
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
Hardware Verification & Community Engineering Reviews
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet5.00 PCB Verified
IPC-7351B
Select package variant or sibling MPN sharing this datasheetFamily Variants & Same Datasheet Chips — DSPIC33EP32M / DSPIC33EP64G (2)
VTLA-44(6x6) · 45P
45P6.0×6.0×1.00mmP=0.5mm
DSPIC33EP32M / DSPIC33EP64G (VTLA-44(6x6))
Mechanical Dimensions & Land Pattern (VTLA-44(6x6))
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
6.00 × 6.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.00mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 0.45 mm
Pins / Total PadsTopology
45P / 45Pad (CUSTOM_ARRAY)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit VTLA-44(6x6) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — dsPIC33EP32MC204T-I/TL (VTLA-44(6x6))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of dsPIC33EP32MC204T-I/TL (VTLA-44(6x6))?
Manufactured by MICROCHIP, the dsPIC33EP32MC204T-I/TL is housed in a VTLA-44(6x6) package with 45 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 3.0V to 3.6V. Key pins include: 1 (TMS/ASDA1/RP41/RB9(4): Multiplexed I/O & Peripheral Pin TMS/ASDA1/RP41/RB9(4) (General)), 2 (RP54/RC6: Multiplexed I/O & Peripheral Pin RP54/RC6 (General)), 3 (RP55/RC7: Multiplexed I/O & Peripheral Pin RP55/RC7 (General)), 4 (RP56/RC8: Multiplexed I/O & Peripheral Pin RP56/RC8 (General)), 5 (RP57/RC9: Multiplexed I/O & Peripheral Pin RP57/RC9 (General)), 6 (VSS: Ground Reference Pin (VSS)).
What are the IPC-7351B PCB Footprint dimensions for dsPIC33EP32MC204T-I/TL?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), dsPIC33EP32MC204T-I/TL (VTLA-44(6x6)) has a nominal body envelope of 6.00 × 6.00 mm, pitch e = 0.50 mm, and 45 copper pads plus a central exposed thermal pad (EPAD) of 4.60 × 4.60 mm with a 60% IPC-7525 windowed solder paste grid.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for dsPIC33EP32MC204T-I/TL?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for dsPIC33EP32MC204T-I/TL (MICROCHIP, VTLA-44(6x6)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (45 pins) & DSPIC33EP32M / DSPIC33EP64G Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | TMS/ASDA1/RP41/RB9(4) | Digital_IO | Signal terminal TMS/ASDA1/RP41/RB9(4) (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: TMS/ASDA1/RP41/RB9(4). Supported peripheral buses: General. |
| 2 | RP54/RC6 | Digital_IO | Signal terminal RP54/RC6 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RP54/RC6. Supported peripheral buses: General. |
| 3 | RP55/RC7 | Digital_IO | Signal terminal RP55/RC7 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RP55/RC7. Supported peripheral buses: General. |
| 4 | RP56/RC8 | Digital_IO | Signal terminal RP56/RC8 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RP56/RC8. Supported peripheral buses: General. |
| 5 | RP57/RC9 | Digital_IO | Signal terminal RP57/RC9 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RP57/RC9. Supported peripheral buses: General. |
| 6 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 7 | VCAP | Digital_IO | Signal terminal VCAP (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General. |
| 8 | RP42/PWM3H/RB10 | Digital_IO | Signal terminal RP42/PWM3H/RB10 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RP42/PWM3H/RB10. Supported peripheral buses: PWM. |
| 9 | RP43/PWM3L/RB11 | Digital_IO | Signal terminal RP43/PWM3L/RB11 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RP43/PWM3L/RB11. Supported peripheral buses: PWM. |
| 10 | RPI44/PWM2H/RB12 | Digital_IO | Signal terminal RPI44/PWM2H/RB12 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RPI44/PWM2H/RB12. Supported peripheral buses: PWM. |
| 11 | RPI45/PWM2L/CTPLS/RB13 | Digital_IO | Signal terminal RPI45/PWM2L/CTPLS/RB13 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RPI45/PWM2L/CTPLS/RB13. Supported peripheral buses: PWM. |
| 12 | TDO/RA10 | Digital_IO | Signal terminal TDO/RA10 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: TDO/RA10. Supported peripheral buses: General. |
| 13 | TDI/RA7 | Digital_IO | Signal terminal TDI/RA7 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: TDI/RA7. Supported peripheral buses: General. |
| 14 | RPI46/PWM1H/T3CK/RB14 | Digital_IO | Signal terminal RPI46/PWM1H/T3CK/RB14 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RPI46/PWM1H/T3CK/RB14. Supported peripheral buses: PWM. |
| 15 | RPI47/PWM1L/T5CK/RB15 | Digital_IO | Signal terminal RPI47/PWM1L/T5CK/RB15 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RPI47/PWM1L/T5CK/RB15. Supported peripheral buses: PWM. |
| 16 | AVSS | GND | 0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 17 | AVDD | Power_In | Primary positive power supply input (AVDD) operating in the 3.0V to 3.6V domain (Max rating: 3.6V). |
| 18 | MCLR# | Digital_IO | Signal terminal MCLR# (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: MCLR#. Supported peripheral buses: General. |
| 19 | AN0/OA2OUT/RA0 | Digital_IO | Signal terminal AN0/OA2OUT/RA0 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: AN0/OA2OUT/RA0. Supported peripheral buses: General. |
| 20 | AN1/C2IN1+/RA1 | Digital_IO | Signal terminal AN1/C2IN1+/RA1 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: AN1/C2IN1+/RA1. Supported peripheral buses: General. |
| 21 | IO10 | Digital_IO | GPIO10 / RTC_GPIO10 / TOUCH10 / ADC1_CH9 / FSPICS0 |
| 22 | IO11 | Digital_IO | GPIO11 / RTC_GPIO11 / TOUCH11 / ADC2_CH0 / FSPID |
| 23 | IO12 | Digital_IO | GPIO12 / RTC_GPIO12 / TOUCH12 / ADC2_CH1 / FSPICLK |
| 24 | IO13 | Digital_IO | GPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ |
| 25 | IO14 | Digital_IO | GPIO14 / RTC_GPIO14 / TOUCH14 / ADC2_CH3 / FSPIWP |
| 26 | AN7/C3IN1-/C4IN1-/RC1 | Digital_IO | Signal terminal AN7/C3IN1-/C4IN1-/RC1 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: AN7/C3IN1-/C4IN1-/RC1. Supported peripheral buses: General. |
| 27 | IO47 | Digital_IO | GPIO47 / SPICLK_P_DIFF / SUBSPICLK_P_DIFF |
| 28 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.0V to 3.6V domain (Max rating: 3.6V). |
| 29 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 30 | OSC1/CLKI/RA2 | Digital_IO | Signal terminal OSC1/CLKI/RA2 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: OSC1/CLKI/RA2. Supported peripheral buses: RTC/CLK. |
| 31 | OSC2/CLKO/RA3 | Digital_IO | Signal terminal OSC2/CLKO/RA3 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: OSC2/CLKO/RA3. Supported peripheral buses: RTC/CLK. |
| 32 | SDA2/RPI24/RA8 | Digital_IO | Signal terminal SDA2/RPI24/RA8 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: SDA2/RPI24/RA8. Supported peripheral buses: I2C. |
| 33 | FLT32/SCL2/RP36/RB4 | Digital_IO | Signal terminal FLT32/SCL2/RP36/RB4 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: FLT32/SCL2/RP36/RB4. Supported peripheral buses: I2C. |
| 34 | IO34 | Digital_IO | General Purpose Digital I/O Pin IO34 |
| 35 | SDI1/RPI25/RA9 | Digital_IO | Signal terminal SDI1/RPI25/RA9 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: SDI1/RPI25/RA9. Supported peripheral buses: General. |
| 36 | SCK1/RPI51/RC3 | Digital_IO | Signal terminal SCK1/RPI51/RC3 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: SCK1/RPI51/RC3. Supported peripheral buses: SPI. |
| 37 | SDA1/RPI52/RC4 | Digital_IO | Signal terminal SDA1/RPI52/RC4 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: SDA1/RPI52/RC4. Supported peripheral buses: I2C. |
| 38 | SCL1/RPI53/RC5 | Digital_IO | Signal terminal SCL1/RPI53/RC5 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: SCL1/RPI53/RC5. Supported peripheral buses: I2C. |
| 39 | VSS | GND | Bottom exposed die attach pad (VSS) providing primary thermal conduction path to the PCB and low-inductance 0V ground return. |
| 40 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.0V to 3.6V domain (Max rating: 3.6V). |
| 41 | PGED2/ASDA2/RP37/RB5 | Digital_IO | Signal terminal PGED2/ASDA2/RP37/RB5 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: PGED2/ASDA2/RP37/RB5. Supported peripheral buses: General. |
| 42 | PGEC2/ASCL2/RP38/RB6 | Digital_IO | Signal terminal PGEC2/ASCL2/RP38/RB6 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: PGEC2/ASCL2/RP38/RB6. Supported peripheral buses: General. |
| 43 | RP39/INT0/RB7 | Digital_IO | Signal terminal RP39/INT0/RB7 (I/O, 3.0V to 3.6V domain). Multiplexed alternate functions: RP39/INT0/RB7. Supported peripheral buses: General. |
| 44 | IO44 | Digital_IO | General Purpose Digital I/O Pin IO44 |
| 45 | EP | GND | Bottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return. |