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CH452A (SOIC-28-300mil) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH452A

WCHID: C36350SOIC-28-300mil · 28 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH452A (SOIC-28-300mil)1DIG72DIG63DIG54DIG45DIG36DIG27DIG18DIG09GND10GND11NC12RST13RST#14H3L228RSTI27SCL26SDA25ADDR24INT#23VCC22SEG721SEG620SEG519SEG418SEG317SEG216SEG115SEG0Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.222.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728E=7.50mm · Pitch e=1.27mmD=17.90mm-10-8-6-4-20246810131197531-1-3-5-7-9-11-13mm
3. 3D CAD MODEL
Package Body: 7.50mm × 17.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1DIG7I/OMultiplexed I/O & Peripheral Pin DIG7 (General)
2DIG6I/OMultiplexed I/O & Peripheral Pin DIG6 (General)
3DIG5I/OMultiplexed I/O & Peripheral Pin DIG5 (General)
4DIG4I/OMultiplexed I/O & Peripheral Pin DIG4 (General)
5DIG3I/OMultiplexed I/O & Peripheral Pin DIG3 (General)
6DIG2I/OMultiplexed I/O & Peripheral Pin DIG2 (General)
7DIG1I/OMultiplexed I/O & Peripheral Pin DIG1 (General)
8DIG0I/OMultiplexed I/O & Peripheral Pin DIG0 (General)
9GNDGNDGround Reference Pin (GND)
10GNDGNDGround Reference Pin (GND)
11NCI/OMultiplexed I/O & Peripheral Pin NC (General)
12RSTI/OMultiplexed I/O & Peripheral Pin RST (General)
13RST#I/OMultiplexed I/O & Peripheral Pin RST# (General)
14H3L2I/OMultiplexed I/O & Peripheral Pin H3L2 (General)
15SEG0I/OMultiplexed I/O & Peripheral Pin SEG0 (General)
16SEG1I/OMultiplexed I/O & Peripheral Pin SEG1 (General)
17SEG2I/OMultiplexed I/O & Peripheral Pin SEG2 (General)
18SEG3I/OMultiplexed I/O & Peripheral Pin SEG3 (General)
19SEG4I/OMultiplexed I/O & Peripheral Pin SEG4 (General)
20SEG5I/OMultiplexed I/O & Peripheral Pin SEG5 (General)
21SEG6I/OMultiplexed I/O & Peripheral Pin SEG6 (General)
22SEG7I/OMultiplexed I/O & Peripheral Pin SEG7 (General)
23VCCPowerPower Supply Input (VCC — 3V~5V)
24INT#I/OMultiplexed I/O & Peripheral Pin INT# (General)
25ADDRI/OMultiplexed I/O & Peripheral Pin ADDR (General)
26SDAI/OMultiplexed I/O & Peripheral Pin SDA (I2C)
27SCLI/OMultiplexed I/O & Peripheral Pin SCL (I2C)
28RSTII/OMultiplexed I/O & Peripheral Pin RSTI (General)
PIN 1 DIG7
I/O
Multiplexed I/O & Peripheral Pin DIG7 (General)
Design note: Signal terminal DIG7 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG7. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 10 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH452A (WCH · SOIC-28-300mil)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH452A (SOIC-28-300mil) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH452A (SOIC-28-300mil) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH452A (SOIC-28-300mil) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH452A (SOIC-28-300mil) - 4. Package Dimensions (D×E×A)
SOIC-28-300mil · 7.50×17.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH452A (SOIC-28-300mil) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH452A (SOIC-28-300mil) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (10 figures · Page 1/1)
Showing 1–10 of 10 uncropped original figures for CH452
P1 · p01_fig011700×1409px
CH452A (SOIC-28-300mil) — 2. Features | DIG7~DIG0 | SEG7~SEG0 | RST# | RST | DOUT | DCLK | LOAD | DIN | CH452 chip | 4-wire interface | (Dotted line | optional) | MCU, | etc. | 8 bits digital tube | or 64 LEDs | or 64-level Light column | 8×8 matrix 64-key keyboard
2. Features | DIG7~DIG0 | SEG7~SEG0 | RST# | RST | DOUT | DCLK | LOAD | DIN | CH452 chip | 4-wire interface | (Dotted line | optional) | MCU, | etc. | 8 bits digital tube | or 64 LEDs | or 64-level Light column | 8×8 matrix 64-key keyboard
P3 · p03_fig01938×1068px
CH452A (SOIC-28-300mil) — Package Width Pitch of Pin Instruction of
Package Width Pitch of Pin Instruction of
P3 · p03_fig01P3
CH452A (SOIC-28-300mil) — Datasheet Page 3 (p03_fig01)
Datasheet Page 3 (p03_fig01)
P24 · p24_fig011257×526px
CH452A (SOIC-28-300mil) — DIG VCC Bee bIGi Ri4 Ti DIGz bigs ik es5a@ DIGS . —— S012 bIG4 . DIGS . uz2 Ri3 DIGé ULN2Z863 Gi No rm DIG? SEGa sine 4 pa gablf :—\ sSEGa FT, | SEG1 SEaS = Dd ai a ESL ed q a SEG2 D2 O2 > a Cc SEGs 4 is MSEGS 2 SEG3 BS O3 2 a i] SEG4 5 14
DIG VCC Bee bIGi Ri4 Ti DIGz bigs ik es5a@ DIGS . —— S012 bIG4 . DIGS . uz2 Ri3 DIGé ULN2Z863 Gi No rm DIG? SEGa sine 4 pa gablf :—\ sSEGa FT, | SEG1 SEaS = Dd ai a ESL ed q a SEG2 D2 O2 > a Cc SEGs 4 is MSEGS 2 SEG3 BS O3 2 a i] SEG4 5 14
P24 · p24_fig02991×505px
CH452A (SOIC-28-300mil) — DIG DIGe DIG Yoo voc WOC DIG ree DIG? DIGS * WMOS Th [| | DIG4 . Pt] Pi] Pi] DIGS * 2382 DIG6 ry ri mr DIG? SEGa SEGS fin agua aHa a2 SEG1 SEGI ole [_| B [| E SEG2 4 == Uo UO com SEG2 c c c SEGR SEG3 z cD [| ob [| BD SEG4 1 —_ |_| — [| — SE
DIG DIGe DIG Yoo voc WOC DIG ree DIG? DIGS * WMOS Th [| | DIG4 . Pt] Pi] Pi] DIGS * 2382 DIG6 ry ri mr DIG? SEGa SEGS fin agua aHa a2 SEG1 SEGI ole [_| B [| E SEG2 4 == Uo UO com SEG2 c c c SEGR SEG3 z cD [| ob [| BD SEG4 1 —_ |_| — [| — SE
P28 · p28_fig011507×2150px
CH452A (SOIC-28-300mil) — vee oo U4 CH452L Ra 8. 1u 208Rx8 U3 vec. secelté — PIC/AUR... HBL2 SEGI = RTC 1S\/onp seas i a Sou = at = RBG 166u SEGE — RB1i SEG? —— RB? is}esr preg ee DN REE at DCLK é{ocik bred | t2 —— Laan Re? pazp—@f——L0aD "#1 7555 pres ps —— L___Aala
vee oo U4 CH452L Ra 8. 1u 208Rx8 U3 vec. secelté — PIC/AUR... HBL2 SEGI = RTC 1S\/onp seas i a Sou = at = RBG 166u SEGE — RB1i SEG? —— RB? is}esr preg ee DN REE at DCLK é{ocik bred | t2 —— Laan Re? pazp—@f——L0aD "#1 7555 pres ps —— L___Aala
P29 · p29_fig011447×1041px
CH452A (SOIC-28-300mil) — ce 4U13 CH452L F168 : ig 268Rx8 - a4, 2lucc Sseea re c+ b848 4 zens Lee i SEGd?2 abDR Sesz/2% — eee Zeb? ae — SEa44 H3L2 5E64}22 — ee GND = SEGS PS — aE = 2Ees Lt = _sEa4? Ui2 : ae 14 DiG4da B9C51 sr-7 RESET _ 16 RST DIG1 13 bIgal 33 DIG? P
ce 4U13 CH452L F168 : ig 268Rx8 - a4, 2lucc Sseea re c+ b848 4 zens Lee i SEGd?2 abDR Sesz/2% — eee Zeb? ae — SEa44 H3L2 5E64}22 — ee GND = SEGS PS — aE = 2Ees Lt = _sEa4? Ui2 : ae 14 DiG4da B9C51 sr-7 RESET _ 16 RST DIG1 13 bIgal 33 DIG? P
P29 · p29_fig01P29
CH452A (SOIC-28-300mil) — Datasheet Page 29 (p29_fig01)
Datasheet Page 29 (p29_fig01)
P30 · p30_fig011664×1149px
CH452A (SOIC-28-300mil) — vec | yor Z/ucc sega}ts vec wee H3L2 5eG1 /-19 | R21 R22/)R23 22 GND — SeG4 an ] tied [anal Saanze = seas [2a neat 101 DIN | — SI1DIN SEG? = | Tors Ted a voe[ tons 77 | panne] POO At 103 LOAD | — 4/Loap pie3s}dt big4 ial erere ae 200 ahr fo
vec | yor Z/ucc sega}ts vec wee H3L2 5eG1 /-19 | R21 R22/)R23 22 GND — SeG4 an ] tied [anal Saanze = seas [2a neat 101 DIN | — SI1DIN SEG? = | Tors Ted a voe[ tons 77 | panne] POO At 103 LOAD | — 4/Loap pie3s}dt big4 ial erere ae 200 ahr fo
P30 · p30_fig01P30
CH452A (SOIC-28-300mil) — Datasheet Page 30 (p30_fig01)
Datasheet Page 30 (p30_fig01)

Technical Specifications & Part Details (CH452A)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH452A (SOIC-28-300mil) is a 28-pin standard electronic & interconnect component featuring a 17.90 × 7.50 × 2.70 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 3V~5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated I2C interfaces.
Operating Supply VoltageV_CC / V_DD
3V~5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
17.90 × 7.50 × 2.70 mm (A1=0.20 mm)
Package family: SOIC (SOIC-28-300mil)
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
I2C
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOIC-28-300mil)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
17.90 × 7.50 mm
Height (A) & Pitch (e)IPC-7351B
A=2.70mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.90 mm
Pins / Total PadsTopology
28P / 28Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOIC-28-300mil
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH452A (SOIC-28-300mil)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH452A (SOIC-28-300mil)?

Manufactured by WCH, the CH452A is housed in a SOIC-28-300mil package with 28 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 3V~5V. Key pins include: 1 (DIG7: Multiplexed I/O & Peripheral Pin DIG7 (General)), 2 (DIG6: Multiplexed I/O & Peripheral Pin DIG6 (General)), 3 (DIG5: Multiplexed I/O & Peripheral Pin DIG5 (General)), 4 (DIG4: Multiplexed I/O & Peripheral Pin DIG4 (General)), 5 (DIG3: Multiplexed I/O & Peripheral Pin DIG3 (General)), 6 (DIG2: Multiplexed I/O & Peripheral Pin DIG2 (General)).

What are the IPC-7351B PCB Footprint dimensions for CH452A?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH452A (SOIC-28-300mil) has a nominal body envelope of 7.50 × 17.90 mm, pitch e = 1.27 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH452A?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH452A (WCH, SOIC-28-300mil) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & CH452 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1DIG7Digital_IOSignal terminal DIG7 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG7. Supported peripheral buses: General.
2DIG6Digital_IOSignal terminal DIG6 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG6. Supported peripheral buses: General.
3DIG5Digital_IOSignal terminal DIG5 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG5. Supported peripheral buses: General.
4DIG4Digital_IOSignal terminal DIG4 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG4. Supported peripheral buses: General.
5DIG3Digital_IOSignal terminal DIG3 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG3. Supported peripheral buses: General.
6DIG2Digital_IOSignal terminal DIG2 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG2. Supported peripheral buses: General.
7DIG1Digital_IOSignal terminal DIG1 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG1. Supported peripheral buses: General.
8DIG0Digital_IOSignal terminal DIG0 (I/O, 3V~5V domain). Multiplexed alternate functions: DIG0. Supported peripheral buses: General.
9GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
10GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
11NCNCSignal terminal NC (I/O, 3V~5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
12RSTDigital_IOSignal terminal RST (I/O, 3V~5V domain). Multiplexed alternate functions: RST. Supported peripheral buses: General.
13RST#Digital_IOSignal terminal RST# (I/O, 3V~5V domain). Multiplexed alternate functions: RST#. Supported peripheral buses: General.
14H3L2Digital_IOSignal terminal H3L2 (I/O, 3V~5V domain). Multiplexed alternate functions: H3L2. Supported peripheral buses: General.
15SEG0Digital_IOSignal terminal SEG0 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG0. Supported peripheral buses: General.
16SEG1Digital_IOSignal terminal SEG1 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG1. Supported peripheral buses: General.
17SEG2Digital_IOSignal terminal SEG2 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG2. Supported peripheral buses: General.
18SEG3Digital_IOSignal terminal SEG3 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG3. Supported peripheral buses: General.
19SEG4Digital_IOSignal terminal SEG4 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG4. Supported peripheral buses: General.
20SEG5Digital_IOSignal terminal SEG5 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG5. Supported peripheral buses: General.
21SEG6Digital_IOSignal terminal SEG6 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG6. Supported peripheral buses: General.
22SEG7Digital_IOSignal terminal SEG7 (I/O, 3V~5V domain). Multiplexed alternate functions: SEG7. Supported peripheral buses: General.
23VCCPower_InPrimary positive power supply input (VCC) operating in the 3V~5V domain (Max rating: 5.0V).
24INT#Digital_IOSignal terminal INT# (I/O, 3V~5V domain). Multiplexed alternate functions: INT#. Supported peripheral buses: General.
25ADDRDigital_IOSignal terminal ADDR (I/O, 3V~5V domain). Multiplexed alternate functions: ADDR. Supported peripheral buses: General.
26SDADigital_IOSignal terminal SDA (I/O, 3V~5V domain). Multiplexed alternate functions: SDA. Supported peripheral buses: I2C.
27SCLDigital_IOSignal terminal SCL (I/O, 3V~5V domain). Multiplexed alternate functions: SCL. Supported peripheral buses: I2C.
28RSTIDigital_IOSignal terminal RSTI (I/O, 3V~5V domain). Multiplexed alternate functions: RSTI. Supported peripheral buses: General.
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