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PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC32MX250F128D-50I/ML

MICROCHIPQFN-44-EP(8x8) · 45 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC32MX250F128D-50I/ML (QFN-44-EP(8x8))1PGED12PGEC13CTED134PMA55PMA66RA27VCAP8RB49CTED910VUSB3V311PMRD12PMA1013CTED314CTED1015CTED416AVSS17AVDD18MCLR19VREF+20VREF-21CTPLS22CTED523CTED645EP44PMD443PMD542VBUS41RPB5/USBID/R40VDD39VSS38PMA337PMA436RC335PMA934T1CK33SOSCI/RPB4/R32PMA831OSC2/CLKO/RP30OSC1/CLKI/RP29VSS28VDD27CTED126RC125RC024IO13Grid Pitch = 2.54mm (IEEE-315)-20.3-15.2-10.2-5.105.110.215.220.335.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445E=8.00mm · Pitch e=0.65mmD=8.00mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 8.00mm × 8.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (45/45)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PGED1I/OMultiplexed I/O & Peripheral Pin PGED1 (General)
2PGEC1I/OMultiplexed I/O & Peripheral Pin PGEC1 (General)
3CTED13I/OMultiplexed I/O & Peripheral Pin CTED13 (General)
4PMA5I/OMultiplexed I/O & Peripheral Pin PMA5 (General)
5PMA6I/OMultiplexed I/O & Peripheral Pin PMA6 (General)
6RA2I/OMultiplexed I/O & Peripheral Pin RA2 (General)
7VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
8RB4I/OMultiplexed I/O & Peripheral Pin RB4 (General)
9CTED9I/OMultiplexed I/O & Peripheral Pin CTED9 (General)
10VUSB3V3PowerPower Supply Input (VUSB3V3 — 2.3V to 3.6V)
11PMRDI/OMultiplexed I/O & Peripheral Pin PMRD (General)
12PMA10I/OMultiplexed I/O & Peripheral Pin PMA10 (General)
13CTED3I/OMultiplexed I/O & Peripheral Pin CTED3 (General)
14CTED10I/OMultiplexed I/O & Peripheral Pin CTED10 (General)
15CTED4I/OMultiplexed I/O & Peripheral Pin CTED4 (General)
16AVSSGNDGround Reference Pin (AVSS)
17AVDDPowerPower Supply Input (AVDD — 2.3V to 3.6V)
18MCLRI/OMultiplexed I/O & Peripheral Pin MCLR (General)
19VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
20VREF-AnalogMultiplexed I/O & Peripheral Pin VREF- (General)
21CTPLSI/OMultiplexed I/O & Peripheral Pin CTPLS (General)
22CTED5I/OMultiplexed I/O & Peripheral Pin CTED5 (General)
23CTED6I/OMultiplexed I/O & Peripheral Pin CTED6 (General)
24IO13I/OGPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ
25RC0I/OMultiplexed I/O & Peripheral Pin RC0 (General)
26RC1I/OMultiplexed I/O & Peripheral Pin RC1 (General)
27CTED1I/OMultiplexed I/O & Peripheral Pin CTED1 (General)
28VDDPowerPower Supply Input (VDD — 2.3V to 3.6V)
29VSSGNDGround Reference Pin (VSS)
30OSC1/CLKI/RPA2/RA2I/OMultiplexed I/O & Peripheral Pin OSC1/CLKI/RPA2/RA2 (RTC/CLK)
31OSC2/CLKO/RPA3/RA3I/OMultiplexed I/O & Peripheral Pin OSC2/CLKO/RPA3/RA3 (RTC/CLK)
32PMA8I/OMultiplexed I/O & Peripheral Pin PMA8 (General)
33SOSCI/RPB4/RB4I/OMultiplexed I/O & Peripheral Pin SOSCI/RPB4/RB4 (General)
34T1CKI/OMultiplexed I/O & Peripheral Pin T1CK (General)
35PMA9I/OMultiplexed I/O & Peripheral Pin PMA9 (General)
36RC3I/OMultiplexed I/O & Peripheral Pin RC3 (General)
37PMA4I/OMultiplexed I/O & Peripheral Pin PMA4 (General)
38PMA3I/OMultiplexed I/O & Peripheral Pin PMA3 (General)
39VSSGNDExposed Thermal & Ground Pad (VSS)
40VDDPowerPower Supply Input (VDD — 2.3V to 3.6V)
41RPB5/USBID/RB5I/OMultiplexed I/O & Peripheral Pin RPB5/USBID/RB5 (USB)
42VBUSPowerPower Supply Input (VBUS — 2.3V to 3.6V)
43PMD5I/OMultiplexed I/O & Peripheral Pin PMD5 (General)
44PMD4I/OMultiplexed I/O & Peripheral Pin PMD4 (General)
45EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 PGED1
I/O
Multiplexed I/O & Peripheral Pin PGED1 (General)
Design note: DataI/OpinforProgramming/Debugging CommunicationChannel1
IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
1. Realistic 3D PackageREPRESENTATIVE
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) - 2. Standard Pinout (Top View)
True package pinout (45 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) - 4. Package Dimensions (D×E×A)
QFN-44-EP(8x8) · 8.00×8.00mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) - 5. Recommended Land Pattern
IPC-7351B Footprint (45 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for PIC32MX250F1 / PIC32MX170F2
P1 · p01_fig01377×200px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — 32-bit Microcontrollers (up to 256 KB Flash and 64 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog
32-bit Microcontrollers (up to 256 KB Flash and 64 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog
P19 · p19_fig011548×1545px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — FIGURE 1-1: BLOCK DIAGRAM
FIGURE 1-1: BLOCK DIAGRAM
P31 · p31_fig011730×1260px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — FIGURE 2-5: CAPACITIVE TOUCH SENSING WITH GRAPHICS APPLICATION
FIGURE 2-5: CAPACITIVE TOUCH SENSING WITH GRAPHICS APPLICATION
P31 · p31_fig021549×666px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — FIGURE 2-6: AUDIO PLAYBACK APPLICATION
FIGURE 2-6: AUDIO PLAYBACK APPLICATION
P31 · p31_fig01P31
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — Datasheet Page 31 (p31_fig01)
Datasheet Page 31 (p31_fig01)
P32 · p32_fig011446×720px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — FIGURE 2-7: REMOTE CIRCUIT WITH AN INDEPENDENT POWER SOURCE
FIGURE 2-7: REMOTE CIRCUIT WITH AN INDEPENDENT POWER SOURCE
P33 · p33_fig011684×740px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — FIGURE 2-8: DIGITAL AND ANALOG SIGNAL ISOLATION
FIGURE 2-8: DIGITAL AND ANALOG SIGNAL ISOLATION
P131 · p131_fig01867×929px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — FIGURE 11-2: REMAPPABLE INPUT EXAMPLE FOR U1RX
FIGURE 11-2: REMAPPABLE INPUT EXAMPLE FOR U1RX
P191 · p191_fig011587×671px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — Figure 20-1 illustrates the PMP module block diagram.
Figure 20-1 illustrates the PMP module block diagram.
P191 · p191_fig021195×1043px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — FIGURE 20-1: PMP MODULE PINOUT AND CONNECTIONS TO EXTERNAL DEVICES
FIGURE 20-1: PMP MODULE PINOUT AND CONNECTIONS TO EXTERNAL DEVICES
P191 · p191_fig02P191
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — Datasheet Page 191 (p191_fig02)
Datasheet Page 191 (p191_fig02)
P313 · p313_fig011778×2571px
PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) — PIC32MX1XX/2XX 28/36/44-PIN FAMILY
PIC32MX1XX/2XX 28/36/44-PIN FAMILY

Technical Specifications & Part Details (PIC32MX250F128D-50I/ML)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) is a 44-pin standard electronic & interconnect component featuring a 8.00 × 8.00 × 0.90 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 2.3V to 3.6V supply operation across -40°C to +85°C with integrated USB, UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
2.3V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
40 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
8.00 × 8.00 × 0.90 mm (A1=0.03 mm)
Package family: QFN (QFN-44-EP(8x8))
Pin Count & Lead PitchN / e
44 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol45 auto-grouped pins
OK
IPC-7351B Land Pattern45 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteEPAD 6.55×6.55mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — PIC32MX250F1 / PIC32MX170F2 (2)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (QFN-44-EP(8x8))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
8.00 × 8.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.90mm · e=0.65mm
Pad Size (W × L)Level B
0.28 × 0.80 mm
Pins / Total PadsTopology
45P / 45Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
QFN-44-EP(8x8)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC32MX250F128D-50I/ML (QFN-44-EP(8x8))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC32MX250F128D-50I/ML (QFN-44-EP(8x8))?

Manufactured by MICROCHIP, the PIC32MX250F128D-50I/ML is housed in a QFN-44-EP(8x8) package with 45 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 2.3V to 3.6V. Key pins include: 1 (PGED1: Multiplexed I/O & Peripheral Pin PGED1 (General)), 2 (PGEC1: Multiplexed I/O & Peripheral Pin PGEC1 (General)), 3 (CTED13: Multiplexed I/O & Peripheral Pin CTED13 (General)), 4 (PMA5: Multiplexed I/O & Peripheral Pin PMA5 (General)), 5 (PMA6: Multiplexed I/O & Peripheral Pin PMA6 (General)), 6 (RA2: Multiplexed I/O & Peripheral Pin RA2 (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC32MX250F128D-50I/ML?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC32MX250F128D-50I/ML (QFN-44-EP(8x8)) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.65 mm, and 45 copper pads plus a central exposed thermal pad (EPAD) of 6.55 × 6.55 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC32MX250F128D-50I/ML?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC32MX250F128D-50I/ML (MICROCHIP, QFN-44-EP(8x8)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (45 pins) & PIC32MX250F1 / PIC32MX170F2 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PGED1Digital_IOSignal terminal PGED1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGED1. Supported peripheral buses: General.
2PGEC1Digital_IOSignal terminal PGEC1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGEC1. Supported peripheral buses: General.
3CTED13Digital_IOSignal terminal CTED13 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED13. Supported peripheral buses: General.
4PMA5Digital_IOSignal terminal PMA5 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA5. Supported peripheral buses: General.
5PMA6Digital_IOSignal terminal PMA6 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA6. Supported peripheral buses: General.
6RA2Digital_IOSignal terminal RA2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RA2. Supported peripheral buses: General.
7VCAPDigital_IOSignal terminal VCAP (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
8RB4Digital_IOSignal terminal RB4 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RB4. Supported peripheral buses: General.
9CTED9Digital_IOSignal terminal CTED9 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED9. Supported peripheral buses: General.
10VUSB3V3Power_InPrimary positive power supply input (VUSB3V3) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
11PMRDDigital_IOSignal terminal PMRD (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMRD. Supported peripheral buses: General.
12PMA10Digital_IOSignal terminal PMA10 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA10. Supported peripheral buses: General.
13CTED3Digital_IOSignal terminal CTED3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED3. Supported peripheral buses: General.
14CTED10Digital_IOSignal terminal CTED10 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED10. Supported peripheral buses: General.
15CTED4Digital_IOSignal terminal CTED4 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED4. Supported peripheral buses: General.
16AVSSGND0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks.
17AVDDPower_InPrimary positive power supply input (AVDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
18MCLRDigital_IOSignal terminal MCLR (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: MCLR. Supported peripheral buses: General.
19VREF+AnalogSignal terminal VREF+ (Analog, 2.3V to 3.6V domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
20VREF-AnalogSignal terminal VREF- (Analog, 2.3V to 3.6V domain). Multiplexed alternate functions: VREF-. Supported peripheral buses: General.
21CTPLSDigital_IOSignal terminal CTPLS (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTPLS. Supported peripheral buses: General.
22CTED5Digital_IOSignal terminal CTED5 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED5. Supported peripheral buses: General.
23CTED6Digital_IOSignal terminal CTED6 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED6. Supported peripheral buses: General.
24IO13Digital_IOGPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ
25RC0Digital_IOSignal terminal RC0 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC0. Supported peripheral buses: General.
26RC1Digital_IOSignal terminal RC1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC1. Supported peripheral buses: General.
27CTED1Digital_IOSignal terminal CTED1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: CTED1. Supported peripheral buses: General.
28VDDPower_InPrimary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
29VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
30OSC1/CLKI/RPA2/RA2Digital_IOSignal terminal OSC1/CLKI/RPA2/RA2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: OSC1/CLKI/RPA2/RA2. Supported peripheral buses: RTC/CLK.
31OSC2/CLKO/RPA3/RA3Digital_IOSignal terminal OSC2/CLKO/RPA3/RA3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: OSC2/CLKO/RPA3/RA3. Supported peripheral buses: RTC/CLK.
32PMA8Digital_IOSignal terminal PMA8 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA8. Supported peripheral buses: General.
33SOSCI/RPB4/RB4Digital_IOSignal terminal SOSCI/RPB4/RB4 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: SOSCI/RPB4/RB4. Supported peripheral buses: General.
34T1CKDigital_IOSignal terminal T1CK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: T1CK. Supported peripheral buses: General.
35PMA9Digital_IOSignal terminal PMA9 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA9. Supported peripheral buses: General.
36RC3Digital_IOSignal terminal RC3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC3. Supported peripheral buses: General.
37PMA4Digital_IOSignal terminal PMA4 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA4. Supported peripheral buses: General.
38PMA3Digital_IOSignal terminal PMA3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA3. Supported peripheral buses: General.
39VSSGNDBottom exposed die attach pad (VSS) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
40VDDPower_InPrimary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
41RPB5/USBID/RB5Digital_IOSignal terminal RPB5/USBID/RB5 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RPB5/USBID/RB5. Supported peripheral buses: USB.
42VBUSPower_InPrimary positive power supply input (VBUS) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
43PMD5Digital_IOSignal terminal PMD5 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMD5. Supported peripheral buses: General.
44PMD4Digital_IOSignal terminal PMD4 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMD4. Supported peripheral buses: General.
45EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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