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PL123S-09SC (SOIC-16) — Symbol, Footprint IPC-7351B & 3D STEP Model

PL123S-09SC

MICROCHIPID: C6628657SOIC-16 · 16 Pins · Pitch 1.27mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PL123S-09SC (SOIC-16)1REF[1]2CLKA2[2]3CLKA1[2]4GND5CLKA3[2]6VDD7CLKA4[2]8CLKOUT[2]16CLKOUT15CLKA414CLKA313VDD12GND11CLKB410CLKB39S1Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.815.210.25.10-5.1-10.2-15.2mm
2. 2D FOOTPRINT
12345678910111213141516E=3.90mm · Pitch e=1.27mmD=9.90mm-6-5-4-3-2-1012345676543210-1-2-3-4-5-6-7mm
3. 3D CAD MODEL
Package Body: 3.90mm × 9.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (16/16)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1REF[1]I/OMultiplexed I/O & Peripheral Pin REF[1] (General)
2CLKA2[2]I/OMultiplexed I/O & Peripheral Pin CLKA2[2] (General)
3CLKA1[2]I/OMultiplexed I/O & Peripheral Pin CLKA1[2] (General)
4GNDGNDGround Reference Pin (GND)
5CLKA3[2]I/OMultiplexed I/O & Peripheral Pin CLKA3[2] (General)
6VDDPowerPower Supply Input (VDD — 0.5V to 4.6V)
7CLKA4[2]I/OMultiplexed I/O & Peripheral Pin CLKA4[2] (General)
8CLKOUT[2]I/OMultiplexed I/O & Peripheral Pin CLKOUT[2] (General)
9S1I/OMultiplexed I/O & Peripheral Pin S1 (General)
10CLKB3I/OMultiplexed I/O & Peripheral Pin CLKB3 (General)
11CLKB4I/OMultiplexed I/O & Peripheral Pin CLKB4 (General)
12GNDGNDGround Reference Pin (GND)
13VDDPowerPower Supply Input (VDD — 0.5V to 4.6V)
14CLKA3I/OMultiplexed I/O & Peripheral Pin CLKA3 (General)
15CLKA4I/OMultiplexed I/O & Peripheral Pin CLKA4 (General)
16CLKOUTI/OMultiplexed I/O & Peripheral Pin CLKOUT (General)
PIN 1 REF[1]
I/O
Multiplexed I/O & Peripheral Pin REF[1] (General)
Design note: Input reference frequency
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 2 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: PL123S-09SC (MICROCHIP · SOIC-16)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
PL123S-09SC (SOIC-16) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PL123S-09SC (SOIC-16) - 2. Standard Pinout (Top View)
True package pinout (16 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PL123S-09SC (SOIC-16) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PL123S-09SC (SOIC-16) - 4. Package Dimensions (D×E×A)
SOIC-16 · 3.90×9.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
PL123S-09SC (SOIC-16) - 5. Recommended Land Pattern
IPC-7351B Footprint (16 Pads)Expand ›
6. Application SchematicSCHEMATIC
PL123S-09SC (SOIC-16) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (2 figures · Page 1/1)
Showing 1–2 of 2 uncropped original figures for PL123
P1 · p01_fig011771×796px
PL123S-09SC (SOIC-16) — BLOCK DIAGRAM
BLOCK DIAGRAM
P8 · p08_fig011938×2117px
PL123S-09SC (SOIC-16) — PL123S-05/-09 | Spread-Compatible Low Skew Zero Delay Buffer | PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT) | SOP 8L | Symbol Dimension in mm | Min. Max. A 1.35 1.75 A1 0.10 0.25 A2 1.25 1.50 B 0.33 0.53 C 0.19 0.27 D 4.80 5.00 E 3.80 4.00 H
PL123S-05/-09 | Spread-Compatible Low Skew Zero Delay Buffer | PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT) | SOP 8L | Symbol Dimension in mm | Min. Max. A 1.35 1.75 A1 0.10 0.25 A2 1.25 1.50 B 0.33 0.53 C 0.19 0.27 D 4.80 5.00 E 3.80 4.00 H

Technical Specifications & Part Details (PL123S-09SC)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PL123S-09SC (SOIC-16) is a 16-pin standard electronic & interconnect component featuring a 9.90 × 3.90 × 1.75 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 0.5V to 4.6V supply operation across 65°C to 150°C with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
0.5V to 4.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
65°C to 150°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
10MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
9.90 × 3.90 × 1.75 mm (A1=0.10 mm)
Package family: SOIC (SOIC-16)
Pin Count & Lead PitchN / e
16 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol16 auto-grouped pins
OK
IPC-7351B Land Pattern16 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOIC-16)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
9.90 × 3.90 mm
Height (A) & Pitch (e)IPC-7351B
A=1.75mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.55 mm
Pins / Total PadsTopology
16P / 16Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOIC-16
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PL123S-09SC (SOIC-16)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PL123S-09SC (SOIC-16)?

Manufactured by MICROCHIP, the PL123S-09SC is housed in a SOIC-16 package with 16 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 0.5V to 4.6V. Key pins include: 1 (REF[1]: Multiplexed I/O & Peripheral Pin REF[1] (General)), 2 (CLKA2[2]: Multiplexed I/O & Peripheral Pin CLKA2[2] (General)), 3 (CLKA1[2]: Multiplexed I/O & Peripheral Pin CLKA1[2] (General)), 4 (GND: Ground Reference Pin (GND)), 5 (CLKA3[2]: Multiplexed I/O & Peripheral Pin CLKA3[2] (General)), 6 (VDD: Power Supply Input (VDD — 0.5V to 4.6V)).

What are the IPC-7351B PCB Footprint dimensions for PL123S-09SC?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PL123S-09SC (SOIC-16) has a nominal body envelope of 3.90 × 9.90 mm, pitch e = 1.27 mm, and 16 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PL123S-09SC?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PL123S-09SC (MICROCHIP, SOIC-16) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (16 pins) & PL123 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1REF[1]Digital_IOSignal terminal REF[1] (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: REF[1]. Supported peripheral buses: General.
2CLKA2[2]Digital_IOSignal terminal CLKA2[2] (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKA2[2]. Supported peripheral buses: General.
3CLKA1[2]Digital_IOSignal terminal CLKA1[2] (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKA1[2]. Supported peripheral buses: General.
4GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
5CLKA3[2]Digital_IOSignal terminal CLKA3[2] (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKA3[2]. Supported peripheral buses: General.
6VDDPower_InPrimary positive power supply input (VDD) operating in the 0.5V to 4.6V domain (Max rating: 4.6V).
7CLKA4[2]Digital_IOSignal terminal CLKA4[2] (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKA4[2]. Supported peripheral buses: General.
8CLKOUT[2]Digital_IOSignal terminal CLKOUT[2] (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKOUT[2]. Supported peripheral buses: General.
9S1Digital_IOSignal terminal S1 (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: S1. Supported peripheral buses: General.
10CLKB3Digital_IOSignal terminal CLKB3 (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKB3. Supported peripheral buses: General.
11CLKB4Digital_IOSignal terminal CLKB4 (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKB4. Supported peripheral buses: General.
12GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
13VDDPower_InPrimary positive power supply input (VDD) operating in the 0.5V to 4.6V domain (Max rating: 4.6V).
14CLKA3Digital_IOSignal terminal CLKA3 (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKA3. Supported peripheral buses: General.
15CLKA4Digital_IOSignal terminal CLKA4 (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKA4. Supported peripheral buses: General.
16CLKOUTDigital_IOSignal terminal CLKOUT (I/O, 0.5V to 4.6V domain). Multiplexed alternate functions: CLKOUT. Supported peripheral buses: General.
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