![PIC12F617-I/SN (SOIC-8) — PIC12F609/615/617/12HV609/615 - 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] - http://www.microchip.com/packaging | 2010 Microchip Technology Inc. DS41302D-page 197 | D3dêÜè nóܧ•îé qûÜóó m¶•óîüê .qf/ fÜ££†Æ2 ?4E6 ûû](/api/v1/assets/C43030/extracted/figures/p197_fig01.png)
![PIC12F617-I/SN (SOIC-8) — PIC12F609/615/617/12HV609/615 - 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] - http://www.microchip.com/packaging | DS41302D-page 198 2010 Microchip Technology Inc. | D3dêÜè nóܧ•îé qûÜóó m¶•óîüê .qf/ fÜ££†Æ2 ?4E6 ûû](/api/v1/assets/C43030/extracted/figures/p198_fig01.png)
Mechanical Dimensions & Land Pattern (SOIC-8)
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit SOIC-8 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — PIC12F617-I/SN (SOIC-8)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of PIC12F617-I/SN (SOIC-8)?
Manufactured by MICROCHIP, the PIC12F617-I/SN is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 2.0V to 5.5V. Key pins include: 1 (P1: Multiplexed I/O & Peripheral Pin P1 (General)), 2 (P2: Multiplexed I/O & Peripheral Pin P2 (General)), 3 (P3: Multiplexed I/O & Peripheral Pin P3 (General)), 4 (P4: Multiplexed I/O & Peripheral Pin P4 (General)), 5 (P5: Multiplexed I/O & Peripheral Pin P5 (General)), 6 (P6: Multiplexed I/O & Peripheral Pin P6 (General)).
What are the IPC-7351B PCB Footprint dimensions for PIC12F617-I/SN?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC12F617-I/SN (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC12F617-I/SN?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC12F617-I/SN (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (8 pins) & PIC12F617 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | P1 | Digital_IO | Signal terminal P1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P1. Supported peripheral buses: General. |
| 2 | P2 | Digital_IO | Signal terminal P2 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P2. Supported peripheral buses: General. |
| 3 | P3 | Digital_IO | Signal terminal P3 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P3. Supported peripheral buses: General. |
| 4 | P4 | Digital_IO | Signal terminal P4 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P4. Supported peripheral buses: General. |
| 5 | P5 | Digital_IO | Signal terminal P5 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P5. Supported peripheral buses: General. |
| 6 | P6 | Digital_IO | Signal terminal P6 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P6. Supported peripheral buses: General. |
| 7 | P7 | Digital_IO | Signal terminal P7 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P7. Supported peripheral buses: General. |
| 8 | P8 | Digital_IO | Signal terminal P8 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: P8. Supported peripheral buses: General. |