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ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) — Symbol, Footprint IPC-7351B & 3D STEP Model

ESP32-C3-WROOM-02D-N4

ESPRESSIFID: C2980301BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM · 19 Pins · Pitch 1.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM)13V32EN3IO44IO55IO66IO77IO88IO99GND10IO1019GND18IO017IO116IO215IO314IO1913IO1812TXD11RXDGrid Pitch = 2.54mm (IEEE-315)-20.3-15.2-10.2-5.105.110.215.220.317.812.77.62.5-2.5-7.6-12.7-17.8mm
2. 2D FOOTPRINT
ANTENNA KEEPOUT (6.3mm)191919191919191919181716151413121110987654321E=18.00mm · Pitch e=1.50mmD=20.00mm-15-13-11-9-7-5-3-11357911131515131197531-1-3-5-7-9-11-13-15mm
3. 3D CAD MODEL
Package Body: 18.00mm × 20.00mm · Pitch: 1.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (19/19)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
13V3PowerPower Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
2ENISystem Enable & Hardware Reset (EN)
3IO4I/OMultiplexed I/O & Peripheral Pin IO4 (SPI, ADC, SWD/JTAG)
4IO5I/OMultiplexed I/O & Peripheral Pin IO5 (SPI, ADC, SWD/JTAG)
5IO6I/OMultiplexed I/O & Peripheral Pin IO6 (SPI, I2C, SWD/JTAG)
6IO7I/OMultiplexed I/O & Peripheral Pin IO7 (SPI, I2C, SWD/JTAG)
7IO8I/OMultiplexed I/O & Peripheral Pin IO8 (I2C, PWM)
8IO9I/OMultiplexed I/O & Peripheral Pin IO9 (I2C, PWM)
9GNDGNDGround Reference Pin (GND)
10IO10I/OMultiplexed I/O & Peripheral Pin IO10 (SPI, PWM)
11RXDI/OMultiplexed I/O & Peripheral Pin RXD (UART)
12TXDI/OMultiplexed I/O & Peripheral Pin TXD (UART)
13IO18I/OMultiplexed I/O & Peripheral Pin IO18 (USB, SWD/JTAG)
14IO19I/OMultiplexed I/O & Peripheral Pin IO19 (USB, SWD/JTAG)
15IO3I/OMultiplexed I/O & Peripheral Pin IO3 (ADC)
16IO2I/OMultiplexed I/O & Peripheral Pin IO2 (SPI, ADC)
17IO1I/OMultiplexed I/O & Peripheral Pin IO1 (ADC, RTC/CLK)
18IO0I/OMultiplexed I/O & Peripheral Pin IO0 (ADC, RTC/CLK)
19GNDGNDGround Reference Pin (GND)
PIN 1 3V3
Power
Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
Design note: Primary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ESP32-C3-WROOM-02D-N4 (ESPRESSIF · BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) - 2. Standard Pinout (Top View)
True package pinout (19 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) - 4. Package Dimensions (D×E×A)
BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM · 18.00×20.00mm · Pitch 1.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) - 5. Recommended Land Pattern
IPC-7351B Footprint (27 Pads)Expand ›
6. Application SchematicSCHEMATIC
ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (ESP32-C3-WROOM-02D-N4)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) is a 18-pin wireless wi-fi / bluetooth le soc module featuring a 20.00 × 18.00 × 3.20 mm mechanical envelope (lead pitch e = 1.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated ADC, I2C, PWM, RTC/CLK, SPI, SWD/JTAG, UART, USB interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
RISC-V 160 MHz / RF 2.4 GHz Wi-Fi & BLE 5.0 + XTAL 40 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_TX(peak) ≈ 310 mA @ 3.3V | Deep-Sleep ≈ 10 µA | I_GPIO(max) = 40 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
20.00 × 18.00 × 3.20 mm (A1=0.00 mm)
Package family: CASTELLATED_MODULE (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM)
Pin Count & Lead PitchN / e
18 Pins | Pitch e = 1.50 mm (59.1 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
ADC, I2C, PWM, RTC/CLK, SPI, SWD/JTAG, UART, USB
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (IO8, IO9, IO2): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol19 auto-grouped pins
OK
IPC-7351B Land Pattern27 pads · Pitch 1.50mm
OK
IPC-7525 60% Solder PasteEPAD 2.90×2.90mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
20.00 × 18.00 mm
Height (A) & Pitch (e)IPC-7351B
A=3.20mm · e=1.50mm
Pad Size (W × L)Level B
1.00 × 1.80 mm
Pins / Total PadsTopology
19P / 27Pad (CASTELLATED_MODULE)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
C1, C2
BOM
22µF (or 10µF) X5R + 100nF X7R
0805 + 0402
3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA.
R_en + C_en
BOM
R = 10kΩ to 3V3 + C = 1µF to GND
0402 / 0603
Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot.
R_boot + SW1
BOM
10kΩ Pull-up + BOOT button
0402 + SMD
Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download.
D_esd
BOM
USBLC6-2SC6 / LESD5D5.0CT1G
SOT-23-6 / SOD-523
ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20.
ESP32-S3-MINI-1-N8 / 1U-N4R2
Espressif
100% Drop-inSame 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping.

Technical Frequently Asked Questions (FAQ) — ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM)?

Manufactured by ESPRESSIF, the ESP32-C3-WROOM-02D-N4 is housed in a BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM package with 19 pins and a 1.50 mm lead pitch. Key pins include: 1 (3V3: Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 2 (EN: System Enable & Hardware Reset (EN)), 3 (IO4: Multiplexed I/O & Peripheral Pin IO4 (SPI, ADC, SWD/JTAG)), 4 (IO5: Multiplexed I/O & Peripheral Pin IO5 (SPI, ADC, SWD/JTAG)), 5 (IO6: Multiplexed I/O & Peripheral Pin IO6 (SPI, I2C, SWD/JTAG)), 6 (IO7: Multiplexed I/O & Peripheral Pin IO7 (SPI, I2C, SWD/JTAG)).

What are the IPC-7351B PCB Footprint dimensions for ESP32-C3-WROOM-02D-N4?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-C3-WROOM-02D-N4 (BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) has a nominal body envelope of 18.00 × 20.00 mm, pitch e = 1.50 mm, and 27 copper pads plus a central exposed thermal pad (EPAD) of 2.90 × 2.90 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-C3-WROOM-02D-N4?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-C3-WROOM-02D-N4 (ESPRESSIF, BULETM-SMD_18P-L20.0-W18.0-P1.50_ESP32-C3-WROOM) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (19 pins) & ESP32-C3-WROOM Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
13V3Power_InPrimary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
2ENDigital_IOChip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.
3IO4Digital_IOSignal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: ADC1_CH4, FSPIHD, MTMS, JTAG_TMS, GPIO4. Supported peripheral buses: SPI, ADC, SWD/JTAG.
4IO5Digital_IOSignal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: ADC2_CH0, FSPIWP, MTDI, JTAG_TDI, GPIO5. Supported peripheral buses: SPI, ADC, SWD/JTAG.
5IO6Digital_IOSignal terminal IO6 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: FSPICLK, MTCK, JTAG_TCK, I2C_SDA, GPIO6. Supported peripheral buses: SPI, I2C, SWD/JTAG.
6IO7Digital_IOSignal terminal IO7 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: FSPID, MTDO, JTAG_TDO, I2C_SCL, GPIO7. Supported peripheral buses: SPI, I2C, SWD/JTAG.
7IO8Digital_IOSignal terminal IO8 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: BOOT_STRAP, RGB_LED_PWM, I2C_SDA, GPIO8. Supported peripheral buses: I2C, PWM.
8IO9Digital_IOSignal terminal IO9 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: BOOT_DOWNLOAD_BTN, I2C_SCL, PWM_CH, GPIO9. Supported peripheral buses: I2C, PWM.
9GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
10IO10Digital_IOSignal terminal IO10 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: FSPICS0, SPI_CS, PWM_CH, GPIO10. Supported peripheral buses: SPI, PWM.
11RXDDigital_IOSignal terminal RXD (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RXD. Supported peripheral buses: UART.
12TXDDigital_IOSignal terminal TXD (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: TXD. Supported peripheral buses: UART.
13IO18Digital_IOSignal terminal IO18 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: USB_DM, USB_SERIAL_JTAG_DM, GPIO18. Supported peripheral buses: USB, SWD/JTAG.
14IO19Digital_IOSignal terminal IO19 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: USB_DP, USB_SERIAL_JTAG_DP, GPIO19. Supported peripheral buses: USB, SWD/JTAG.
15IO3Digital_IOSignal terminal IO3 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: ADC1_CH3, GPIO3. Supported peripheral buses: ADC.
16IO2Digital_IOSignal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: ADC1_CH2, FSPIQ, BOOT_STRAP_HI, GPIO2. Supported peripheral buses: SPI, ADC.
17IO1Digital_IOSignal terminal IO1 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: ADC1_CH1, XTAL_32K_N, GPIO1. Supported peripheral buses: ADC, RTC/CLK.
18IO0Digital_IOSignal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: ADC1_CH0, XTAL_32K_P, GPIO0. Supported peripheral buses: ADC, RTC/CLK.
19GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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