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LE79271MQCT (QFN-28-EP(4x5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

LE79271MQCT

MICROCHIPID: C2651981QFN-28-EP(4x5) · 29 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · LE79271MQCT (QFN-28-EP(4x5))1RCVP2RCVN3DCB4VREF5DCA6RIREF7IA8IMT9IB10RSVD11AD12RSVD13BD14TLD15RSVD29EP28AGND27LD26P225P124P023SEL22VCC21BGND20VBP19RSVD18VBL17RSVD16VBHGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.825.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829E=4.00mm · Pitch e=0.50mmD=5.00mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 4.00mm × 5.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (29/29)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1RCVPI/OMultiplexed I/O & Peripheral Pin RCVP (General)
2RCVNI/OMultiplexed I/O & Peripheral Pin RCVN (General)
3DCBI/OMultiplexed I/O & Peripheral Pin DCB (General)
4VREFAnalogMultiplexed I/O & Peripheral Pin VREF (General)
5DCAI/OMultiplexed I/O & Peripheral Pin DCA (General)
6RIREFI/OMultiplexed I/O & Peripheral Pin RIREF (General)
7IAI/OMultiplexed I/O & Peripheral Pin IA (General)
8IMTI/OMultiplexed I/O & Peripheral Pin IMT (General)
9IBI/OMultiplexed I/O & Peripheral Pin IB (General)
10RSVDI/OMultiplexed I/O & Peripheral Pin RSVD (General)
11ADI/OMultiplexed I/O & Peripheral Pin AD (General)
12RSVDI/OMultiplexed I/O & Peripheral Pin RSVD (General)
13BDI/OMultiplexed I/O & Peripheral Pin BD (General)
14TLDI/OMultiplexed I/O & Peripheral Pin TLD (General)
15RSVDI/OMultiplexed I/O & Peripheral Pin RSVD (General)
16VBHI/OMultiplexed I/O & Peripheral Pin VBH (General)
17RSVDI/OMultiplexed I/O & Peripheral Pin RSVD (General)
18VBLI/OMultiplexed I/O & Peripheral Pin VBL (General)
19RSVDI/OMultiplexed I/O & Peripheral Pin RSVD (General)
20VBPI/OMultiplexed I/O & Peripheral Pin VBP (General)
21BGNDGNDGround Reference Pin (BGND)
22VCCPowerPower Supply Input (VCC — 3.3V / 5.0V Standard Logic)
23SELI/OMultiplexed I/O & Peripheral Pin SEL (General)
24P0I/OMultiplexed I/O & Peripheral Pin P0 (General)
25P1I/OMultiplexed I/O & Peripheral Pin P1 (General)
26P2I/OMultiplexed I/O & Peripheral Pin P2 (General)
27LDI/OMultiplexed I/O & Peripheral Pin LD (General)
28AGNDGNDGround Reference Pin (AGND)
29EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 RCVP
I/O
Multiplexed I/O & Peripheral Pin RCVP (General)
Design note: Signal terminal RCVP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RCVP. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 3 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: LE79271MQCT (MICROCHIP · QFN-28-EP(4x5))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
LE79271MQCT (QFN-28-EP(4x5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
LE79271MQCT (QFN-28-EP(4x5)) - 2. Standard Pinout (Top View)
True package pinout (29 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
LE79271MQCT (QFN-28-EP(4x5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
LE79271MQCT (QFN-28-EP(4x5)) - 4. Package Dimensions (D×E×A)
QFN-28-EP(4x5) · 4.00×5.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
LE79271MQCT (QFN-28-EP(4x5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (29 Pads)Expand ›
6. Application SchematicSCHEMATIC
LE79271MQCT (QFN-28-EP(4x5)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (3 figures · Page 1/1)
Showing 1–3 of 3 uncropped original figures for LE79271
P1 · p01_fig01591×197px
LE79271MQCT (QFN-28-EP(4x5)) — LE79271
LE79271
P1 · p01_fig021999×2132px
LE79271MQCT (QFN-28-EP(4x5)) — LE79271 | Next Generation Carrier Chipset (NGCC) Subscriber Line Interface Circuit (SLIC) | The Le79271 Next Generation Subscriber Line Interface Circuit (SLIC) device, in combination with an | Le79238 SLAC device, implements a DSL friendly
LE79271 | Next Generation Carrier Chipset (NGCC) Subscriber Line Interface Circuit (SLIC) | The Le79271 Next Generation Subscriber Line Interface Circuit (SLIC) device, in combination with an | Le79238 SLAC device, implements a DSL friendly
P1 · p01_fig031216×1030px
LE79271MQCT (QFN-28-EP(4x5)) — Detailed Block Diagram
Detailed Block Diagram

Technical Specifications & Part Details (LE79271MQCT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:LE79271MQCT (QFN-28-EP(4x5)) is a 28-pin standard electronic & interconnect component featuring a 5.00 × 4.00 × 0.85 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
12 kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
5.00 × 4.00 × 0.85 mm (A1=0.03 mm)
Package family: QFN (QFN-28-EP(4x5))
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol29 auto-grouped pins
OK
IPC-7351B Land Pattern29 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 2.65×3.56mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (QFN-28-EP(4x5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.00 × 4.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.85mm · e=0.50mm
Pad Size (W × L)Level B
0.28 × 0.67 mm
Pins / Total PadsTopology
29P / 29Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
QFN-28-EP(4x5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — LE79271MQCT (QFN-28-EP(4x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of LE79271MQCT (QFN-28-EP(4x5))?

Manufactured by MICROCHIP, the LE79271MQCT is housed in a QFN-28-EP(4x5) package with 29 pins and a 0.50 mm lead pitch. Key pins include: 1 (RCVP: Multiplexed I/O & Peripheral Pin RCVP (General)), 2 (RCVN: Multiplexed I/O & Peripheral Pin RCVN (General)), 3 (DCB: Multiplexed I/O & Peripheral Pin DCB (General)), 4 (VREF: Multiplexed I/O & Peripheral Pin VREF (General)), 5 (DCA: Multiplexed I/O & Peripheral Pin DCA (General)), 6 (RIREF: Multiplexed I/O & Peripheral Pin RIREF (General)).

What are the IPC-7351B PCB Footprint dimensions for LE79271MQCT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), LE79271MQCT (QFN-28-EP(4x5)) has a nominal body envelope of 4.00 × 5.00 mm, pitch e = 0.50 mm, and 29 copper pads plus a central exposed thermal pad (EPAD) of 2.65 × 3.56 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for LE79271MQCT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for LE79271MQCT (MICROCHIP, QFN-28-EP(4x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (29 pins) & LE79271 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1RCVPDigital_IOSignal terminal RCVP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RCVP. Supported peripheral buses: General.
2RCVNDigital_IOSignal terminal RCVN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RCVN. Supported peripheral buses: General.
3DCBDigital_IOSignal terminal DCB (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DCB. Supported peripheral buses: General.
4VREFAnalogSignal terminal VREF (Analog, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VREF. Supported peripheral buses: General.
5DCADigital_IOSignal terminal DCA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DCA. Supported peripheral buses: General.
6RIREFDigital_IOSignal terminal RIREF (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RIREF. Supported peripheral buses: General.
7IADigital_IOSignal terminal IA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: IA. Supported peripheral buses: General.
8IMTDigital_IOSignal terminal IMT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: IMT. Supported peripheral buses: General.
9IBDigital_IOSignal terminal IB (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: IB. Supported peripheral buses: General.
10RSVDNCSignal terminal RSVD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSVD. Supported peripheral buses: General.
11ADDigital_IOSignal terminal AD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: AD. Supported peripheral buses: General.
12RSVDNCSignal terminal RSVD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSVD. Supported peripheral buses: General.
13BDDigital_IOSignal terminal BD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: BD. Supported peripheral buses: General.
14TLDDigital_IOSignal terminal TLD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TLD. Supported peripheral buses: General.
15RSVDNCSignal terminal RSVD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSVD. Supported peripheral buses: General.
16VBHDigital_IOSignal terminal VBH (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VBH. Supported peripheral buses: General.
17RSVDNCSignal terminal RSVD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSVD. Supported peripheral buses: General.
18VBLDigital_IOSignal terminal VBL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VBL. Supported peripheral buses: General.
19RSVDNCSignal terminal RSVD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSVD. Supported peripheral buses: General.
20VBPDigital_IOSignal terminal VBP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VBP. Supported peripheral buses: General.
21BGNDGND0V electrical ground return terminal (BGND) for internal core logic, I/O drivers, and analog sub-blocks.
22VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
23SELDigital_IOSignal terminal SEL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEL. Supported peripheral buses: General.
24P0Digital_IOSignal terminal P0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: P0. Supported peripheral buses: General.
25P1Digital_IOSignal terminal P1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: P1. Supported peripheral buses: General.
26P2Digital_IOSignal terminal P2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: P2. Supported peripheral buses: General.
27LDDigital_IOSignal terminal LD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LD. Supported peripheral buses: General.
28AGNDGND0V electrical ground return terminal (AGND) for internal core logic, I/O drivers, and analog sub-blocks.
29EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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