ChipDocs.org
⌘K
2284 PARTSUpload PDF
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) — Symbol, Footprint IPC-7351B & 3D STEP Model

ATSAMG55G19B-UUT

MICROCHIPID: C219056WLCSP-49(2.8x2.8) · 49 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8))A1PA9A2GNDA3PA24A4PB8/XOUTA5PB9/XINA6PB4A7VDDIOB1PB11B2PB5B3PB7B4PA2B5JTAGSELB6NRSTB7PB12C1VDDCOREC2PA11C3PA12C4PB6C5PA4C6PA3C7PA0D1PA13D2PB3/AD7D3PB1/AD5D4PB10G7PA6G6PA15G5PA22G4VDDIOG3GNDG2VDDOUTG1VDDIOF7PA8/XOUT32F6PA16F5PA23F4PA21F3PA17/AD0F2PA19/AD2F1PA20/AD3E7PA7/XIN32E6TSTE5PA10E4PA14E3PA18/AD1E2PB0/AD4E1PB2/AD6D7VDDCORED6PA5D5PA1Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.838.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1mm
2. 2D FOOTPRINT
G7G6G5G4G3G2G1F7F6F5F4F3F2F1E7E6E5E4E3E2E1D7D6D5D4D3D2D1C7C6C5C4C3C2C1B7B6B5B4B3B2B1A7A6A5A4A3A2A1E=2.80mm · Pitch e=0.40mmD=2.80mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 2.80mm × 2.80mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (49/49)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
A2GNDGNDGround Reference Pin (GND)
A3PA24I/OMultiplexed I/O & Peripheral Pin PA24 (General)
A4PB8/XOUTI/OMultiplexed I/O & Peripheral Pin PB8/XOUT (RTC/CLK)
A5PB9/XINI/OMultiplexed I/O & Peripheral Pin PB9/XIN (RTC/CLK)
A6PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
A7VDDIOPowerPower Supply Input (VDDIO — 1.62V to 3.6V)
B1PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
B2PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
B3PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
B4PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
B5JTAGSELI/OMultiplexed I/O & Peripheral Pin JTAGSEL (SWD/JTAG)
B6NRSTISystem Enable & Hardware Reset (NRST)
B7PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
C1VDDCOREPowerPower Supply Input (VDDCORE — 1.62V to 3.6V)
C2PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
C3PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
C4PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
C5PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
C6PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
C7PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
D1PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
D2PB3/AD7I/OMultiplexed I/O & Peripheral Pin PB3/AD7 (General)
D3PB1/AD5I/OMultiplexed I/O & Peripheral Pin PB1/AD5 (General)
D4PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
D5PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
D6PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
D7VDDCOREPowerPower Supply Input (VDDCORE — 1.62V to 3.6V)
E1PB2/AD6I/OMultiplexed I/O & Peripheral Pin PB2/AD6 (General)
E2PB0/AD4I/OMultiplexed I/O & Peripheral Pin PB0/AD4 (General)
E3PA18/AD1I/OMultiplexed I/O & Peripheral Pin PA18/AD1 (General)
E4PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
E5PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
E6TSTI/OMultiplexed I/O & Peripheral Pin TST (General)
E7PA7/XIN32I/OMultiplexed I/O & Peripheral Pin PA7/XIN32 (RTC/CLK)
F1PA20/AD3I/OMultiplexed I/O & Peripheral Pin PA20/AD3 (General)
F2PA19/AD2I/OMultiplexed I/O & Peripheral Pin PA19/AD2 (General)
F3PA17/AD0I/OMultiplexed I/O & Peripheral Pin PA17/AD0 (General)
F4PA21I/OMultiplexed I/O & Peripheral Pin PA21 (General)
F5PA23I/OMultiplexed I/O & Peripheral Pin PA23 (General)
F6PA16I/OMultiplexed I/O & Peripheral Pin PA16 (General)
F7PA8/XOUT32I/OMultiplexed I/O & Peripheral Pin PA8/XOUT32 (RTC/CLK)
G1VDDIOPowerPower Supply Input (VDDIO — 1.62V to 3.6V)
G2VDDOUTPowerPower Supply Input (VDDOUT — 1.62V to 3.6V)
G3GNDGNDGround Reference Pin (GND)
G4VDDIOPowerPower Supply Input (VDDIO — 1.62V to 3.6V)
G5PA22I/OMultiplexed I/O & Peripheral Pin PA22 (General)
G6PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
G7PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
PIN A1 PA9
I/O
Multiplexed I/O & Peripheral Pin PA9 (General)
Design note: Signal terminal PA9 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 1 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ATSAMG55G19B-UUT (MICROCHIP · WLCSP-49(2.8x2.8))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) - 2. Standard Pinout (Top View)
True package pinout (49 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) - 4. Package Dimensions (D×E×A)
WLCSP-49(2.8x2.8) · 2.80×2.80mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) - 5. Recommended Land Pattern
IPC-7351B Footprint (49 Pads)Expand ›
6. Application SchematicSCHEMATIC
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (1 figures · Page 1/1)
Showing 1–1 of 1 uncropped original figures for ATSAMG55G19B
P13 · p13_fig01All Packages in PDF
ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) — Figure 5-3. 64-lead LQFP Package Mechanical Drawing
Figure 5-3. 64-lead LQFP Package Mechanical Drawing

Technical Specifications & Part Details (ATSAMG55G19B-UUT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) is a 49-pin standard electronic & interconnect component featuring a 2.80 × 2.80 × 0.50 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.62V to 3.6V supply operation across -40°C to +85°C with integrated USB, UART, SPI, I2C, I2S, ADC, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.62V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
120 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
2.80 × 2.80 × 0.50 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-49(2.8x2.8))
Pin Count & Lead PitchN / e
49 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol49 auto-grouped pins
OK
IPC-7351B Land Pattern49 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-49(2.8x2.8))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
2.80 × 2.80 mm
Height (A) & Pitch (e)IPC-7351B
A=0.50mm · e=0.40mm
Pad Size (W × L)Level B
0.26 × 0.26 mm
Pins / Total PadsTopology
49P / 49Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-49(2.8x2.8)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8))?

Manufactured by MICROCHIP, the ATSAMG55G19B-UUT is housed in a WLCSP-49(2.8x2.8) package with 49 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.62V to 3.6V. Key pins include: A1 (PA9: Multiplexed I/O & Peripheral Pin PA9 (General)), A2 (GND: Ground Reference Pin (GND)), A3 (PA24: Multiplexed I/O & Peripheral Pin PA24 (General)), A4 (PB8/XOUT: Multiplexed I/O & Peripheral Pin PB8/XOUT (RTC/CLK)), A5 (PB9/XIN: Multiplexed I/O & Peripheral Pin PB9/XIN (RTC/CLK)), A6 (PB4: Multiplexed I/O & Peripheral Pin PB4 (General)).

What are the IPC-7351B PCB Footprint dimensions for ATSAMG55G19B-UUT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATSAMG55G19B-UUT (WLCSP-49(2.8x2.8)) has a nominal body envelope of 2.80 × 2.80 mm, pitch e = 0.40 mm, and 49 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATSAMG55G19B-UUT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATSAMG55G19B-UUT (MICROCHIP, WLCSP-49(2.8x2.8)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (49 pins) & ATSAMG55G19B Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PA9Digital_IOSignal terminal PA9 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
A2GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
A3PA24Digital_IOSignal terminal PA24 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA24. Supported peripheral buses: General.
A4PB8/XOUTDigital_IOSignal terminal PB8/XOUT (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB8/XOUT. Supported peripheral buses: RTC/CLK.
A5PB9/XINDigital_IOSignal terminal PB9/XIN (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB9/XIN. Supported peripheral buses: RTC/CLK.
A6PB4Digital_IOSignal terminal PB4 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
A7VDDIOPower_InPrimary positive power supply input (VDDIO) operating in the 1.62V to 3.6V domain (Max rating: 3.6V).
B1PB11Digital_IOSignal terminal PB11 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
B2PB5Digital_IOSignal terminal PB5 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
B3PB7Digital_IOSignal terminal PB7 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
B4PA2Digital_IOSignal terminal PA2 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
B5JTAGSELDigital_IOSignal terminal JTAGSEL (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: JTAGSEL. Supported peripheral buses: SWD/JTAG.
B6NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
B7PB12Digital_IOSignal terminal PB12 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
C1VDDCOREPower_InPrimary positive power supply input (VDDCORE) operating in the 1.62V to 3.6V domain (Max rating: 3.6V).
C2PA11Digital_IOSignal terminal PA11 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
C3PA12Digital_IOSignal terminal PA12 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
C4PB6Digital_IOSignal terminal PB6 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
C5PA4Digital_IOSignal terminal PA4 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
C6PA3Digital_IOSignal terminal PA3 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
C7PA0Digital_IOSignal terminal PA0 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
D1PA13Digital_IOSignal terminal PA13 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
D2PB3/AD7Digital_IOSignal terminal PB3/AD7 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB3/AD7. Supported peripheral buses: General.
D3PB1/AD5Digital_IOSignal terminal PB1/AD5 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB1/AD5. Supported peripheral buses: General.
D4PB10Digital_IOSignal terminal PB10 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
D5PA1Digital_IOSignal terminal PA1 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
D6PA5Digital_IOSignal terminal PA5 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
D7VDDCOREPower_InPrimary positive power supply input (VDDCORE) operating in the 1.62V to 3.6V domain (Max rating: 3.6V).
E1PB2/AD6Digital_IOSignal terminal PB2/AD6 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB2/AD6. Supported peripheral buses: General.
E2PB0/AD4Digital_IOSignal terminal PB0/AD4 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PB0/AD4. Supported peripheral buses: General.
E3PA18/AD1Digital_IOSignal terminal PA18/AD1 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA18/AD1. Supported peripheral buses: General.
E4PA14Digital_IOSignal terminal PA14 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
E5PA10Digital_IOSignal terminal PA10 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
E6TSTDigital_IOSignal terminal TST (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: TST. Supported peripheral buses: General.
E7PA7/XIN32Digital_IOSignal terminal PA7/XIN32 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA7/XIN32. Supported peripheral buses: RTC/CLK.
F1PA20/AD3Digital_IOSignal terminal PA20/AD3 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA20/AD3. Supported peripheral buses: General.
F2PA19/AD2Digital_IOSignal terminal PA19/AD2 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA19/AD2. Supported peripheral buses: General.
F3PA17/AD0Digital_IOSignal terminal PA17/AD0 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA17/AD0. Supported peripheral buses: General.
F4PA21Digital_IOSignal terminal PA21 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA21. Supported peripheral buses: General.
F5PA23Digital_IOSignal terminal PA23 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA23. Supported peripheral buses: General.
F6PA16Digital_IOSignal terminal PA16 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA16. Supported peripheral buses: General.
F7PA8/XOUT32Digital_IOSignal terminal PA8/XOUT32 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA8/XOUT32. Supported peripheral buses: RTC/CLK.
G1VDDIOPower_InPrimary positive power supply input (VDDIO) operating in the 1.62V to 3.6V domain (Max rating: 3.6V).
G2VDDOUTPower_InPrimary positive power supply input (VDDOUT) operating in the 1.62V to 3.6V domain (Max rating: 3.6V).
G3GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
G4VDDIOPower_InPrimary positive power supply input (VDDIO) operating in the 1.62V to 3.6V domain (Max rating: 3.6V).
G5PA22Digital_IOSignal terminal PA22 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA22. Supported peripheral buses: General.
G6PA15Digital_IOSignal terminal PA15 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
G7PA6Digital_IOSignal terminal PA6 (I/O, 1.62V to 3.6V domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
ExplorePartsPackagesMFRsUpload