Mechanical Dimensions & Land Pattern (SOIC-20-300mil)
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit SOIC-20-300mil | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — ATTINY261V-10SU (SOIC-20-300mil)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of ATTINY261V-10SU (SOIC-20-300mil)?
Manufactured by MICROCHIP, the ATTINY261V-10SU is housed in a SOIC-20-300mil package with 20 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 1.8V to 5.5V. Key pins include: 1 (OC1A•OC1OE2: Multiplexed I/O & Peripheral Pin OC1A•OC1OE2 (PWM)), 2 (IO2: General Purpose Digital I/O Pin IO2), 3 (3V3: 3.3V Main Power Supply Rail (3.0V ~ 3.6V)), 4 ((OC1B/PCINT11)PB3: Multiplexed I/O & Peripheral Pin (OC1B/PCINT11)PB3 (PWM)), 5 (VCC: Power Supply Input (VCC — 1.8V to 5.5V)), 6 (GND: Ground Reference Pin (GND)).
What are the IPC-7351B PCB Footprint dimensions for ATTINY261V-10SU?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATTINY261V-10SU (SOIC-20-300mil) has a nominal body envelope of 7.50 × 12.80 mm, pitch e = 1.27 mm, and 20 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATTINY261V-10SU?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATTINY261V-10SU (MICROCHIP, SOIC-20-300mil) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (20 pins) & ATTINY261V Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | OC1A•OC1OE2 | Digital_IO | Signal terminal OC1A•OC1OE2 (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: OC1A•OC1OE2. Supported peripheral buses: PWM. |
| 2 | IO2 | Digital_IO | General Purpose Digital I/O Pin IO2 |
| 3 | 3V3 | Power_In | 3.3V Main Power Supply Rail (3.0V ~ 3.6V) |
| 4 | (OC1B/PCINT11)PB3 | Digital_IO | Signal terminal (OC1B/PCINT11)PB3 (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: (OC1B/PCINT11)PB3. Supported peripheral buses: PWM. |
| 5 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 1.8V to 5.5V domain (Max rating: 5.5V). |
| 6 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 7 | NC | No_Connect | No Connect (Leave Floating) |
| 8 | IO0 | Digital_IO | GPIO0 / RTC_GPIO0 (Chip Boot Mode Strapping Pin) |
| 9 | IO4 | Digital_IO | GPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3 |
| 10 | IO5 | Digital_IO | GPIO5 / RTC_GPIO5 / TOUCH5 / ADC1_CH4 |
| 11 | PA7(ADC6/AIN1/PCINT7) | Analog | Signal terminal PA7(ADC6/AIN1/PCINT7) (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: PA7(ADC6/AIN1/PCINT7). Supported peripheral buses: ADC. |
| 12 | PA6(ADC5/AIN0/PCINT6) | Analog | Signal terminal PA6(ADC5/AIN0/PCINT6) (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: PA6(ADC5/AIN0/PCINT6). Supported peripheral buses: ADC. |
| 13 | PA5(ADC4/AIN2/PCINT5) | Analog | Signal terminal PA5(ADC4/AIN2/PCINT5) (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: PA5(ADC4/AIN2/PCINT5). Supported peripheral buses: ADC. |
| 14 | PA4(ADC3/ICP0/PCINT4) | Analog | Signal terminal PA4(ADC3/ICP0/PCINT4) (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: PA4(ADC3/ICP0/PCINT4). Supported peripheral buses: ADC. |
| 15 | AVCC | Power_In | Primary positive power supply input (AVCC) operating in the 1.8V to 5.5V domain (Max rating: 5.5V). |
| 16 | AGND | GND | 0V electrical ground return terminal (AGND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 17 | PA3(AREF/PCINT3) | Digital_IO | Signal terminal PA3(AREF/PCINT3) (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: PA3(AREF/PCINT3). Supported peripheral buses: ADC. |
| 18 | IO19 | Digital_IO | GPIO19 / RTC_GPIO19 / USB_D- / U1RTS / ADC2_CH8 |
| 19 | PA1(ADC1/DO/PCINT1) | Analog | Signal terminal PA1(ADC1/DO/PCINT1) (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: PA1(ADC1/DO/PCINT1). Supported peripheral buses: ADC. |
| 20 | IO9 | Digital_IO | GPIO9 / RTC_GPIO9 / TOUCH9 / ADC1_CH8 / FSPIHD |






