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AR1010-I/SS (SSOP-20) — Symbol, Footprint IPC-7351B & 3D STEP Model

AR1010-I/SS

MICROCHIPID: C1521442SSOP-20 · 20 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · AR1010-I/SS (SSOP-20)1Header2Size3Status4Command5Data6SIQ7SY+8SS9SDO10NC20VSS19X-18X+175WSX-16Y-15Y+14SX+13SDI/SDA/RX12NC11SCK/SCL/TXGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.817.812.77.62.5-2.5-7.6-12.7-17.8mm
2. 2D FOOTPRINT
1234567891011121314151617181920E=5.30mm · Pitch e=0.65mmD=7.20mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 5.30mm × 7.20mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (20/20)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1HeaderI/OMultiplexed I/O & Peripheral Pin Header (General)
2SizeI/OMultiplexed I/O & Peripheral Pin Size (General)
3StatusI/OMultiplexed I/O & Peripheral Pin Status (General)
4CommandI/OMultiplexed I/O & Peripheral Pin Command (General)
5DataI/OMultiplexed I/O & Peripheral Pin Data (General)
6SIQI/OMultiplexed I/O & Peripheral Pin SIQ (General)
7SY+I/OMultiplexed I/O & Peripheral Pin SY+ (General)
8SSI/OMultiplexed I/O & Peripheral Pin SS (General)
9SDOI/OMultiplexed I/O & Peripheral Pin SDO (General)
10NCI/OMultiplexed I/O & Peripheral Pin NC (General)
11SCK/SCL/TXI/OMultiplexed I/O & Peripheral Pin SCK/SCL/TX (SPI, I2C)
12NCI/OMultiplexed I/O & Peripheral Pin NC (General)
13SDI/SDA/RXI/OMultiplexed I/O & Peripheral Pin SDI/SDA/RX (I2C)
14SX+I/OMultiplexed I/O & Peripheral Pin SX+ (General)
15Y+I/OMultiplexed I/O & Peripheral Pin Y+ (General)
16Y-I/OMultiplexed I/O & Peripheral Pin Y- (General)
175WSX-I/OMultiplexed I/O & Peripheral Pin 5WSX- (General)
18X+I/OMultiplexed I/O & Peripheral Pin X+ (General)
19X-I/OMultiplexed I/O & Peripheral Pin X- (General)
20VSSGNDGround Reference Pin (VSS)
PIN 1 Header
I/O
Multiplexed I/O & Peripheral Pin Header (General)
Design note: Header(markbeginningofcommandpacket)
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 10 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: AR1010-I/SS (MICROCHIP · SSOP-20)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
AR1010-I/SS (SSOP-20) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
AR1010-I/SS (SSOP-20) - 2. Standard Pinout (Top View)
True package pinout (20 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
AR1010-I/SS (SSOP-20) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
AR1010-I/SS (SSOP-20) - 4. Package Dimensions (D×E×A)
SSOP-20 · 5.30×7.20mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
AR1010-I/SS (SSOP-20) - 5. Recommended Land Pattern
IPC-7351B Footprint (20 Pads)Expand ›
6. Application SchematicSCHEMATIC
AR1010-I/SS (SSOP-20) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (10 figures · Page 1/1)
Showing 1–10 of 10 uncropped original figures for AR1010
P1 · p01_fig01377×200px
AR1010-I/SS (SSOP-20) — AR1000 Series Resistive Touch Screen Controller
AR1000 Series Resistive Touch Screen Controller
P10 · p10_fig011663×772px
AR1010-I/SS (SSOP-20) — FIGURE 3-2: 4-WIRE TOUCH SENSOR INTERFACE
FIGURE 3-2: 4-WIRE TOUCH SENSOR INTERFACE
P11 · p11_fig011668×751px
AR1010-I/SS (SSOP-20) — FIGURE 3-3: 5-WIRE TOUCH SENSOR INTERFACE
FIGURE 3-3: 5-WIRE TOUCH SENSOR INTERFACE
P12 · p12_fig011669×728px
AR1010-I/SS (SSOP-20) — FIGURE 3-4: 8-WIRE TOUCH SENSOR INTERFACE
FIGURE 3-4: 8-WIRE TOUCH SENSOR INTERFACE
P13 · p13_fig01626×247px
AR1010-I/SS (SSOP-20) — FIGURE 3-5: LED SCHEMATIC
FIGURE 3-5: LED SCHEMATIC
P21 · p21_fig011667×815px
AR1010-I/SS (SSOP-20) — FIGURE 5-4: SPI BIT TIMING - DETAIL
FIGURE 5-4: SPI BIT TIMING - DETAIL
P47 · p47_fig021360×616px
AR1010-I/SS (SSOP-20) —  2009-2016 Microchip Technology Inc. DS40001393C-page 47
 2009-2016 Microchip Technology Inc. DS40001393C-page 47
P47 · p47_fig02P47
AR1010-I/SS (SSOP-20) — Datasheet Page 47 (p47_fig02)
Datasheet Page 47 (p47_fig02)
P47 · p47_fig01All Packages in PDF
AR1010-I/SS (SSOP-20) — 12.1 Package Marking Information
12.1 Package Marking Information
P51 · p51_fig01All Packages in PDF
AR1010-I/SS (SSOP-20) —  2009-2016 Microchip Technology Inc. DS40001393C-page 51 | RECOMMENDED LAND PATTERN | Microchip Technology Drawing No. C04-2072B | 20-Lead Plastic Shrink Small Outline (SS) - 5.30 mm Body [SSOP] | For the most current package drawings, ple
 2009-2016 Microchip Technology Inc. DS40001393C-page 51 | RECOMMENDED LAND PATTERN | Microchip Technology Drawing No. C04-2072B | 20-Lead Plastic Shrink Small Outline (SS) - 5.30 mm Body [SSOP] | For the most current package drawings, ple

Technical Specifications & Part Details (AR1010-I/SS)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:AR1010-I/SS (SSOP-20) is a 20-pin standard electronic & interconnect component featuring a 7.20 × 5.30 × 1.85 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 2.5-5.0V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C interfaces.
Operating Supply VoltageV_CC / V_DD
2.5-5.0V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.20 × 5.30 × 1.85 mm (A1=0.15 mm)
Package family: TSSOP (SSOP-20)
Pin Count & Lead PitchN / e
20 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol20 auto-grouped pins
OK
IPC-7351B Land Pattern20 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SSOP-20)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.20 × 5.30 mm
Height (A) & Pitch (e)IPC-7351B
A=1.85mm · e=0.65mm
Pad Size (W × L)Level B
0.42 × 1.60 mm
Pins / Total PadsTopology
20P / 20Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SSOP-20
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — AR1010-I/SS (SSOP-20)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of AR1010-I/SS (SSOP-20)?

Manufactured by MICROCHIP, the AR1010-I/SS is housed in a SSOP-20 package with 20 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 2.5-5.0V. Key pins include: 1 (Header: Multiplexed I/O & Peripheral Pin Header (General)), 2 (Size: Multiplexed I/O & Peripheral Pin Size (General)), 3 (Status: Multiplexed I/O & Peripheral Pin Status (General)), 4 (Command: Multiplexed I/O & Peripheral Pin Command (General)), 5 (Data: Multiplexed I/O & Peripheral Pin Data (General)), 6 (SIQ: Multiplexed I/O & Peripheral Pin SIQ (General)).

What are the IPC-7351B PCB Footprint dimensions for AR1010-I/SS?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AR1010-I/SS (SSOP-20) has a nominal body envelope of 5.30 × 7.20 mm, pitch e = 0.65 mm, and 20 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for AR1010-I/SS?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AR1010-I/SS (MICROCHIP, SSOP-20) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (20 pins) & AR1010 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1HeaderDigital_IOSignal terminal Header (I/O, 2.5-5.0V domain). Multiplexed alternate functions: Header. Supported peripheral buses: General.
2SizeDigital_IOSignal terminal Size (I/O, 2.5-5.0V domain). Multiplexed alternate functions: Size. Supported peripheral buses: General.
3StatusDigital_IOSignal terminal Status (I/O, 2.5-5.0V domain). Multiplexed alternate functions: Status. Supported peripheral buses: General.
4CommandDigital_IOSignal terminal Command (I/O, 2.5-5.0V domain). Multiplexed alternate functions: Command. Supported peripheral buses: General.
5DataDigital_IOSignal terminal Data (I/O, 2.5-5.0V domain). Multiplexed alternate functions: Data. Supported peripheral buses: General.
6SIQDigital_IOSignal terminal SIQ (I/O, 2.5-5.0V domain). Multiplexed alternate functions: SIQ. Supported peripheral buses: General.
7SY+Digital_IOSignal terminal SY+ (I/O, 2.5-5.0V domain). Multiplexed alternate functions: SY+. Supported peripheral buses: General.
8SSDigital_IOSignal terminal SS (I/O, 2.5-5.0V domain). Multiplexed alternate functions: SS. Supported peripheral buses: General.
9SDODigital_IOSignal terminal SDO (I/O, 2.5-5.0V domain). Multiplexed alternate functions: SDO. Supported peripheral buses: General.
10NCNCSignal terminal NC (I/O, 2.5-5.0V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
11SCK/SCL/TXDigital_IOSignal terminal SCK/SCL/TX (I/O, 2.5-5.0V domain). Multiplexed alternate functions: SCK/SCL/TX. Supported peripheral buses: SPI, I2C.
12NCNCSignal terminal NC (I/O, 2.5-5.0V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
13SDI/SDA/RXDigital_IOSignal terminal SDI/SDA/RX (I/O, 2.5-5.0V domain). Multiplexed alternate functions: SDI/SDA/RX. Supported peripheral buses: I2C.
14SX+Digital_IOSignal terminal SX+ (I/O, 2.5-5.0V domain). Multiplexed alternate functions: SX+. Supported peripheral buses: General.
15Y+Digital_IOSignal terminal Y+ (I/O, 2.5-5.0V domain). Multiplexed alternate functions: Y+. Supported peripheral buses: General.
16Y-Digital_IOSignal terminal Y- (I/O, 2.5-5.0V domain). Multiplexed alternate functions: Y-. Supported peripheral buses: General.
175WSX-Digital_IOSignal terminal 5WSX- (I/O, 2.5-5.0V domain). Multiplexed alternate functions: 5WSX-. Supported peripheral buses: General.
18X+Digital_IOSignal terminal X+ (I/O, 2.5-5.0V domain). Multiplexed alternate functions: X+. Supported peripheral buses: General.
19X-Digital_IOSignal terminal X- (I/O, 2.5-5.0V domain). Multiplexed alternate functions: X-. Supported peripheral buses: General.
20VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
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