![STM32G474QET3 (LQFP-128(14x14)) — Figure 7. STM32G474xB/xC/xE LQFP64 pinout [LQFP-48(7x7)]](/api/v1/assets/C3227275/extracted/figures/p50_fig01.png)
![STM32G474QET3 (LQFP-128(14x14)) — Figure 59. LQFP48 - Outline [LQFP-48(7x7)]](/api/v1/assets/C3227275/extracted/figures/p206_fig01.png)
![STM32G474QET3 (LQFP-128(14x14)) — Figure 60. LQFP48 - Recommended footprint [LQFP-48(7x7)]](/api/v1/assets/C3227275/extracted/figures/p208_fig01.png)
LQFP-48(7x7) · 48P
Synchronized Pinout (Symbol / 2D / 3D) (128/128)
Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D| Pin | Symbol | Type | Function (EN) |
|---|---|---|---|
| 1 | PE2 | I/O | Multiplexed I/O & Peripheral Pin PE2 (General) |
| 2 | PE3 | I/O | Multiplexed I/O & Peripheral Pin PE3 (General) |
| 3 | PE4 | I/O | Multiplexed I/O & Peripheral Pin PE4 (General) |
| 4 | PE5 | I/O | Multiplexed I/O & Peripheral Pin PE5 (General) |
| 5 | PE6 | I/O | Multiplexed I/O & Peripheral Pin PE6 (General) |
| 6 | VBAT | Power | Power Supply Input (VBAT — 3.3V VDD (Max 4.0V)) |
| 7 | PC13 | I/O | Multiplexed I/O & Peripheral Pin PC13 (General) |
| 8 | PC14-OSC32_IN | I/O | Multiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK) |
| 9 | PC15-OSC32_OUT | I/O | Multiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK) |
| 10 | PF3 | I/O | Multiplexed I/O & Peripheral Pin PF3 (I2C) |
| 11 | PF4 | I/O | Multiplexed I/O & Peripheral Pin PF4 (I2C) |
| 12 | VSS | GND | Ground Reference Pin (VSS) |
| 13 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| 14 | PF5 | I/O | Multiplexed I/O & Peripheral Pin PF5 (General) |
| 15 | PF7 | I/O | Multiplexed I/O & Peripheral Pin PF7 (PWM) |
| 16 | PF8 | I/O | Multiplexed I/O & Peripheral Pin PF8 (SPI, PWM) |
| 17 | PF9 | I/O | Multiplexed I/O & Peripheral Pin PF9 (SPI, PWM) |
| 18 | PF10 | I/O | Multiplexed I/O & Peripheral Pin PF10 (SPI) |
| 19 | PF0 - OSC_IN | I/O | Multiplexed I/O & Peripheral Pin PF0 - OSC_IN (SPI, I2C, ADC, PWM, RTC/CLK) |
| 20 | PF1 - OSC_OU T | I/O | Multiplexed I/O & Peripheral Pin PF1 - OSC_OU T (SPI, ADC, RTC/CLK) |
| 21 | PG10 - NRST | I/O | Multiplexed I/O & Peripheral Pin PG10 - NRST (RTC/CLK) |
| 22 | PC0 | I/O | Multiplexed I/O & Peripheral Pin PC0 (ADC, PWM) |
| 23 | PC1 | I/O | Multiplexed I/O & Peripheral Pin PC1 (ADC, PWM) |
| 24 | PC2 | I/O | Multiplexed I/O & Peripheral Pin PC2 (ADC, PWM) |
| 25 | PC3 | I/O | Multiplexed I/O & Peripheral Pin PC3 (ADC, PWM) |
| 26 | PF2 | I/O | Multiplexed I/O & Peripheral Pin PF2 (I2C) |
| 27 | PA0 | I/O | Multiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK) |
| 28 | PA1 | I/O | Multiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM, RTC/CLK) |
| 29 | PA2 | I/O | Multiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM) |
| 30 | VSS | GND | Ground Reference Pin (VSS) |
| 31 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| 32 | PA3 | I/O | Multiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM) |
| 33 | PA4 | I/O | Multiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC, PWM) |
| 34 | PA5 | I/O | Multiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM) |
| 35 | PA6 | I/O | Multiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, DAC, PWM) |
| 36 | PA7 | I/O | Multiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM) |
| 37 | PC4 | I/O | Multiplexed I/O & Peripheral Pin PC4 (UART, I2C, ADC) |
| 38 | PC5 | I/O | Multiplexed I/O & Peripheral Pin PC5 (UART, ADC, PWM) |
| 39 | PB0 | I/O | Multiplexed I/O & Peripheral Pin PB0 (ADC, PWM) |
| 40 | PB1 | I/O | Multiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM) |
| 41 | PB2 | I/O | Multiplexed I/O & Peripheral Pin PB2 (I2C, ADC, PWM, RTC/CLK) |
| 42 | VSSA | GND | Ground Reference Pin (VSSA) |
| 43 | VREF+ | Analog | Multiplexed I/O & Peripheral Pin VREF+ (General) |
| 44 | VREF+ | Analog | Multiplexed I/O & Peripheral Pin VREF+ (General) |
| 45 | VDDA | Power | Power Supply Input (VDDA — 3.3V VDD (Max 4.0V)) |
| 46 | VSS | GND | Ground Reference Pin (VSS) |
| 47 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| 48 | PF11 | I/O | Multiplexed I/O & Peripheral Pin PF11 (General) |
| 49 | PF12 | I/O | Multiplexed I/O & Peripheral Pin PF12 (General) |
| 50 | PF13 | I/O | Multiplexed I/O & Peripheral Pin PF13 (I2C) |
| 51 | PF14 | I/O | Multiplexed I/O & Peripheral Pin PF14 (I2C) |
| 52 | PF15 | I/O | Multiplexed I/O & Peripheral Pin PF15 (I2C) |
| 53 | PE7 | I/O | Multiplexed I/O & Peripheral Pin PE7 (ADC) |
| 54 | PE8 | I/O | Multiplexed I/O & Peripheral Pin PE8 (SPI, ADC, PWM) |
| 55 | PE9 | I/O | Multiplexed I/O & Peripheral Pin PE9 (ADC, PWM) |
| 56 | PE10 | I/O | Multiplexed I/O & Peripheral Pin PE10 (ADC, PWM) |
| 57 | PE11 | I/O | Multiplexed I/O & Peripheral Pin PE11 (SPI, ADC, PWM) |
| 58 | PE12 | I/O | Multiplexed I/O & Peripheral Pin PE12 (SPI, ADC, PWM) |
| 59 | PE13 | I/O | Multiplexed I/O & Peripheral Pin PE13 (SPI, ADC, PWM) |
| 60 | PE14 | I/O | Multiplexed I/O & Peripheral Pin PE14 (SPI, ADC, PWM) |
| 61 | PE15 | I/O | Multiplexed I/O & Peripheral Pin PE15 (UART, ADC, PWM) |
| 62 | PB10 | I/O | Multiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM) |
| 63 | VSS | GND | Ground Reference Pin (VSS) |
| 64 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| 65 | PB11 | I/O | Multiplexed I/O & Peripheral Pin PB11 (UART, ADC, PWM) |
| 66 | PB12 | I/O | Multiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C, ADC) |
| 67 | PB13 | I/O | Multiplexed I/O & Peripheral Pin PB13 (UART, SPI, ADC, PWM) |
| 68 | PB14 | I/O | Multiplexed I/O & Peripheral Pin PB14 (UART, SPI, ADC, PWM) |
| 69 | PB15 | I/O | Multiplexed I/O & Peripheral Pin PB15 (SPI, ADC, PWM, RTC/CLK) |
| 70 | PD8 | I/O | Multiplexed I/O & Peripheral Pin PD8 (UART, ADC) |
| 71 | PD9 | I/O | Multiplexed I/O & Peripheral Pin PD9 (UART, ADC) |
| 72 | PD10 | I/O | Multiplexed I/O & Peripheral Pin PD10 (UART, ADC) |
| 73 | PD11 | I/O | Multiplexed I/O & Peripheral Pin PD11 (UART, I2C, ADC) |
| 74 | PD12 | I/O | Multiplexed I/O & Peripheral Pin PD12 (UART, ADC, PWM) |
| 75 | PD13 | I/O | Multiplexed I/O & Peripheral Pin PD13 (ADC, PWM) |
| 76 | PD14 | I/O | Multiplexed I/O & Peripheral Pin PD14 (ADC, PWM) |
| 77 | PD15 | I/O | Multiplexed I/O & Peripheral Pin PD15 (SPI, PWM) |
| 78 | VSS | GND | Ground Reference Pin (VSS) |
| 79 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| 80 | PC6 | I/O | Multiplexed I/O & Peripheral Pin PC6 (I2C, PWM) |
| 81 | PC7 | I/O | Multiplexed I/O & Peripheral Pin PC7 (I2C, PWM) |
| 82 | PG0 | I/O | Multiplexed I/O & Peripheral Pin PG0 (General) |
| 83 | PG1 | I/O | Multiplexed I/O & Peripheral Pin PG1 (General) |
| 84 | PG2 | I/O | Multiplexed I/O & Peripheral Pin PG2 (SPI) |
| 85 | PG3 | I/O | Multiplexed I/O & Peripheral Pin PG3 (SPI, I2C) |
| 86 | PG4 | I/O | Multiplexed I/O & Peripheral Pin PG4 (SPI, I2C) |
| 87 | PC8 | I/O | Multiplexed I/O & Peripheral Pin PC8 (I2C, PWM) |
| 88 | PC9 | I/O | Multiplexed I/O & Peripheral Pin PC9 (I2C, PWM) |
| 89 | PA8 | I/O | Multiplexed I/O & Peripheral Pin PA8 (UART, SPI, I2C, ADC, PWM, RTC/CLK) |
| 90 | PA9 | I/O | Multiplexed I/O & Peripheral Pin PA9 (UART, I2C, ADC, PWM) |
| 91 | PA10 | I/O | Multiplexed I/O & Peripheral Pin PA10 (USB, UART, SPI, I2C, PWM) |
| 92 | PA11 | I/O | Multiplexed I/O & Peripheral Pin PA11 (USB, UART, SPI, PWM) |
| 93 | PA12 | I/O | Multiplexed I/O & Peripheral Pin PA12 (USB, UART, PWM) |
| 94 | VSS | GND | Ground Reference Pin (VSS) |
| 95 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| 96 | PA13 | I/O | Multiplexed I/O & Peripheral Pin PA13 (UART, I2C, PWM, SWD/JTAG) |
| 97 | PF6 | I/O | Multiplexed I/O & Peripheral Pin PF6 (UART, I2C, PWM) |
| 98 | PA14 | I/O | Multiplexed I/O & Peripheral Pin PA14 (UART, I2C, PWM, SWD/JTAG) |
| 99 | PA15 | I/O | Multiplexed I/O & Peripheral Pin PA15 (UART, SPI, I2C, PWM, SWD/JTAG) |
| 100 | PC10 | I/O | Multiplexed I/O & Peripheral Pin PC10 (UART, SPI, PWM) |
| 101 | PC11 | I/O | Multiplexed I/O & Peripheral Pin PC11 (UART, SPI, I2C, PWM) |
| 102 | PC12 | I/O | Multiplexed I/O & Peripheral Pin PC12 (UART, SPI, PWM) |
| 103 | PG5 | I/O | Multiplexed I/O & Peripheral Pin PG5 (UART, SPI) |
| 104 | PG6 | I/O | Multiplexed I/O & Peripheral Pin PG6 (UART, I2C) |
| 105 | PG7 | I/O | Multiplexed I/O & Peripheral Pin PG7 (I2C) |
| 106 | PG8 | I/O | Multiplexed I/O & Peripheral Pin PG8 (I2C) |
| 107 | PG9 | I/O | Multiplexed I/O & Peripheral Pin PG9 (UART, SPI) |
| 108 | PD0 | I/O | Multiplexed I/O & Peripheral Pin PD0 (PWM) |
| 109 | PD1 | I/O | Multiplexed I/O & Peripheral Pin PD1 (PWM) |
| 110 | VSS | GND | Ground Reference Pin (VSS) |
| 111 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| 112 | PD2 | I/O | Multiplexed I/O & Peripheral Pin PD2 (UART) |
| 113 | PD3 | I/O | Multiplexed I/O & Peripheral Pin PD3 (UART) |
| 114 | PD4 | I/O | Multiplexed I/O & Peripheral Pin PD4 (UART, PWM) |
| 115 | PD5 | I/O | Multiplexed I/O & Peripheral Pin PD5 (UART) |
| 116 | PD6 | I/O | Multiplexed I/O & Peripheral Pin PD6 (UART, I2C, PWM) |
| 117 | PD7 | I/O | Multiplexed I/O & Peripheral Pin PD7 (UART, PWM) |
| 118 | PB3 | I/O | Multiplexed I/O & Peripheral Pin PB3 (UART, SPI, PWM, SWD/JTAG) |
| 119 | PB4 | I/O | Multiplexed I/O & Peripheral Pin PB4 (UART, SPI, PWM) |
| 120 | PB5 | I/O | Multiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM) |
| 121 | PB6 | I/O | Multiplexed I/O & Peripheral Pin PB6 (UART, PWM) |
| 122 | PB7 | I/O | Multiplexed I/O & Peripheral Pin PB7 (UART, I2C, PWM) |
| 123 | PB8 - BOOT0 | I/O | Multiplexed I/O & Peripheral Pin PB8 - BOOT0 (UART, I2C, PWM) |
| 124 | PB9 | I/O | Multiplexed I/O & Peripheral Pin PB9 (UART, I2C, PWM) |
| 125 | PE0 | I/O | Multiplexed I/O & Peripheral Pin PE0 (UART) |
| 126 | PE1 | I/O | Multiplexed I/O & Peripheral Pin PE1 (UART) |
| 127 | VSS | GND | Ground Reference Pin (VSS) |
| 128 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
PIN 1 PE2
I/OMultiplexed I/O & Peripheral Pin PE2 (General)
Design note: Signal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner
Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 21 Extracted Figures)
Read the original datasheet PDF directly or click any drawing to view fullscreen1. Realistic 3D PackageREPRESENTATIVE
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
True package pinout (128 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
LQFP-128(14x14) · 13.90×13.90mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
IPC-7351B Footprint (128 Pads)Expand ›
6. Application SchematicSCHEMATIC
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (21 figures · Page 1/2)
Showing 1–12 of 21 uncropped original figures for STM32G474
P53 · p53_fig01EXACT PACKAGE
P223 · p223_fig01EXACT PACKAGE
P224 · p224_fig01EXACT PACKAGE
P1 · p01_fig01881×771px
P51 · p51_fig011751×1423px
P55 · p55_fig011546×993px
P81 · p81_fig011546×1512px
P215 · p215_fig011536×963px
P215 · p215_fig021546×1034px
P50 · p50_fig01EXACT PACKAGE
P206 · p206_fig01EXACT PACKAGE
P208 · p208_fig01EXACT PACKAGE
Page 1 / 2 (21 extracted figures)
Technical Specifications & Part Details (STM32G474QET3)
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)Detailed Overview:STM32G474QET3 (LQFP-128(14x14)) is a 128-pin embedded microcontroller unit (mcu) featuring a 13.90 × 13.90 × 1.60 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
170 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
74 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
13.90 × 13.90 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-128(14x14))
Pin Count & Lead PitchN / e
128 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PB8 - BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.
5-Point Standards Verification
Automated compliance checks prior to exportIEEE-315 Symbol128 auto-grouped pins
IPC-7351B Land Pattern128 pads · Pitch 0.40mm
IPC-7525 60% Solder PasteReflow 1:1 Standard
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
Hardware Verification & Community Engineering Reviews
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet5.00 PCB Verified
IPC-7351B
Select package variant or sibling MPN sharing this datasheetFamily Variants & Same Datasheet Chips — STM32G474 (20)
LQFP-48(7x7) · 48P
LQFP-48(7x7) · 48P
LQFP-48(7x7) · 48P
LQFP-48(7x7) · 48P
UFQFPN-48(7x7) · 49P
UFQFPN-48(7x7) · 49P
LQFP-64(10x10) · 64P
LQFP-64(10x10) · 64P
LQFP-64(10x10) · 64P
LQFP-64(10x10) · 64P
LQFP-80(12x12) · 80P
LQFP-80(12x12) · 80P
LQFP-80(12x12) · 80P
LQFP-80(12x12) · 80P
LQFP-80(12x12) · 80P
LQFP-80(12x12) · 80P
LQFP-100(14x14) · 100P
LQFP-100(14x14) · 100P
LQFP-100(14x14) · 100P
Mechanical Dimensions & Land Pattern (LQFP-128(14x14))
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
13.90 × 13.90 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.40mm
Pad Size (W × L)Level B
0.18 × 1.25 mm
Pins / Total PadsTopology
128P / 128Pad (QUAD_ROW)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit LQFP-128(14x14) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32G474QET3 (LQFP-128(14x14))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32G474QET3 (LQFP-128(14x14))?
Manufactured by ST, the STM32G474QET3 is housed in a LQFP-128(14x14) package with 128 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (General)), 6 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))).
What are the IPC-7351B PCB Footprint dimensions for STM32G474QET3?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G474QET3 (LQFP-128(14x14)) has a nominal body envelope of 13.90 × 13.90 mm, pitch e = 0.40 mm, and 128 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G474QET3?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G474QET3 (ST, LQFP-128(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (128 pins) & STM32G474 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | PE2 | Digital_IO | Signal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General. |
| 2 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General. |
| 3 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General. |
| 4 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General. |
| 5 | PE6 | Digital_IO | Signal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General. |
| 6 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 7 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General. |
| 8 | PC14-OSC32_IN | Digital_IO | Signal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK. |
| 9 | PC15-OSC32_OUT | Digital_IO | Signal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK. |
| 10 | PF3 | Digital_IO | Signal terminal PF3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: I2C. |
| 11 | PF4 | Digital_IO | Signal terminal PF4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: I2C. |
| 12 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 13 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 14 | PF5 | Digital_IO | Signal terminal PF5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General. |
| 15 | PF7 | Digital_IO | Signal terminal PF7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: PWM. |
| 16 | PF8 | Digital_IO | Signal terminal PF8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF8. Supported peripheral buses: SPI, PWM. |
| 17 | PF9 | Digital_IO | Signal terminal PF9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, PWM. |
| 18 | PF10 | Digital_IO | Signal terminal PF10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI. |
| 19 | PF0 - OSC_IN | Digital_IO | Signal terminal PF0 - OSC_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, ADC, PWM, RTC/CLK. |
| 20 | PF1 - OSC_OU T | Digital_IO | Signal terminal PF1 - OSC_OU T (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, ADC, RTC/CLK. |
| 21 | PG10 - NRST | Digital_IO | Signal terminal PG10 - NRST (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG10 - NRST. Supported peripheral buses: RTC/CLK. |
| 22 | PC0 | Digital_IO | Signal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC, PWM. |
| 23 | PC1 | Digital_IO | Signal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: ADC, PWM. |
| 24 | PC2 | Digital_IO | Signal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: ADC, PWM. |
| 25 | PC3 | Digital_IO | Signal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: ADC, PWM. |
| 26 | PF2 | Digital_IO | Signal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA. Supported peripheral buses: I2C. |
| 27 | PA0 | Digital_IO | Signal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK. |
| 28 | PA1 | Digital_IO | Signal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM, RTC/CLK. |
| 29 | PA2 | Digital_IO | Signal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM. |
| 30 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 31 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 32 | PA3 | Digital_IO | Signal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM. |
| 33 | PA4 | Digital_IO | Signal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC, DAC, PWM. |
| 34 | PA5 | Digital_IO | Signal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, DAC, PWM. |
| 35 | PA6 | Digital_IO | Signal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC, DAC, PWM. |
| 36 | PA7 | Digital_IO | Signal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM. |
| 37 | PC4 | Digital_IO | Signal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL. Supported peripheral buses: UART, I2C, ADC. |
| 38 | PC5 | Digital_IO | Signal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC, PWM. |
| 39 | PB0 | Digital_IO | Signal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: ADC, PWM. |
| 40 | PB1 | Digital_IO | Signal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM. |
| 41 | PB2 | Digital_IO | Signal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C, ADC, PWM, RTC/CLK. |
| 42 | VSSA | GND | 0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks. |
| 43 | VREF+ | Analog | Signal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General. |
| 44 | VREF+ | Analog | Signal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General. |
| 45 | VDDA | Power_In | Primary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 46 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 47 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 48 | PF11 | Digital_IO | Signal terminal PF11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF11. Supported peripheral buses: General. |
| 49 | PF12 | Digital_IO | Signal terminal PF12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF12. Supported peripheral buses: General. |
| 50 | PF13 | Digital_IO | Signal terminal PF13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SMBA. Supported peripheral buses: I2C. |
| 51 | PF14 | Digital_IO | Signal terminal PF14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF14. Supported peripheral buses: I2C. |
| 52 | PF15 | Digital_IO | Signal terminal PF15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF15. Supported peripheral buses: I2C. |
| 53 | PE7 | Digital_IO | Signal terminal PE7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: ADC. |
| 54 | PE8 | Digital_IO | Signal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: SPI, ADC, PWM. |
| 55 | PE9 | Digital_IO | Signal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: ADC, PWM. |
| 56 | PE10 | Digital_IO | Signal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: ADC, PWM. |
| 57 | PE11 | Digital_IO | Signal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI, ADC, PWM. |
| 58 | PE12 | Digital_IO | Signal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: SPI, ADC, PWM. |
| 59 | PE13 | Digital_IO | Signal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: SPI, ADC, PWM. |
| 60 | PE14 | Digital_IO | Signal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI, ADC, PWM. |
| 61 | PE15 | Digital_IO | Signal terminal PE15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: UART, ADC, PWM. |
| 62 | PB10 | Digital_IO | Signal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: UART, SPI, PWM. |
| 63 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 64 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |