STM32WBA52KGU6 (UFQFPN-32(5x5)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of STM32WBA52KGU6 (UFQFPN-32(5x5))?

Manufactured by ST, the STM32WBA52KGU6 is housed in a UFQFPN-32(5x5) package with 33 pins and a 0.50 mm lead pitch. Key pins include: 1 (PB12: Multiplexed I/O & Peripheral Pin PB12 (UART)), 2 (PA8: Multiplexed I/O & Peripheral Pin PA8 (SPI, ADC, RTC/CLK)), 3 (PA7: Multiplexed I/O & Peripheral Pin PA7 (UART, ADC, PWM)), 4 (PA6: Multiplexed I/O & Peripheral Pin PA6 (UART, I2C, ADC)), 5 (VDDA: Power Supply Input (VDDA — 3.3V VDD (Max 4.0V))), 6 (PA5: Multiplexed I/O & Peripheral Pin PA5 (SPI, ADC)).

Q: What are the IPC-7351B PCB Footprint dimensions for STM32WBA52KGU6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32WBA52KGU6 (UFQFPN-32(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.50 mm, and 33 copper pads plus a central exposed thermal pad (EPAD) of 3.50 × 3.50 mm with a 60% IPC-7525 windowed solder paste grid.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32WBA52KGU6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32WBA52KGU6 (ST, UFQFPN-32(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 5.00mm × 5.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (33/33)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	PB12	I/O	Multiplexed I/O & Peripheral Pin PB12 (UART)
2	PA8	I/O	Multiplexed I/O & Peripheral Pin PA8 (SPI, ADC, RTC/CLK)
3	PA7	I/O	Multiplexed I/O & Peripheral Pin PA7 (UART, ADC, PWM)
4	PA6	I/O	Multiplexed I/O & Peripheral Pin PA6 (UART, I2C, ADC)
5	VDDA	Power	Power Supply Input (VDDA — 3.3V VDD (Max 4.0V))
6	PA5	I/O	Multiplexed I/O & Peripheral Pin PA5 (SPI, ADC)
7	PA2	I/O	Multiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
8	PA1	I/O	Multiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
9	PA0	I/O	Multiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM)
10	PB9	I/O	Multiplexed I/O & Peripheral Pin PB9 (SPI, ADC, PWM)
11	PB8	I/O	Multiplexed I/O & Peripheral Pin PB8 (UART)
12	PC15OSC32 OUT -_	I/O	Multiplexed I/O & Peripheral Pin PC15OSC32 OUT -_ (RTC/CLK)
13	PC14OSC32 IN -_	I/O	Multiplexed I/O & Peripheral Pin PC14OSC32 IN -_ (RTC/CLK)
14	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
15	PB4	I/O	Multiplexed I/O & Peripheral Pin PB4 (UART, SWD/JTAG)
16	PB3	I/O	Multiplexed I/O & Peripheral Pin PB3 (I2C, SWD/JTAG)
17	PA15	I/O	Multiplexed I/O & Peripheral Pin PA15 (UART, SPI, SWD/JTAG)
18	PA14	I/O	Multiplexed I/O & Peripheral Pin PA14 (UART, SWD/JTAG)
19	PA13	I/O	Multiplexed I/O & Peripheral Pin PA13 (SWD/JTAG)
20	PA12	I/O	Multiplexed I/O & Peripheral Pin PA12 (SPI, PWM)
21	PB15	I/O	Multiplexed I/O & Peripheral Pin PB15 (UART, I2C)
22	PH3BOOT0 -	I/O	Multiplexed I/O & Peripheral Pin PH3BOOT0 - (General)
23	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
24	NRST	I	System Enable & Hardware Reset (NRST)
25	RF	I/O	Multiplexed I/O & Peripheral Pin RF (General)
26	VDDHPA	Power	Power Supply Input (VDDHPA — 3.3V VDD (Max 4.0V))
27	VDDRF	Power	Power Supply Input (VDDRF — 3.3V VDD (Max 4.0V))
28	OSC_OUT	I/O	Multiplexed I/O & Peripheral Pin OSC_OUT (RTC/CLK)
29	OSC_IN	I/O	Multiplexed I/O & Peripheral Pin OSC_IN (RTC/CLK)
30	VDDRFPA	Power	Power Supply Input (VDDRFPA — 3.3V VDD (Max 4.0V))
31	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
32	VCAP	I/O	Multiplexed I/O & Peripheral Pin VCAP (General)
33	VSS(exposedpad)	GND	Ground Reference Pin (VSS(exposedpad))

PIN 1 PB12

I/O

Multiplexed I/O & Peripheral Pin PB12 (UART)

Design note: Alt: TIM2 CH1 TIM2_ETRSPI1RDY ,_ ,_ , USART1_TXTSCSYNC ,_ , SAI1 SD_ATIM3ETR_ ,_ , EVENTOUT

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 19 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

STM32WBA52KGU6 (UFQFPN-32(5x5)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

STM32WBA52KGU6 (UFQFPN-32(5x5)) - 2. Standard Pinout (Top View)

True package pinout (33 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

STM32WBA52KGU6 (UFQFPN-32(5x5)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

STM32WBA52KGU6 (UFQFPN-32(5x5)) - 4. Package Dimensions (D×E×A)

UFQFPN-32(5x5) · 5.00×5.00mm · Pitch 0.50mmExpand ›

5. Recommended Land PatternLAND PATTERN

STM32WBA52KGU6 (UFQFPN-32(5x5)) - 5. Recommended Land Pattern

IPC-7351B Footprint (33 Pads)Expand ›

6. Application SchematicSCHEMATIC

STM32WBA52KGU6 (UFQFPN-32(5x5)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (19 figures · Page 1/2)

Showing 1–12 of 19 uncropped original figures for STM32WBA52 / STM32WBA54 / STM32WBA55

P66 · p66_fig01EXACT PACKAGE

Figure 7. UFQFPN32 pinout(1) (2)

P140 · p140_fig01EXACT PACKAGE

Figure 36. UFQFPN32 - Outline D

P141 · p141_fig01EXACT PACKAGE

Figure 37. UFQFPN32 - Recommended footprint

P1 · p01_fig01881×726px

STM32WBA52KGU6 (UFQFPN-32(5x5)) — Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with TrustZone®, FPU, Bluetooth® LE and IEEE 802.15.4 radio solution | Datasheet - production data | • Ultra-low power radio - 2.4 GHz radio - RF transceiver supporting Bluetooth® LE,

Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with TrustZone®, FPU, Bluetooth® LE and IEEE 802.15.4 radio solution | Datasheet - production data | • Ultra-low power radio - 2.4 GHz radio - RF transceiver supporting Bluetooth® LE,

P66 · p66_fig021546×906px

Figure 8. WLCSP41 pinout(1) 4

P79 · p79_fig011546×1398px

Figure 14. Power supply scheme with LDO

P80 · p80_fig011546×1879px

Figure 15. Power supply scheme with SMPS

P81 · p81_fig011546×1849px

Figure 16. Power supply scheme with SMPS (high RF power)

P127 · p127_fig011547×755px

Figure 26. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch function

P149 · p149_fig011752×1272px

Figure 43. UFBGA59 - Recommended footprint

P67 · p67_fig011546×1060px

Figure 9. UFQFPN48 pinout(1) (2) [WLCSP-41]

P67 · p67_fig021546×1039px

Figure 10. UFQFPN48 SMPS pinout(1) (2) [WLCSP-41]

Page 1 / 2 (19 extracted figures)

Technical Specifications & Part Details (STM32WBA52KGU6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Embedded Microcontroller Unit (MCU)

Detailed Overview:STM32WBA52KGU6 (UFQFPN-32(5x5)) is a 32-pin embedded microcontroller unit (mcu) featuring a 5.00 × 5.00 × 0.55 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Bluetooth / BLE, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SPI, SWD/JTAG, UART interfaces.

Operating Supply VoltageV_CC / V_DD

3.0V ~ 3.6V (Typ 3.3V)

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C ~ +85°C (Industrial Grade)

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

2.4 GHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

18 5V-tolerant (FT) pins detected

Package Envelope (D × E × A)D × E × A

5.00 × 5.00 × 0.55 mm (A1=0.04 mm)

Package family: QFN (UFQFPN-32(5x5))

Pin Count & Lead PitchN / e

32 Pins | Pitch e = 0.50 mm (19.7 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

Bluetooth / BLE, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SPI, SWD/JTAG, UART

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Boot Strapping Pin Alert (PH3BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol33 auto-grouped pins

IPC-7351B Land Pattern33 pads · Pitch 0.50mm

IPC-7525 60% Solder PasteEPAD 3.50×3.50mm windowed grid

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

IPC-7351B

Family Variants & Same Datasheet Chips — STM32WBA52 / STM32WBA54 / STM32WBA55 (6)

Select package variant or sibling MPN sharing this datasheet

UFQFPN-32(5x5) · 33P

STM32WBA52KGU6

ST·UFQFPN-32(5x5)

IPC-7351B

33P5.0×5.0×0.55mmP=0.5mm

STM32WBA52 / STM32WBA54 / STM32WBA55 (UFQFPN-32(5x5))

UFQFPN-32(5x5) · 33P

STM32WBA54KGU6

ST·UFQFPN-32(5x5)

IPC-7351B

33P5.0×5.0×0.55mmP=0.5mm

STM32WBA52 / STM32WBA54 / STM32WBA55 (UFQFPN-32(5x5))

WLCSP-41 · 41P

STM32WBA55HGF6TR

ST·WLCSP-41

IPC-7351B

41P2.8×3.0×0.55mmP=0.4mm

STM32WBA52 / STM32WBA54 / STM32WBA55 (WLCSP-41)

UFQFPN-48(7x7) · 49P

STM32WBA52CEU6

ST·UFQFPN-48(7x7)

IPC-7351B

49P7.0×7.0×0.55mmP=0.5mm

STM32WBA52 / STM32WBA54 / STM32WBA55 (UFQFPN-48(7x7))

UFQFPN-48(7x7) · 49P

STM32WBA52CGU6

ST·UFQFPN-48(7x7)

IPC-7351B

49P7.0×7.0×0.55mmP=0.5mm

STM32WBA52 / STM32WBA54 / STM32WBA55 (UFQFPN-48(7x7))

UFBGA-59(5x5) · 59P

STM32WBA55UGI6

ST·UFBGA-59(5x5)

IPC-7351B

59P5.0×5.0×0.58mmP=0.5mm

STM32WBA52 / STM32WBA54 / STM32WBA55 (UFBGA-59(5x5))

Mechanical Dimensions & Land Pattern (UFQFPN-32(5x5))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

5.00 × 5.00 mm

Height (A) & Pitch (e)IPC-7351B

A=0.55mm · e=0.50mm

Pad Size (W × L)Level B

0.30 × 0.75 mm

Pins / Total PadsTopology

33P / 33Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit UFQFPN-32(5x5)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32WBA52KGU6 (UFQFPN-32(5x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32WBA52KGU6 (UFQFPN-32(5x5))?

Manufactured by ST, the STM32WBA52KGU6 is housed in a UFQFPN-32(5x5) package with 33 pins and a 0.50 mm lead pitch. Key pins include: 1 (PB12: Multiplexed I/O & Peripheral Pin PB12 (UART)), 2 (PA8: Multiplexed I/O & Peripheral Pin PA8 (SPI, ADC, RTC/CLK)), 3 (PA7: Multiplexed I/O & Peripheral Pin PA7 (UART, ADC, PWM)), 4 (PA6: Multiplexed I/O & Peripheral Pin PA6 (UART, I2C, ADC)), 5 (VDDA: Power Supply Input (VDDA — 3.3V VDD (Max 4.0V))), 6 (PA5: Multiplexed I/O & Peripheral Pin PA5 (SPI, ADC)).

What are the IPC-7351B PCB Footprint dimensions for STM32WBA52KGU6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32WBA52KGU6 (UFQFPN-32(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.50 mm, and 33 copper pads plus a central exposed thermal pad (EPAD) of 3.50 × 3.50 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32WBA52KGU6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32WBA52KGU6 (ST, UFQFPN-32(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (33 pins) & STM32WBA52 / STM32WBA54 / STM32WBA55 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	PB12	Digital_IO	Signal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: UART.
2	PA8	Digital_IO	Signal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_RDYUSART1RX. Supported peripheral buses: SPI, ADC, RTC/CLK.
3	PA7	Digital_IO	Signal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: UART, ADC, PWM.
4	PA6	Digital_IO	Signal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: UART, I2C, ADC.
5	VDDA	Power_In	Primary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
6	PA5	Digital_IO	Signal terminal PA5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_NSSUSART1CK. Supported peripheral buses: SPI, ADC.
7	PA2	Digital_IO	Signal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM.
8	PA1	Digital_IO	Signal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM.
9	PA0	Digital_IO	Signal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM.
10	PB9	Digital_IO	Signal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO_LPUART1RTSDE. Supported peripheral buses: SPI, ADC, PWM.
11	PB8	Digital_IO	Signal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: UART.
12	PC15OSC32 OUT -_	Digital_IO	Signal terminal PC15OSC32 OUT -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15OSC32 OUT -_. Supported peripheral buses: RTC/CLK.
13	PC14OSC32 IN -_	Digital_IO	Signal terminal PC14OSC32 IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14OSC32 IN -_. Supported peripheral buses: RTC/CLK.
14	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
15	PB4	Digital_IO	Signal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: UART, SWD/JTAG.
16	PB3	Digital_IO	Signal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: I2C, SWD/JTAG.
17	PA15	Digital_IO	Signal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI_TSCG3IO3. Supported peripheral buses: UART, SPI, SWD/JTAG.
18	PA14	Digital_IO	Signal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: UART, SWD/JTAG.
19	PA13	Digital_IO	Signal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: SWD/JTAG.
20	PA12	Digital_IO	Signal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS_TSCG3IO4. Supported peripheral buses: SPI, PWM.
21	PB15	Digital_IO	Signal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: UART, I2C.
22	PH3BOOT0 -	Digital_IO	Signal terminal PH3BOOT0 - (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3BOOT0 -. Supported peripheral buses: General.
23	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
24	NRST	Digital_IO	Active-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
25	RF	RF_50Ohm	Signal terminal RF (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: RF. Supported peripheral buses: General.
26	VDDHPA	Power_In	Primary positive power supply input (VDDHPA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
27	VDDRF	Power_In	Primary positive power supply input (VDDRF) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
28	OSC_OUT	Digital_IO	Signal terminal OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSC_OUT. Supported peripheral buses: RTC/CLK.
29	OSC_IN	Digital_IO	Signal terminal OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSC_IN. Supported peripheral buses: RTC/CLK.
30	VDDRFPA	Power_In	Primary positive power supply input (VDDRFPA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
31	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
32	VCAP	Digital_IO	Signal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
33	VSS(exposedpad)	GND	0V electrical ground return terminal (VSS(exposedpad)) for internal core logic, I/O drivers, and analog sub-blocks.

4D Studio: STM32WBA52KGU6 Permalink: /part/C22445372 ST UFQFPN-32(5x5)All Packages All Manufacturers