ChipDocs.org
⌘K
2284 PARTSUpload PDF
STM32H735ZGT6 (LQFP-144(20x20)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32H735ZGT6

STID: C730167LQFP-144(20x20) · 144 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32H735ZGT6 (LQFP-144(20x20))1PE22PE33PE44PE55PE66VSS7VDD8VBAT9PC1310PC14 - OSC3211PC15 - OSC3212VSS13VDD14VSSSMPS15VLXSMPS16VDDSMPS17VFBSMPS18VSS19VDD20PF621PF722PF823PF924PF1025PH0 - OSC_IN26PH1 - OSC_OU27NRST28PC029PC130PC2_C31PC3_C32VDD33VSS34VSSA35VREF+36VDDA37PA038PA139PA240PA341VSS42VDD43PA444PA545PA646PA747PC448PC549PB050PB151PB252PF1153PF1454PF1555VSS56VDD57PE758PE859PE960PE1061PE1162PE1263PE1364PE1465PE1566PB1067PB1168VCAP69VSS70VDDLDO71VDD72PB12144VDD143VDDLDO142PDR_ON141VSS140VCAP139PE1138PE0137PB9136PB8135BOOT0134PB7133PB6132PB5131PB4(NJTR ST)130PB3(JTDO/ TR129VDD128VSS127PG14126PG13125PG12124PG11123PG10122PG9121PD7120PD6119VDD118VSS117PD5116PD4115PD3114PD2113PD1112PD0111PC12110PC11109PC10108PA15(JTDI)107PA14(JTC K/S106VDD105VDDLDO104VSS103VCAP102PA13(JTM S/ 101PA12100PA1199PA1098PA997PA896PC995PC894PC793PC692VDD91VDD33US B90VDD50US B89VSS88PG887PG786PG685PD1584PD1483PD1382PD1281PD1180VSS79VDD78PD1077PD976PD875PB1574PB1473PB13Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.896.591.486.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4-91.4-96.5mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144E=20.00mm · Pitch e=0.50mmD=20.00mm-17-15-13-11-9-7-5-3-113579111315171715131197531-1-3-5-7-9-11-13-15-17mm
3. 3D CAD MODEL
Package Body: 20.00mm × 20.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (144/144)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (UART, SPI)
2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (UART)
3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI)
4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
5PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI, I2C)
6VSSGNDGround Reference Pin (VSS)
7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
8VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
9PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
10PC14 - OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (RTC/CLK)
11PC15 - OSC32_ OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_ OUT (RTC/CLK)
12VSSGNDGround Reference Pin (VSS)
13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
14VSSSMPSGNDGround Reference Pin (VSSSMPS)
15VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
16VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
17VFBSMPSI/OMultiplexed I/O & Peripheral Pin VFBSMPS (General)
18VSSGNDGround Reference Pin (VSS)
19VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
20PF6I/OMultiplexed I/O & Peripheral Pin PF6 (UART, SPI, ADC)
21PF7I/OMultiplexed I/O & Peripheral Pin PF7 (UART, SPI, ADC)
22PF8I/OMultiplexed I/O & Peripheral Pin PF8 (UART, SPI, ADC)
23PF9I/OMultiplexed I/O & Peripheral Pin PF9 (UART, SPI, ADC)
24PF10I/OMultiplexed I/O & Peripheral Pin PF10 (ADC)
25PH0 - OSC_INI/OMultiplexed I/O & Peripheral Pin PH0 - OSC_IN (RTC/CLK)
26PH1 - OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1 - OSC_OUT (RTC/CLK)
27NRSTISystem Enable & Hardware Reset (NRST)
28PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
29PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC, RTC/CLK)
30PC2_CI/OMultiplexed I/O & Peripheral Pin PC2_C (ADC)
31PC3_CI/OMultiplexed I/O & Peripheral Pin PC3_C (ADC)
32VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
33VSSGNDGround Reference Pin (VSS)
34VSSAGNDGround Reference Pin (VSSA)
35VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
36VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
37PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC, PWM)
38PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
39PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC, PWM)
40PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
41VSSGNDGround Reference Pin (VSS)
42VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
43PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
44PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
45PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC, PWM)
46PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
47PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
48PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
49PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
50PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
51PB2I/OMultiplexed I/O & Peripheral Pin PB2 (SPI, I2C, RTC/CLK)
52PF11I/OMultiplexed I/O & Peripheral Pin PF11 (SPI, ADC)
53PF14I/OMultiplexed I/O & Peripheral Pin PF14 (I2C, ADC)
54PF15I/OMultiplexed I/O & Peripheral Pin PF15 (I2C)
55VSSGNDGround Reference Pin (VSS)
56VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
57PE7I/OMultiplexed I/O & Peripheral Pin PE7 (UART)
58PE8I/OMultiplexed I/O & Peripheral Pin PE8 (UART, PWM)
59PE9I/OMultiplexed I/O & Peripheral Pin PE9 (UART, PWM)
60PE10I/OMultiplexed I/O & Peripheral Pin PE10 (UART, PWM)
61PE11I/OMultiplexed I/O & Peripheral Pin PE11 (SPI, PWM)
62PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
63PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI, PWM)
64PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI, PWM)
65PE15I/OMultiplexed I/O & Peripheral Pin PE15 (UART)
66PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
67PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C, PWM)
68VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
69VSSGNDGround Reference Pin (VSS)
70VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
71VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
72PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
73PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
74PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
75PB15I/OMultiplexed I/O & Peripheral Pin PB15 (UART, SPI, PWM, RTC/CLK)
76PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
77PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
78PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART)
79VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
80VSSGNDGround Reference Pin (VSS)
81PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, SPI, I2C)
82PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C, PWM)
83PD13I/OMultiplexed I/O & Peripheral Pin PD13 (UART, SPI, I2C, PWM)
84PD14I/OMultiplexed I/O & Peripheral Pin PD14 (UART, PWM)
85PD15I/OMultiplexed I/O & Peripheral Pin PD15 (UART, PWM)
86PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
87PG7I/OMultiplexed I/O & Peripheral Pin PG7 (UART)
88PG8I/OMultiplexed I/O & Peripheral Pin PG8 (UART, SPI)
89VSSGNDGround Reference Pin (VSS)
90VDD50US BPowerPower Supply Input (VDD50US B — 3.3V VDD (Max 4.0V))
91VDD33US BPowerPower Supply Input (VDD33US B — 3.3V VDD (Max 4.0V))
92VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
93PC6I/OMultiplexed I/O & Peripheral Pin PC6 (UART, PWM)
94PC7I/OMultiplexed I/O & Peripheral Pin PC7 (UART, PWM)
95PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, PWM)
96PC9I/OMultiplexed I/O & Peripheral Pin PC9 (UART, I2C, PWM, RTC/CLK)
97PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, I2C, RTC/CLK)
98PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, I2C, PWM)
99PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, PWM)
100PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
101PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, SPI)
102PA13(JTM S/ SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(JTM S/ SWDIO) (SWD/JTAG)
103VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
104VSSGNDGround Reference Pin (VSS)
105VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
106VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
107PA14(JTC K/SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14(JTC K/SWCLK) (SWD/JTAG)
108PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (UART, SPI, SWD/JTAG)
109PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI, I2C)
110PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI, I2C)
111PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI, I2C)
112PD0I/OMultiplexed I/O & Peripheral Pin PD0 (UART)
113PD1I/OMultiplexed I/O & Peripheral Pin PD1 (UART)
114PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
115PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
116PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART)
117PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
118VSSGNDGround Reference Pin (VSS)
119VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
120PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, SPI, I2C)
121PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART, SPI)
122PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART, SPI)
123PG10I/OMultiplexed I/O & Peripheral Pin PG10 (SPI)
124PG11I/OMultiplexed I/O & Peripheral Pin PG11 (UART, SPI)
125PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI)
126PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, SPI)
127PG14I/OMultiplexed I/O & Peripheral Pin PG14 (UART, SPI)
128VSSGNDGround Reference Pin (VSS)
129VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
130PB3(JTDO/ TRACES WO)I/OMultiplexed I/O & Peripheral Pin PB3(JTDO/ TRACES WO) (UART, SPI, PWM, SWD/JTAG)
131PB4(NJTR ST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTR ST) (UART, SPI, PWM, SWD/JTAG)
132PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM)
133PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C, PWM)
134PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C, PWM)
135BOOT0IInput-Only Pin BOOT0 (General)
136PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, I2C, PWM)
137PB9I/OMultiplexed I/O & Peripheral Pin PB9 (UART, SPI, I2C, PWM)
138PE0I/OMultiplexed I/O & Peripheral Pin PE0 (UART)
139PE1I/OMultiplexed I/O & Peripheral Pin PE1 (UART)
140VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
141VSSGNDGround Reference Pin (VSS)
142PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
143VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
144VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
PIN 1 PE2
I/O
Multiplexed I/O & Peripheral Pin PE2 (UART, SPI)
Design note: Alt: TRACECLK , SAI1_CK1 , USART10_RX , SPI4_SCK , SAI1_MCLKA_ , SAI4_MCLKA_ , OCTOSPIM_P1IO2_ , SAI4_CK1 , ETH_MIITXD3_ , FMC_A23 , EVENTOUT
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32H735ZGT6 (ST · LQFP-144(20x20))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32H735ZGT6 (LQFP-144(20x20)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32H735ZGT6 (LQFP-144(20x20)) - 2. Standard Pinout (Top View)
True package pinout (144 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32H735ZGT6 (LQFP-144(20x20)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32H735ZGT6 (LQFP-144(20x20)) - 4. Package Dimensions (D×E×A)
LQFP-144(20x20) · 20.00×20.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32H735ZGT6 (LQFP-144(20x20)) - 5. Recommended Land Pattern
IPC-7351B Footprint (144 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32H735ZGT6 (LQFP-144(20x20)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32H735
P60 · p60_fig01EXACT PACKAGE
STM32H735ZGT6 (LQFP-144(20x20)) — Figure 8. LQFP144 pinout
Figure 8. LQFP144 pinout
P258 · p258_fig01EXACT PACKAGE
STM32H735ZGT6 (LQFP-144(20x20)) — Figure 87. LQFP144 package recommended footprint
Figure 87. LQFP144 package recommended footprint
P1 · p01_fig01881×1119px
STM32H735ZGT6 (LQFP-144(20x20)) — • POR, PDR, PVD and BOR
• POR, PDR, PVD and BOR
P2 · p02_fig01887×578px
STM32H735ZGT6 (LQFP-144(20x20)) — ROP, PC-ROP, tamper detection, secure firmware upgrade support
ROP, PC-ROP, tamper detection, secure firmware upgrade support
P60 · p60_fig01P60
STM32H735ZGT6 (LQFP-144(20x20)) — Datasheet Page 60 (p60_fig01)
Datasheet Page 60 (p60_fig01)
P64 · p64_fig011642×2171px
STM32H735ZGT6 (LQFP-144(20x20)) — Pinouts, pin descriptions and alternate functions STM32H735xG
Pinouts, pin descriptions and alternate functions STM32H735xG
P115 · p115_fig011546×2148px
STM32H735ZGT6 (LQFP-144(20x20)) — Figure 14. Power supply scheme
Figure 14. Power supply scheme
P115 · p115_fig01P115
STM32H735ZGT6 (LQFP-144(20x20)) — Datasheet Page 115 (p115_fig01)
Datasheet Page 115 (p115_fig01)
P143 · p143_fig011546×500px
STM32H735ZGT6 (LQFP-144(20x20)) — Figure 24. Typical application with an 8 MHz crystal
Figure 24. Typical application with an 8 MHz crystal
P144 · p144_fig011546×516px
STM32H735ZGT6 (LQFP-144(20x20)) — Figure 25. Typical application with a 32.768 kHz crystal
Figure 25. Typical application with a 32.768 kHz crystal
P245 · p245_fig011597×876px
STM32H735ZGT6 (LQFP-144(20x20)) — Figure 75. VFQFPN68 package recommended footprint
Figure 75. VFQFPN68 package recommended footprint
P254 · p254_fig011546×730px
STM32H735ZGT6 (LQFP-144(20x20)) — Figure 84. WLCSP115 package recommended footprint
Figure 84. WLCSP115 package recommended footprint
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32H735ZGT6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32H735ZGT6 (LQFP-144(20x20)) is a 144-pin embedded microcontroller unit (mcu) featuring a 20.00 × 20.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.62 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, DAC, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.62 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
550 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
88 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
20.00 × 20.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-144(20x20))
Pin Count & Lead PitchN / e
144 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, DAC, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol144 auto-grouped pins
OK
IPC-7351B Land Pattern144 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-144(20x20))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
20.00 × 20.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.28 × 1.25 mm
Pins / Total PadsTopology
144P / 144Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-144(20x20)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H735ZGT6 (LQFP-144(20x20))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H735ZGT6 (LQFP-144(20x20))?

Manufactured by ST, the STM32H735ZGT6 is housed in a LQFP-144(20x20) package with 144 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.62 V to 3.6 V. Key pins include: 1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (UART, SPI)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (UART)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (SPI)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (SPI)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (SPI, I2C)), 6 (VSS: Ground Reference Pin (VSS)).

What are the IPC-7351B PCB Footprint dimensions for STM32H735ZGT6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H735ZGT6 (LQFP-144(20x20)) has a nominal body envelope of 20.00 × 20.00 mm, pitch e = 0.50 mm, and 144 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H735ZGT6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H735ZGT6 (ST, LQFP-144(20x20)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (144 pins) & STM32H735 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: UART, SPI.
2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: UART.
3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: SPI.
5PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI, I2C.
6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
8VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
9PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
10PC14 - OSC32_INDigital_IOSignal terminal PC14 - OSC32_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN. Supported peripheral buses: RTC/CLK.
11PC15 - OSC32_ OUTDigital_IOSignal terminal PC15 - OSC32_ OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15 - OSC32_ OUT. Supported peripheral buses: RTC/CLK.
12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
13VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
14VSSSMPSGND0V electrical ground return terminal (VSSSMPS) for internal core logic, I/O drivers, and analog sub-blocks.
15VLXSMPSDigital_IOSignal terminal VLXSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSMPS. Supported peripheral buses: General.
16VDDSMPSPower_InPrimary positive power supply input (VDDSMPS) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
17VFBSMPSDigital_IOSignal terminal VFBSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VFBSMPS. Supported peripheral buses: General.
18VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
19VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
20PF6Digital_IOSignal terminal PF6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI5_NSS. Supported peripheral buses: UART, SPI, ADC.
21PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI5_SCK. Supported peripheral buses: UART, SPI, ADC.
22PF8Digital_IOSignal terminal PF8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI5_MISO. Supported peripheral buses: UART, SPI, ADC.
23PF9Digital_IOSignal terminal PF9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI5_MOSI. Supported peripheral buses: UART, SPI, ADC.
24PF10Digital_IOSignal terminal PF10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF10. Supported peripheral buses: ADC.
25PH0 - OSC_INDigital_IOSignal terminal PH0 - OSC_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0 - OSC_IN. Supported peripheral buses: RTC/CLK.
26PH1 - OSC_OUTDigital_IOSignal terminal PH1 - OSC_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1 - OSC_OUT. Supported peripheral buses: RTC/CLK.
27NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
28PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC.
29PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, ADC, RTC/CLK.
30PC2_CDigital_IOSignal terminal PC2_C (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC2_C. Supported peripheral buses: ADC.
31PC3_CDigital_IOSignal terminal PC3_C (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3_C. Supported peripheral buses: ADC.
32VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
33VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
34VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
35VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
36VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
37PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_NSS. Supported peripheral buses: UART, SPI, ADC, PWM.
38PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM.
39PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, SPI, ADC, PWM.
40PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM.
41VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
42VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
43PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS, SPI6_NSS. Supported peripheral buses: UART, SPI, ADC, DAC.
44PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK, SPI6_SCK. Supported peripheral buses: SPI, ADC, DAC, PWM.
45PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI6_MISO. Supported peripheral buses: SPI, ADC, PWM.
46PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI, SPI6_MOSI. Supported peripheral buses: SPI, ADC, PWM.
47PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
48PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
49PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: UART, ADC, PWM.
50PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: ADC, PWM.
51PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: SPI, I2C, RTC/CLK.
52PF11Digital_IOSignal terminal PF11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI5_MOSI. Supported peripheral buses: SPI, ADC.
53PF14Digital_IOSignal terminal PF14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF14. Supported peripheral buses: I2C, ADC.
54PF15Digital_IOSignal terminal PF15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF15. Supported peripheral buses: I2C.
55VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
56VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
57PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: UART.
58PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: UART, PWM.
59PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: UART, PWM.
60PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: UART, PWM.
61PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI, PWM.
62PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: SPI, PWM.
63PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: SPI, PWM.
64PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI, PWM.
ExplorePartsPackagesMFRsUpload