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STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G041Y8Y6TR

STID: C724072WLCSP-18(1.9x2.1) · 18 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G041Y8Y6TR (WLCSP-18(1.9x2.1))A1PA13A3PA15A5PB8A7IOA7B2PA12[PA10]B4PB6B6PB9C1PA11[PA9]C3PA5E7PA0E5PA2E3PA6E1PA8D6VSS/VSSAD4PA4D2PA7C7VDD/VDDAC5PA1Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.817.812.77.62.5-2.5-7.6-12.7-17.8mm
2. 2D FOOTPRINT
A1A3A5A7B2B4B6C1C3C5C7D2E1E3E5E7D6D4E=1.90mm · Pitch e=0.40mmD=2.10mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 1.90mm × 2.10mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (18/18)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PA13I/OMultiplexed I/O & Peripheral Pin PA13 (ADC, SWD/JTAG)
A3PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI)
A5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (SPI, I2C)
A7IOA7I/OGeneral Purpose Digital I/O Pin IOA7
B2PA12[PA10]I/OMultiplexed I/O & Peripheral Pin PA12[PA10] (UART, SPI, I2C, ADC)
B4PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART)
B6PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI)
C1PA11[PA9]I/OMultiplexed I/O & Peripheral Pin PA11[PA9] (UART, SPI, ADC)
C3PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, PWM)
C5PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, ADC, PWM)
C7VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
D2PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
D4PA4I/OMultiplexed I/O & Peripheral Pin PA4 (SPI, ADC, RTC/CLK)
D6VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
E1PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, RTC/CLK)
E3PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC, PWM)
E5PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC)
E7PA0I/OMultiplexed I/O & Peripheral Pin PA0 (SPI, ADC)
PIN A1 PA13
I/O
Multiplexed I/O & Peripheral Pin PA13 (ADC, SWD/JTAG)
Design note: Alt: SWDIO IR OUT EVENTOUT ,_ , | Add: ADC_IN17
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 20 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G041Y8Y6TR (ST · WLCSP-18(1.9x2.1))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) - 2. Standard Pinout (Top View)
True package pinout (18 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) - 4. Package Dimensions (D×E×A)
WLCSP-18(1.9x2.1) · 1.90×2.10mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) - 5. Recommended Land Pattern
IPC-7351B Footprint (18 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (20 figures · Page 1/2)
Showing 1–12 of 20 uncropped original figures for STM32G041
P35 · p35_fig02EXACT PACKAGE
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 8. STM32G041Fx TSSOP20 pinout
Figure 8. STM32G041Fx TSSOP20 pinout
P35 · p35_fig03EXACT PACKAGE
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 9. STM32G041Yx WLCSP18 ballout
Figure 9. STM32G041Yx WLCSP18 ballout
P109 · p109_fig01EXACT PACKAGE
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 50. WLCSP18 package outline
Figure 50. WLCSP18 package outline
P110 · p110_fig01EXACT PACKAGE
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 51. WLCSP18 recommended PCB ball footprint
Figure 51. WLCSP18 recommended PCB ball footprint
P111 · p111_fig01EXACT PACKAGE
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 52. WLCSP18 package marking example
Figure 52. WLCSP18 package marking example
P1 · p01_fig01883×632px
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Arm® Cortex®-M0+ 32-bit MCU, up to 64 KB Flash, 8 KB RAM,
Arm® Cortex®-M0+ 32-bit MCU, up to 64 KB Flash, 8 KB RAM,
P33 · p33_fig011546×917px
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 3. STM32G041CxT LQFP48 pinout
Figure 3. STM32G041CxT LQFP48 pinout
P33 · p33_fig021546×903px
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 4. STM32G041CxU UFQFPN48 pinout
Figure 4. STM32G041CxU UFQFPN48 pinout
P33 · p33_fig03517×517px
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 4. STM32G041CxU UFQFPN48 pinout
Figure 4. STM32G041CxU UFQFPN48 pinout
P34 · p34_fig011546×776px
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 5. STM32G041KxT LQFP32 pinout
Figure 5. STM32G041KxT LQFP32 pinout
P34 · p34_fig021546×826px
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 6. STM32G041KxU UFQFPN32 pinout
Figure 6. STM32G041KxU UFQFPN32 pinout
P34 · p34_fig03390×390px
STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) — Figure 6. STM32G041KxU UFQFPN32 pinout
Figure 6. STM32G041KxU UFQFPN32 pinout
Page 1 / 2 (20 extracted figures)

Technical Specifications & Part Details (STM32G041Y8Y6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) is a 18-pin embedded microcontroller unit (mcu) featuring a 2.10 × 1.90 × 0.56 mm mechanical envelope (lead pitch e = 0.39 mm). Rated for 1.62 V - 3.6 V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.62 V - 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
64 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
16 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
2.10 × 1.90 × 0.56 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-18(1.9x2.1))
Pin Count & Lead PitchN / e
18 Pins | Pitch e = 0.39 mm (15.4 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol18 auto-grouped pins
OK
IPC-7351B Land Pattern18 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-18(1.9x2.1))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
2.10 × 1.90 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
18P / 18Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-18(1.9x2.1)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G041Y8Y6TR (WLCSP-18(1.9x2.1))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G041Y8Y6TR (WLCSP-18(1.9x2.1))?

Manufactured by ST, the STM32G041Y8Y6TR is housed in a WLCSP-18(1.9x2.1) package with 18 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.62 V - 3.6 V. Key pins include: A1 (PA13: Multiplexed I/O & Peripheral Pin PA13 (ADC, SWD/JTAG)), A3 (PA15: Multiplexed I/O & Peripheral Pin PA15 (UART, SPI)), A5 (PB8: Multiplexed I/O & Peripheral Pin PB8 (SPI, I2C)), A7 (IOA7: General Purpose Digital I/O Pin IOA7), B2 (PA12[PA10]: Multiplexed I/O & Peripheral Pin PA12[PA10] (UART, SPI, I2C, ADC)), B4 (PB6: Multiplexed I/O & Peripheral Pin PB6 (UART)).

What are the IPC-7351B PCB Footprint dimensions for STM32G041Y8Y6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G041Y8Y6TR (WLCSP-18(1.9x2.1)) has a nominal body envelope of 1.90 × 2.10 mm, pitch e = 0.40 mm, and 18 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G041Y8Y6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G041Y8Y6TR (ST, WLCSP-18(1.9x2.1)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (18 pins) & STM32G041 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: ADC, SWD/JTAG.
A3PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI.
A5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKTIM16CH1, I2C1_SCLEVENTOUT. Supported peripheral buses: SPI, I2C.
A7IOA7Digital_IOGeneral Purpose Digital I/O Pin IOA7
B2PA12[PA10]Digital_IOSignal terminal PA12[PA10] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, I2C2_SDA. Supported peripheral buses: UART, SPI, I2C, ADC.
B4PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART.
B6PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSSI2C1SDA. Supported peripheral buses: SPI.
C1PA11[PA9]Digital_IOSignal terminal PA11[PA9] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC.
C3PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, PWM.
C5PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, ADC, PWM.
C7VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D2PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
D4PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI2_MOSITIM14CH1. Supported peripheral buses: SPI, ADC, RTC/CLK.
D6VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
E1PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, RTC/CLK.
E3PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, ADC, PWM.
E5PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI, ADC.
E7PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKUSART2CTS. Supported peripheral buses: SPI, ADC.
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