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STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32C011D6Y6TR

STID: C6689571WLCSP-12(1.4x1.7) · 12 Pins · Pitch 0.35mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32C011D6Y6TR (WLCSP-12(1.4x1.7))A2PB6A4PC15-OSCX_OUB1PA13B3PC14-OSCX_INC2PA14-BOOT0C4VDD/VDDAF3PF2-NRST/PA0F1PA3/PA4/PA5/E4VSS/VSSAE2PA12[PA10]/PD3PB7D1PA11[PA9]/PAGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.812.77.62.5-2.5-7.6-12.7mm
2. 2D FOOTPRINT
A2A4B1B3C2C4D1D3E2E4F1F3E=1.70mm · Pitch e=0.35mmD=1.40mm-3-2-10123210-1-2mm
3. 3D CAD MODEL
Package Body: 1.70mm × 1.40mm · Pitch: 0.35mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (12/12)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A2PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
A4PC15-OSCX_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSCX_OUT (RTC/CLK)
B1PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
B3PC14-OSCX_INI/OMultiplexed I/O & Peripheral Pin PC14-OSCX_IN (RTC/CLK)
C2PA14-BOOT0I/OMultiplexed I/O & Peripheral Pin PA14-BOOT0 (General)
C4VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
D1PA11[PA9]/PA8I/OMultiplexed I/O & Peripheral Pin PA11[PA9]/PA8 (General)
D3PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
E2PA12[PA10]/PA7I/OMultiplexed I/O & Peripheral Pin PA12[PA10]/PA7 (General)
E4VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
F1PA3/PA4/PA5/PA6I/OMultiplexed I/O & Peripheral Pin PA3/PA4/PA5/PA6 (General)
F3PF2-NRST/PA0/PA1/PA2I/OMultiplexed I/O & Peripheral Pin PF2-NRST/PA0/PA1/PA2 (General)
PIN A2 PB6
I/O
Multiplexed I/O & Peripheral Pin PB6 (General)
Design note: Signal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32C011D6Y6TR (ST · WLCSP-12(1.4x1.7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) - 2. Standard Pinout (Top View)
True package pinout (12 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) - 4. Package Dimensions (D×E×A)
WLCSP-12(1.4x1.7) · 1.70×1.40mm · Pitch 0.35mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (12 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32C011D6Y6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) is a 12-pin embedded microcontroller unit (mcu) featuring a 1.40 × 1.70 × 0.55 mm mechanical envelope (lead pitch e = 0.35 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
1.40 × 1.70 × 0.55 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-12(1.4x1.7))
Pin Count & Lead PitchN / e
12 Pins | Pitch e = 0.35 mm (13.8 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol12 auto-grouped pins
OK
IPC-7351B Land Pattern12 pads · Pitch 0.35mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-12(1.4x1.7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
1.40 × 1.70 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.35mm
Pad Size (W × L)Level B
0.16 × 0.16 mm
Pins / Total PadsTopology
12P / 12Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-12(1.4x1.7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32C011D6Y6TR (WLCSP-12(1.4x1.7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32C011D6Y6TR (WLCSP-12(1.4x1.7))?

Manufactured by ST, the STM32C011D6Y6TR is housed in a WLCSP-12(1.4x1.7) package with 12 pins and a 0.35 mm lead pitch. Key pins include: A2 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A4 (PC15-OSCX_OUT: Multiplexed I/O & Peripheral Pin PC15-OSCX_OUT (RTC/CLK)), B1 (PA13: Multiplexed I/O & Peripheral Pin PA13 (General)), B3 (PC14-OSCX_IN: Multiplexed I/O & Peripheral Pin PC14-OSCX_IN (RTC/CLK)), C2 (PA14-BOOT0: Multiplexed I/O & Peripheral Pin PA14-BOOT0 (General)), C4 (VDD/VDDA: Power Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32C011D6Y6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32C011D6Y6TR (WLCSP-12(1.4x1.7)) has a nominal body envelope of 1.70 × 1.40 mm, pitch e = 0.35 mm, and 12 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32C011D6Y6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32C011D6Y6TR (ST, WLCSP-12(1.4x1.7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (12 pins) & STM32C011 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A2PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
A4PC15-OSCX_OUTDigital_IOSignal terminal PC15-OSCX_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSCX_OUT. Supported peripheral buses: RTC/CLK.
B1PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
B3PC14-OSCX_INDigital_IOSignal terminal PC14-OSCX_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSCX_IN. Supported peripheral buses: RTC/CLK.
C2PA14-BOOT0Digital_IOSignal terminal PA14-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14-BOOT0. Supported peripheral buses: General.
C4VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D1PA11[PA9]/PA8Digital_IOSignal terminal PA11[PA9]/PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11[PA9]/PA8. Supported peripheral buses: General.
D3PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
E2PA12[PA10]/PA7Digital_IOSignal terminal PA12[PA10]/PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12[PA10]/PA7. Supported peripheral buses: General.
E4VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
F1PA3/PA4/PA5/PA6Digital_IOSignal terminal PA3/PA4/PA5/PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3/PA4/PA5/PA6. Supported peripheral buses: General.
F3PF2-NRST/PA0/PA1/PA2Digital_IOSignal terminal PF2-NRST/PA0/PA1/PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2-NRST/PA0/PA1/PA2. Supported peripheral buses: General.
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