![STM32H7B0ABI6Q (UFBGA-169) — Figure 5. LQFP100 (STM32H7B0xB without SMPS) pinout [LQFP-100(14x14)]](/api/v1/assets/C1016344/extracted/figures/p36_fig01.png)
![STM32H7B0ABI6Q (UFBGA-169) — Figure 76. LQFP100 - Outline [LQFP-100(14x14)]](/api/v1/assets/C1016344/extracted/figures/p170_fig01.png)
![STM32H7B0ABI6Q (UFBGA-169) — Figure 77. LQFP100 - Recommended footprint [LQFP-100(14x14)]](/api/v1/assets/C1016344/extracted/figures/p171_fig01.png)
LQFP-100(14x14) · 100P
IPC-7351B
100P14.0×14.0×1.60mmP=0.5mm
STM32H7B0ABI / STM32H7B0VBT (LQFP-100(14x14))
Synchronized Pinout (Symbol / 2D / 3D) (169/169)
Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D| Pin | Symbol | Type | Function (EN) |
|---|---|---|---|
| A1 | PE4 | I/O | Multiplexed I/O & Peripheral Pin PE4 (General) |
| A2 | PE2 | I/O | Multiplexed I/O & Peripheral Pin PE2 (General) |
| A3 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| A4 | VCAP | I/O | Multiplexed I/O & Peripheral Pin VCAP (General) |
| A5 | PB6 | I/O | Multiplexed I/O & Peripheral Pin PB6 (General) |
| A6 | VDDMMC | Power | Power Supply Input (VDDMMC — 3.3V VDD (Max 4.0V)) |
| A7 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| A8 | PG10 | I/O | Multiplexed I/O & Peripheral Pin PG10 (General) |
| A9 | PD5 | I/O | Multiplexed I/O & Peripheral Pin PD5 (General) |
| A10 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| A11 | PC12 | I/O | Multiplexed I/O & Peripheral Pin PC12 (General) |
| A12 | PC10 | I/O | Multiplexed I/O & Peripheral Pin PC10 (General) |
| A13 | PH14 | I/O | Multiplexed I/O & Peripheral Pin PH14 (General) |
| B1 | PC15-OSC32_OUT | I/O | Multiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK) |
| B2 | PE3 | I/O | Multiplexed I/O & Peripheral Pin PE3 (General) |
| B3 | VSS | GND | Ground Reference Pin (VSS) |
| B4 | VDDLDO | Power | Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V)) |
| B5 | PB8 | I/O | Multiplexed I/O & Peripheral Pin PB8 (General) |
| B6 | PB4 | I/O | Multiplexed I/O & Peripheral Pin PB4 (General) |
| B7 | VSS | GND | Ground Reference Pin (VSS) |
| B8 | PG11 | I/O | Multiplexed I/O & Peripheral Pin PG11 (General) |
| B9 | PD6 | I/O | Multiplexed I/O & Peripheral Pin PD6 (General) |
| B10 | VSS | GND | Ground Reference Pin (VSS) |
| B11 | PC11 | I/O | Multiplexed I/O & Peripheral Pin PC11 (General) |
| B12 | PA14 | I/O | Multiplexed I/O & Peripheral Pin PA14 (General) |
| B13 | PH13 | I/O | Multiplexed I/O & Peripheral Pin PH13 (General) |
| C1 | PC14-OSC32_IN | I/O | Multiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK) |
| C2 | PE6 | I/O | Multiplexed I/O & Peripheral Pin PE6 (General) |
| C3 | PE5 | I/O | Multiplexed I/O & Peripheral Pin PE5 (General) |
| C4 | PDR_ON | I/O | Multiplexed I/O & Peripheral Pin PDR_ON (General) |
| C5 | PB9 | I/O | Multiplexed I/O & Peripheral Pin PB9 (General) |
| C6 | PB5 | I/O | Multiplexed I/O & Peripheral Pin PB5 (General) |
| C7 | PG14 | I/O | Multiplexed I/O & Peripheral Pin PG14 (General) |
| C8 | PG9 | I/O | Multiplexed I/O & Peripheral Pin PG9 (General) |
| C9 | PD4 | I/O | Multiplexed I/O & Peripheral Pin PD4 (General) |
| C10 | PD1 | I/O | Multiplexed I/O & Peripheral Pin PD1 (General) |
| C11 | PA15 | I/O | Multiplexed I/O & Peripheral Pin PA15 (General) |
| C12 | VSS | GND | Ground Reference Pin (VSS) |
| C13 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| D1 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| D2 | VSS | GND | Ground Reference Pin (VSS) |
| D3 | PC13 | I/O | Multiplexed I/O & Peripheral Pin PC13 (General) |
| D4 | PE1 | I/O | Multiplexed I/O & Peripheral Pin PE1 (General) |
| D5 | PE0 | I/O | Multiplexed I/O & Peripheral Pin PE0 (General) |
| D6 | PB7 | I/O | Multiplexed I/O & Peripheral Pin PB7 (General) |
| D7 | PG13 | I/O | Multiplexed I/O & Peripheral Pin PG13 (General) |
| D8 | PD7 | I/O | Multiplexed I/O & Peripheral Pin PD7 (General) |
| D9 | PD3 | I/O | Multiplexed I/O & Peripheral Pin PD3 (General) |
| D10 | PD0 | I/O | Multiplexed I/O & Peripheral Pin PD0 (General) |
| D11 | PA13 | I/O | Multiplexed I/O & Peripheral Pin PA13 (General) |
| D12 | VDDLDO | Power | Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V)) |
| D13 | VCAP | I/O | Multiplexed I/O & Peripheral Pin VCAP (General) |
| E1 | VLXSMPS | I/O | Multiplexed I/O & Peripheral Pin VLXSMPS (General) |
| E2 | VSSSMPS | GND | Ground Reference Pin (VSSSMPS) |
| E3 | VBAT | Power | Power Supply Input (VBAT — 3.3V VDD (Max 4.0V)) |
| E4 | PF1 | I/O | Multiplexed I/O & Peripheral Pin PF1 (General) |
| E5 | PF3 | I/O | Multiplexed I/O & Peripheral Pin PF3 (General) |
| E6 | BOOT0 | I | Input-Only Pin BOOT0 (General) |
| E7 | PG15 | I/O | Multiplexed I/O & Peripheral Pin PG15 (General) |
| E8 | PG12 | I/O | Multiplexed I/O & Peripheral Pin PG12 (General) |
| E9 | PD2 | I/O | Multiplexed I/O & Peripheral Pin PD2 (General) |
| E10 | PA10 | I/O | Multiplexed I/O & Peripheral Pin PA10 (General) |
| E11 | PA9 | I/O | Multiplexed I/O & Peripheral Pin PA9 (General) |
| E12 | PA8 | I/O | Multiplexed I/O & Peripheral Pin PA8 (General) |
| E13 | PA12 | I/O | Multiplexed I/O & Peripheral Pin PA12 (General) |
| F1 | VDDSMPS | Power | Power Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V)) |
| F2 | VFBSMPS | I/O | Multiplexed I/O & Peripheral Pin VFBSMPS (General) |
| F3 | PF0 | I/O | Multiplexed I/O & Peripheral Pin PF0 (General) |
| F4 | PF2 | I/O | Multiplexed I/O & Peripheral Pin PF2 (General) |
| F5 | PF5 | I/O | Multiplexed I/O & Peripheral Pin PF5 (General) |
| F6 | PF7 | I/O | Multiplexed I/O & Peripheral Pin PF7 (General) |
| F7 | PB3 | I/O | Multiplexed I/O & Peripheral Pin PB3 (General) |
| F8 | PG4 | I/O | Multiplexed I/O & Peripheral Pin PG4 (General) |
| F9 | PC6 | I/O | Multiplexed I/O & Peripheral Pin PC6 (General) |
| F10 | PC7 | I/O | Multiplexed I/O & Peripheral Pin PC7 (General) |
| F11 | PC9 | I/O | Multiplexed I/O & Peripheral Pin PC9 (General) |
| F12 | PC8 | I/O | Multiplexed I/O & Peripheral Pin PC8 (General) |
| F13 | PA11 | I/O | Multiplexed I/O & Peripheral Pin PA11 (General) |
| G1 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| G2 | VSS | GND | Ground Reference Pin (VSS) |
| G3 | PF4 | I/O | Multiplexed I/O & Peripheral Pin PF4 (General) |
| G4 | PF6 | I/O | Multiplexed I/O & Peripheral Pin PF6 (General) |
| G5 | PF9 | I/O | Multiplexed I/O & Peripheral Pin PF9 (General) |
| G6 | NRST | I | System Enable & Hardware Reset (NRST) |
| G7 | PF13 | I/O | Multiplexed I/O & Peripheral Pin PF13 (General) |
| G8 | PE7 | I/O | Multiplexed I/O & Peripheral Pin PE7 (General) |
| G9 | PG6 | I/O | Multiplexed I/O & Peripheral Pin PG6 (General) |
| G10 | PG7 | I/O | Multiplexed I/O & Peripheral Pin PG7 (General) |
| G11 | PG8 | I/O | Multiplexed I/O & Peripheral Pin PG8 (General) |
| G12 | VDD50_USB | Power | Power Supply Input (VDD50_USB — 3.3V VDD (Max 4.0V)) |
| G13 | VDD33_USB | Power | Power Supply Input (VDD33_USB — 3.3V VDD (Max 4.0V)) |
| H1 | PH0-OSC_IN | I/O | Multiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK) |
| H2 | PH1-OSC_OUT | I/O | Multiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK) |
| H3 | PF10 | I/O | Multiplexed I/O & Peripheral Pin PF10 (General) |
| H4 | PF8 | I/O | Multiplexed I/O & Peripheral Pin PF8 (General) |
| H5 | PC2 | I/O | Multiplexed I/O & Peripheral Pin PC2 (General) |
| H6 | PA4 | I/O | Multiplexed I/O & Peripheral Pin PA4 (General) |
| H7 | PF14 | I/O | Multiplexed I/O & Peripheral Pin PF14 (General) |
| H8 | PE8 | I/O | Multiplexed I/O & Peripheral Pin PE8 (General) |
| H9 | PG2 | I/O | Multiplexed I/O & Peripheral Pin PG2 (General) |
| H10 | PG3 | I/O | Multiplexed I/O & Peripheral Pin PG3 (General) |
| H11 | PG5 | I/O | Multiplexed I/O & Peripheral Pin PG5 (General) |
| H12 | VSS | GND | Ground Reference Pin (VSS) |
| H13 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| J1 | PC0 | I/O | Multiplexed I/O & Peripheral Pin PC0 (General) |
| J2 | PC1 | I/O | Multiplexed I/O & Peripheral Pin PC1 (General) |
| J3 | VSSA | GND | Ground Reference Pin (VSSA) |
| J4 | PJ0 | I/O | Multiplexed I/O & Peripheral Pin PJ0 (General) |
| J5 | PA0 | I/O | Multiplexed I/O & Peripheral Pin PA0 (General) |
| J6 | PA7 | I/O | Multiplexed I/O & Peripheral Pin PA7 (General) |
| J7 | PF15 | I/O | Multiplexed I/O & Peripheral Pin PF15 (General) |
| J8 | PE9 | I/O | Multiplexed I/O & Peripheral Pin PE9 (General) |
| J9 | PE14 | I/O | Multiplexed I/O & Peripheral Pin PE14 (General) |
| J10 | PD11 | I/O | Multiplexed I/O & Peripheral Pin PD11 (General) |
| J11 | PD13 | I/O | Multiplexed I/O & Peripheral Pin PD13 (General) |
| J12 | PD15 | I/O | Multiplexed I/O & Peripheral Pin PD15 (General) |
| J13 | PD14 | I/O | Multiplexed I/O & Peripheral Pin PD14 (General) |
| K1 | PC3_C | I/O | Multiplexed I/O & Peripheral Pin PC3_C (General) |
| K2 | PC2_C | I/O | Multiplexed I/O & Peripheral Pin PC2_C (General) |
| K3 | PA0_C | I/O | Multiplexed I/O & Peripheral Pin PA0_C (General) |
| K4 | PA1 | I/O | Multiplexed I/O & Peripheral Pin PA1 (General) |
| K5 | PA6 | I/O | Multiplexed I/O & Peripheral Pin PA6 (General) |
| K6 | PC4 | I/O | Multiplexed I/O & Peripheral Pin PC4 (General) |
| K7 | PG0 | I/O | Multiplexed I/O & Peripheral Pin PG0 (General) |
| K8 | PE13 | I/O | Multiplexed I/O & Peripheral Pin PE13 (General) |
| K9 | PH10 | I/O | Multiplexed I/O & Peripheral Pin PH10 (General) |
| K10 | PH12 | I/O | Multiplexed I/O & Peripheral Pin PH12 (General) |
| K11 | PD9 | I/O | Multiplexed I/O & Peripheral Pin PD9 (General) |
| K12 | PD10 | I/O | Multiplexed I/O & Peripheral Pin PD10 (General) |
| K13 | PD12 | I/O | Multiplexed I/O & Peripheral Pin PD12 (General) |
| L1 | VDDA | Power | Power Supply Input (VDDA — 3.3V VDD (Max 4.0V)) |
| L2 | VREF+ | Analog | Multiplexed I/O & Peripheral Pin VREF+ (General) |
| L3 | PA1_C | I/O | Multiplexed I/O & Peripheral Pin PA1_C (General) |
| L4 | PA5 | I/O | Multiplexed I/O & Peripheral Pin PA5 (General) |
| L5 | PB1 | I/O | Multiplexed I/O & Peripheral Pin PB1 (General) |
| L6 | PB2 | I/O | Multiplexed I/O & Peripheral Pin PB2 (General) |
| L7 | PG1 | I/O | Multiplexed I/O & Peripheral Pin PG1 (General) |
| L8 | PE12 | I/O | Multiplexed I/O & Peripheral Pin PE12 (General) |
| L9 | PB10 | I/O | Multiplexed I/O & Peripheral Pin PB10 (General) |
| L10 | PH11 | I/O | Multiplexed I/O & Peripheral Pin PH11 (General) |
| L11 | PB13 | I/O | Multiplexed I/O & Peripheral Pin PB13 (General) |
| L12 | VSS | GND | Ground Reference Pin (VSS) |
| L13 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| M1 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| M2 | VSS | GND | Ground Reference Pin (VSS) |
| M3 | PH3 | I/O | Multiplexed I/O & Peripheral Pin PH3 (General) |
| M4 | VSS | GND | Ground Reference Pin (VSS) |
| M5 | PB0 | I/O | Multiplexed I/O & Peripheral Pin PB0 (General) |
| M6 | PF11 | I/O | Multiplexed I/O & Peripheral Pin PF11 (General) |
| M7 | VSS | GND | Ground Reference Pin (VSS) |
| M8 | PE10 | I/O | Multiplexed I/O & Peripheral Pin PE10 (General) |
| M9 | PB11 | I/O | Multiplexed I/O & Peripheral Pin PB11 (General) |
| M10 | VDDLDO | Power | Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V)) |
| M11 | VSS | GND | Ground Reference Pin (VSS) |
| M12 | PD8 | I/O | Multiplexed I/O & Peripheral Pin PD8 (General) |
| M13 | PB15 | I/O | Multiplexed I/O & Peripheral Pin PB15 (General) |
| N1 | PA2 | I/O | Multiplexed I/O & Peripheral Pin PA2 (General) |
| N2 | PH2 | I/O | Multiplexed I/O & Peripheral Pin PH2 (General) |
| N3 | PA3 | I/O | Multiplexed I/O & Peripheral Pin PA3 (General) |
| N4 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| N5 | PC5 | I/O | Multiplexed I/O & Peripheral Pin PC5 (General) |
| N6 | PF12 | I/O | Multiplexed I/O & Peripheral Pin PF12 (General) |
| N7 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| N8 | PE11 | I/O | Multiplexed I/O & Peripheral Pin PE11 (General) |
| N9 | PE15 | I/O | Multiplexed I/O & Peripheral Pin PE15 (General) |
| N10 | VCAP | I/O | Multiplexed I/O & Peripheral Pin VCAP (General) |
| N11 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| N12 | PB12 | I/O | Multiplexed I/O & Peripheral Pin PB12 (General) |
| N13 | PB14 | I/O | Multiplexed I/O & Peripheral Pin PB14 (General) |
PIN A1 PE4
I/OMultiplexed I/O & Peripheral Pin PE4 (General)
Design note: Signal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner
Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)
Read the original datasheet PDF directly or click any drawing to view fullscreen1. Realistic 3D PackageREPRESENTATIVE
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
True package pinout (169 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
UFBGA-169 · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
IPC-7351B Footprint (169 Pads)Expand ›
6. Application SchematicSCHEMATIC
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32H7B0ABI / STM32H7B0VBT
P1 · p01_fig01EXACT PACKAGE
P179 · p179_fig01EXACT PACKAGE
P180 · p180_fig01EXACT PACKAGE
P180 · p180_fig02EXACT PACKAGE
P181 · p181_fig01EXACT PACKAGE
P35 · p35_fig011726×1381px
P41 · p41_fig011930×629px
P63 · p63_fig011500×2357px
P92 · p92_fig011371×460px
P36 · p36_fig01EXACT PACKAGE
P170 · p170_fig01EXACT PACKAGE
P171 · p171_fig01EXACT PACKAGE
Page 1 / 2 (13 extracted figures)
Technical Specifications & Part Details (STM32H7B0ABI6Q)
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)Detailed Overview:STM32H7B0ABI6Q (UFBGA-169) is a 169-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.50 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
280 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.50 mm (A1=0.20 mm)
Package family: BGA (UFBGA-169)
Pin Count & Lead PitchN / e
169 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.
5-Point Standards Verification
Automated compliance checks prior to exportIEEE-315 Symbol169 auto-grouped pins
IPC-7351B Land Pattern169 pads · Pitch 0.50mm
IPC-7525 60% Solder PasteReflow 1:1 Standard
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
Hardware Verification & Community Engineering Reviews
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet5.00 PCB Verified
IPC-7351B
Select package variant or sibling MPN sharing this datasheetFamily Variants & Same Datasheet Chips — STM32H7B0ABI / STM32H7B0VBT (2)
UFBGA-169 · 169P
Mechanical Dimensions & Land Pattern (UFBGA-169)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.50mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
169P / 169Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit UFBGA-169 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32H7B0ABI6Q (UFBGA-169)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32H7B0ABI6Q (UFBGA-169)?
Manufactured by ST, the STM32H7B0ABI6Q is housed in a UFBGA-169 package with 169 pins and a 0.50 mm lead pitch. Key pins include: A1 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), A2 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), A3 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A4 (VCAP: Multiplexed I/O & Peripheral Pin VCAP (General)), A5 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A6 (VDDMMC: Power Supply Input (VDDMMC — 3.3V VDD (Max 4.0V))).
What are the IPC-7351B PCB Footprint dimensions for STM32H7B0ABI6Q?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H7B0ABI6Q (UFBGA-169) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 169 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H7B0ABI6Q?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H7B0ABI6Q (ST, UFBGA-169) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (169 pins) & STM32H7B0ABI / STM32H7B0VBT Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General. |
| A2 | PE2 | Digital_IO | Signal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General. |
| A3 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A4 | VCAP | Digital_IO | Signal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General. |
| A5 | PB6 | Digital_IO | Signal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General. |
| A6 | VDDMMC | Power_In | Primary positive power supply input (VDDMMC) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A7 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A8 | PG10 | Digital_IO | Signal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General. |
| A9 | PD5 | Digital_IO | Signal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General. |
| A10 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A11 | PC12 | Digital_IO | Signal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General. |
| A12 | PC10 | Digital_IO | Signal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General. |
| A13 | PH14 | Digital_IO | Signal terminal PH14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: General. |
| B1 | PC15-OSC32_OUT | Digital_IO | Signal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK. |
| B2 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General. |
| B3 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B4 | VDDLDO | Power_In | Primary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B5 | PB8 | Digital_IO | Signal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General. |
| B6 | PB4 | Digital_IO | Signal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General. |
| B7 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B8 | PG11 | Digital_IO | Signal terminal PG11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General. |
| B9 | PD6 | Digital_IO | Signal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General. |
| B10 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B11 | PC11 | Digital_IO | Signal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General. |
| B12 | PA14 | Digital_IO | Signal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General. |
| B13 | PH13 | Digital_IO | Signal terminal PH13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: General. |
| C1 | PC14-OSC32_IN | Digital_IO | Signal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK. |
| C2 | PE6 | Digital_IO | Signal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General. |
| C3 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General. |
| C4 | PDR_ON | Digital_IO | Signal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General. |
| C5 | PB9 | Digital_IO | Signal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General. |
| C6 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General. |
| C7 | PG14 | Digital_IO | Signal terminal PG14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: General. |
| C8 | PG9 | Digital_IO | Signal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General. |
| C9 | PD4 | Digital_IO | Signal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General. |
| C10 | PD1 | Digital_IO | Signal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General. |
| C11 | PA15 | Digital_IO | Signal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General. |
| C12 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| C13 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D1 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D2 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D3 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General. |
| D4 | PE1 | Digital_IO | Signal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General. |
| D5 | PE0 | Digital_IO | Signal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General. |
| D6 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General. |
| D7 | PG13 | Digital_IO | Signal terminal PG13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: General. |
| D8 | PD7 | Digital_IO | Signal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General. |
| D9 | PD3 | Digital_IO | Signal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General. |
| D10 | PD0 | Digital_IO | Signal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General. |
| D11 | PA13 | Digital_IO | Signal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General. |
| D12 | VDDLDO | Power_In | Primary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D13 | VCAP | Digital_IO | Signal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General. |
| E1 | VLXSMPS | Digital_IO | Signal terminal VLXSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSMPS. Supported peripheral buses: General. |
| E2 | VSSSMPS | GND | 0V electrical ground return terminal (VSSSMPS) for internal core logic, I/O drivers, and analog sub-blocks. |
| E3 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| E4 | PF1 | Digital_IO | Signal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General. |
| E5 | PF3 | Digital_IO | Signal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General. |
| E6 | BOOT0 | Digital_IO | Signal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General. |
| E7 | PG15 | Digital_IO | Signal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General. |
| E8 | PG12 | Digital_IO | Signal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General. |
| E9 | PD2 | Digital_IO | Signal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General. |
| E10 | PA10 | Digital_IO | Signal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General. |
| E11 | PA9 | Digital_IO | Signal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General. |
| E12 | PA8 | Digital_IO | Signal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General. |