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STM32H7B0ABI6Q (UFBGA-169) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32H7B0ABI6Q

STID: C1236646UFBGA-169 · 169 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32H7B0ABI6Q (UFBGA-169)A1PE4A2PE2A3VDDA4VCAPA5PB6A6VDDMMCA7VDDA8PG10A9PD5A10VDDA11PC12A12PC10A13PH14B1PC15-OSC32_OB2PE3B3VSSB4VDDLDOB5PB8B6PB4B7VSSB8PG11B9PD6B10VSSB11PC11B12PA14B13PH13C1PC14-OSC32_IC2PE6C3PE5C4PDR_ONC5PB9C6PB5C7PG14C8PG9C9PD4C10PD1C11PA15C12VSSC13VDDD1VDDD2VSSD3PC13D4PE1D5PE0D6PB7D7PG13D8PD7D9PD3D10PD0D11PA13D12VDDLDOD13VCAPE1VLXSMPSE2VSSSMPSE3VBATE4PF1E5PF3E6BOOT0E7PG15E8PG12E9PD2E10PA10E11PA9E12PA8E13PA12F1VDDSMPSF2VFBSMPSF3PF0F4PF2F5PF5F6PF7F7PB3F8PG4F9PC6F10PC7F11PC9F12PC8F13PA11G1VDDG2VSSG3PF4G4PF6G5PF9G6NRSTG7PF13N13PB14N12PB12N11VDDN10VCAPN9PE15N8PE11N7VDDN6PF12N5PC5N4VDDN3PA3N2PH2N1PA2M13PB15M12PD8M11VSSM10VDDLDOM9PB11M8PE10M7VSSM6PF11M5PB0M4VSSM3PH3M2VSSM1VDDL13VDDL12VSSL11PB13L10PH11L9PB10L8PE12L7PG1L6PB2L5PB1L4PA5L3PA1_CL2VREF+L1VDDAK13PD12K12PD10K11PD9K10PH12K9PH10K8PE13K7PG0K6PC4K5PA6K4PA1K3PA0_CK2PC2_CK1PC3_CJ13PD14J12PD15J11PD13J10PD11J9PE14J8PE9J7PF15J6PA7J5PA0J4PJ0J3VSSAJ2PC1J1PC0H13VDDH12VSSH11PG5H10PG3H9PG2H8PE8H7PF14H6PA4H5PC2H4PF8H3PF10H2PH1-OSC_OUTH1PH0-OSC_ING13VDD33_USBG12VDD50_USBG11PG8G10PG7G9PG6G8PE7Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1A2B2C2D2E2F2G2H2J2K2L2M2N2A3B3C3D3E3F3G3H3J3K3L3M3N3A4B4C4D4E4F4G4H4J4K4L4M4N4A5B5C5D5E5F5G5H5J5K5L5M5N5A6B6C6D6E6F6G6H6J6K6L6M6N6A7B7C7D7E7F7G7H7J7K7L7M7N7A8B8C8D8E8F8G8H8J8K8L8M8N8A9B9C9D9E9F9G9H9J9K9L9M9N9A10B10C10D10E10F10G10H10J10K10L10M10N10A11B11C11D11E11F11G11H11J11K11L11M11N11A12B12C12D12E12F12G12H12J12K12L12M12N12A13B13C13D13E13F13G13H13J13K13L13M13N13E=7.00mm · Pitch e=0.50mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (169/169)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
A2PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
A3VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A4VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
A5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
A6VDDMMCPowerPower Supply Input (VDDMMC — 3.3V VDD (Max 4.0V))
A7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A8PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
A9PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
A10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A11PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
A12PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
A13PH14I/OMultiplexed I/O & Peripheral Pin PH14 (General)
B1PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
B2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
B3VSSGNDGround Reference Pin (VSS)
B4VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
B5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
B6PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
B7VSSGNDGround Reference Pin (VSS)
B8PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
B9PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
B10VSSGNDGround Reference Pin (VSS)
B11PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
B12PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
B13PH13I/OMultiplexed I/O & Peripheral Pin PH13 (General)
C1PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
C2PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
C3PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
C4PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
C5PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
C6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
C7PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
C8PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
C9PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
C10PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
C11PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
C12VSSGNDGround Reference Pin (VSS)
C13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D2VSSGNDGround Reference Pin (VSS)
D3PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
D4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
D5PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
D6PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
D7PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
D8PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
D9PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
D10PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
D11PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
D12VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
D13VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
E1VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
E2VSSSMPSGNDGround Reference Pin (VSSSMPS)
E3VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
E4PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
E5PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
E6BOOT0IInput-Only Pin BOOT0 (General)
E7PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
E8PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
E9PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
E10PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
E11PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
E12PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
E13PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
F1VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
F2VFBSMPSI/OMultiplexed I/O & Peripheral Pin VFBSMPS (General)
F3PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
F4PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
F5PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
F6PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
F7PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
F8PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
F9PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
F10PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
F11PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
F12PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
F13PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
G1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G2VSSGNDGround Reference Pin (VSS)
G3PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
G4PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
G5PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
G6NRSTISystem Enable & Hardware Reset (NRST)
G7PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
G8PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
G9PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
G10PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
G11PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
G12VDD50_USBPowerPower Supply Input (VDD50_USB — 3.3V VDD (Max 4.0V))
G13VDD33_USBPowerPower Supply Input (VDD33_USB — 3.3V VDD (Max 4.0V))
H1PH0-OSC_INI/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK)
H2PH1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK)
H3PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
H4PF8I/OMultiplexed I/O & Peripheral Pin PF8 (General)
H5PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
H6PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
H7PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
H8PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
H9PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
H10PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
H11PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
H12VSSGNDGround Reference Pin (VSS)
H13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J1PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
J2PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
J3VSSAGNDGround Reference Pin (VSSA)
J4PJ0I/OMultiplexed I/O & Peripheral Pin PJ0 (General)
J5PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
J6PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
J7PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
J8PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
J9PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
J10PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
J11PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
J12PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
J13PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
K1PC3_CI/OMultiplexed I/O & Peripheral Pin PC3_C (General)
K2PC2_CI/OMultiplexed I/O & Peripheral Pin PC2_C (General)
K3PA0_CI/OMultiplexed I/O & Peripheral Pin PA0_C (General)
K4PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
K5PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
K6PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
K7PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
K8PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
K9PH10I/OMultiplexed I/O & Peripheral Pin PH10 (General)
K10PH12I/OMultiplexed I/O & Peripheral Pin PH12 (General)
K11PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
K12PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
K13PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
L1VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
L2VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
L3PA1_CI/OMultiplexed I/O & Peripheral Pin PA1_C (General)
L4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
L5PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
L6PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
L7PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
L8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
L9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
L10PH11I/OMultiplexed I/O & Peripheral Pin PH11 (General)
L11PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
L12VSSGNDGround Reference Pin (VSS)
L13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M2VSSGNDGround Reference Pin (VSS)
M3PH3I/OMultiplexed I/O & Peripheral Pin PH3 (General)
M4VSSGNDGround Reference Pin (VSS)
M5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
M6PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
M7VSSGNDGround Reference Pin (VSS)
M8PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
M9PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
M10VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
M11VSSGNDGround Reference Pin (VSS)
M12PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
M13PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
N1PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
N2PH2I/OMultiplexed I/O & Peripheral Pin PH2 (General)
N3PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
N4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N5PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
N6PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
N7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N8PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
N9PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
N10VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
N11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N12PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
N13PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
PIN A1 PE4
I/O
Multiplexed I/O & Peripheral Pin PE4 (General)
Design note: Signal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32H7B0ABI6Q (ST · UFBGA-169)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32H7B0ABI6Q (UFBGA-169) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32H7B0ABI6Q (UFBGA-169) - 2. Standard Pinout (Top View)
True package pinout (169 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32H7B0ABI6Q (UFBGA-169) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32H7B0ABI6Q (UFBGA-169) - 4. Package Dimensions (D×E×A)
UFBGA-169 · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32H7B0ABI6Q (UFBGA-169) - 5. Recommended Land Pattern
IPC-7351B Footprint (169 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32H7B0ABI6Q (UFBGA-169) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32H7B0VBT / STM32H7B0ABI
P1 · p01_fig01EXACT PACKAGE
STM32H7B0ABI6Q (UFBGA-169) — LQFP64 (10 x 10 mm) | LQFP100 (14 x 14 mm) | LQFP144 (20x20 mm) | LQFP176 (24 x 24 mm) | UFBGA169 | (7 x 7 mm) UFBGA176+25 | (10x10 mm) | FBGA | Features | Includes ST state-of-the-art patented technology | Core | Memories | 32-bit Arm® Cor
LQFP64 (10 x 10 mm) | LQFP100 (14 x 14 mm) | LQFP144 (20x20 mm) | LQFP176 (24 x 24 mm) | UFBGA169 | (7 x 7 mm) UFBGA176+25 | (10x10 mm) | FBGA | Features | Includes ST state-of-the-art patented technology | Core | Memories | 32-bit Arm® Cor
P179 · p179_fig01EXACT PACKAGE
STM32H7B0ABI6Q (UFBGA-169) — Figure 85. UFBGA169 - Outline
Figure 85. UFBGA169 - Outline
P180 · p180_fig01EXACT PACKAGE
STM32H7B0ABI6Q (UFBGA-169) — A1 - - 0.110 - - 0.0043
A1 - - 0.110 - - 0.0043
P180 · p180_fig02EXACT PACKAGE
STM32H7B0ABI6Q (UFBGA-169) — Figure 86. UFBGA169 - Recommended footprint
Figure 86. UFBGA169 - Recommended footprint
P181 · p181_fig01EXACT PACKAGE
STM32H7B0ABI6Q (UFBGA-169) — Figure 87. UFBGA169 marking example (package top view)
Figure 87. UFBGA169 marking example (package top view)
P35 · p35_fig011726×1381px
STM32H7B0ABI6Q (UFBGA-169) — Figure 4. LQFP64 (STM32H7B0xB without SMPS) pinout
Figure 4. LQFP64 (STM32H7B0xB without SMPS) pinout
P41 · p41_fig011930×629px
STM32H7B0ABI6Q (UFBGA-169) — B2 B2 - 2 2 2 PE3 I/O FT_h2 TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX, FMC_A19, EVENTOUT -
B2 B2 - 2 2 2 PE3 I/O FT_h2 TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX, FMC_A19, EVENTOUT -
P41 · p41_fig01P41
STM32H7B0ABI6Q (UFBGA-169) — Datasheet Page 41 (p41_fig01)
Datasheet Page 41 (p41_fig01)
P63 · p63_fig011500×2357px
STM32H7B0ABI6Q (UFBGA-169) — Figure 12. Power supply scheme
Figure 12. Power supply scheme
P63 · p63_fig01P63
STM32H7B0ABI6Q (UFBGA-169) — Datasheet Page 63 (p63_fig01)
Datasheet Page 63 (p63_fig01)
P92 · p92_fig011371×460px
STM32H7B0ABI6Q (UFBGA-169) — Figure 23. Typical application with an 8 MHz crystal
Figure 23. Typical application with an 8 MHz crystal
P179 · p179_fig01P179
STM32H7B0ABI6Q (UFBGA-169) — Datasheet Page 179 (p179_fig01)
Datasheet Page 179 (p179_fig01)
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32H7B0ABI6Q)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32H7B0ABI6Q (UFBGA-169) is a 169-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.50 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
280 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.50 mm (A1=0.20 mm)
Package family: BGA (UFBGA-169)
Pin Count & Lead PitchN / e
169 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol169 auto-grouped pins
OK
IPC-7351B Land Pattern169 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-169)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.50mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
169P / 169Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-169
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H7B0ABI6Q (UFBGA-169)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H7B0ABI6Q (UFBGA-169)?

Manufactured by ST, the STM32H7B0ABI6Q is housed in a UFBGA-169 package with 169 pins and a 0.50 mm lead pitch. Key pins include: A1 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), A2 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), A3 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A4 (VCAP: Multiplexed I/O & Peripheral Pin VCAP (General)), A5 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A6 (VDDMMC: Power Supply Input (VDDMMC — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32H7B0ABI6Q?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H7B0ABI6Q (UFBGA-169) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 169 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H7B0ABI6Q?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H7B0ABI6Q (ST, UFBGA-169) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (169 pins) & STM32H7B0VBT / STM32H7B0ABI Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
A2PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
A3VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A4VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
A5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
A6VDDMMCPower_InPrimary positive power supply input (VDDMMC) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A8PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
A9PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
A10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A11PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
A12PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
A13PH14Digital_IOSignal terminal PH14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: General.
B1PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
B2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
B3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B4VDDLDOPower_InPrimary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B6PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B8PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General.
B9PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
B10VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B11PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
B12PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
B13PH13Digital_IOSignal terminal PH13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: General.
C1PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
C2PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
C3PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
C4PDR_ONDigital_IOSignal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General.
C5PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
C6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
C7PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: General.
C8PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General.
C9PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
C10PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
C11PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
C12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C13VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D3PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
D4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
D5PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
D6PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
D7PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: General.
D8PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
D9PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
D10PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
D11PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
D12VDDLDOPower_InPrimary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D13VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
E1VLXSMPSDigital_IOSignal terminal VLXSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSMPS. Supported peripheral buses: General.
E2VSSSMPSGND0V electrical ground return terminal (VSSSMPS) for internal core logic, I/O drivers, and analog sub-blocks.
E3VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E4PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
E5PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
E6BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
E7PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General.
E8PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General.
E9PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
E10PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
E11PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
E12PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
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