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STM32H725IEK6 (UFBGA-201) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32H725IEK6

STID: C730149UFBGA-201 · 201 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32H725IEK6 (UFBGA-201)A1VSSA2PB8A3VDDLDOA4VCAPA5PB6A6PB3(JTDO/ TRA7PG11A8PG9A9PD3A10PD1A11PA15(JTDI)A12PA14(JTC K/SA13VDDLDOA14VCAPA15VSSB1PE4B2PE3B3PB9B4PE0B5PB7B6PB4(NJTR ST)B7PG13B8PD7B9PD5B10PD2B11PC12B12PH14B13PA13(JTM S/ B14PA8B15PA12C1PC13C2VSSC3PE2C4PE1C5BOOT0C6PB5C7PG14C8PG10C9PD4C10PD0C11PC11C12PC10C13PH13C14PA10C15PA11D1PC15 - OSC32D2PC14 - OSC32D3PE5D4PDR_OND5VDDD6VSSD7PG15D8PG12D9PD6D10VSSD11VDDD12PH15D13PA9D14PC8D15PC7E1VSSE2VBATE3PE6E4VDDE12VDDE13PC9E14PC6E15VDD50US BF1VLXSMPSF2VSSSMPSF3PF1F4PF0F6VSSF7VSSF8VSSF9VSSF10VSSF12VSSF13VDD33US BF14PG6F15PG5G1VDDSMPSG2VFBSMPSG3PF2G4VDDG6VSSG7VSSG8VSSG9VSSG10VSSG12PG8G13PG7G14PG4G15PG2H1PF6H2PF4H3PF5H4PF3H6VSSH7VSSH8VSSR15VSSR14VDDLDOR13VCAPR12PE11R11PE9R10PF14R9PE10R8PB0R7PA6R6PC4R5PH5R4PH3R3PA0_CR2PA2R1VSSP15PH6P14PE15P13PE13P12PE12P11PF12P10PB11P9PE7P8PG0P7PB2P6PA5P5PA4P4PH4P3PA1_CP2PA1P1PA0N15PH12N14PH10N13PH8N12PB10N11PF13N10PF15N9PG1N8PE8N7PF11N6PA7N5PA3N4PH2N3VSSAN2PC3_CN1PC2_CM15PB12M14PH9M13PH11M12PE14M11PH7M10VSSM9VDDM8PB1M7PC5M6VSSM5VDDM4VDDAM3VREF+M2PC3M1PC2L15PB13L14PD8L13PD10L12VDDL4VREF -L3PC1L2PC0L1NRSTK15PB14K14PB15K13PD9K12VSSK10VSSK9VSSK8VSSK7VSSK6VSSK4VDDK3PF10K2VSSK1PH1 - OSC_OUJ15PD12J14VSSJ13PD11J12PD15J10VSSJ9VSSJ8VSSJ7VSSJ6VSSJ4PF9J3PF7J2PF8J1PH0 - OSC_INH15PD13H14PD14H13PG3H12VDDH10VSSH9VSSGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8134.6129.5124.5119.4114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3-119.4-124.5-129.5-134.6mm
2. 2D FOOTPRINT
R15R14R13R12R11R10R9R8R7R6R5R4R3R2R1P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1N15N14N13N12N11N10N9N8N7N6N5N4N3N2N1M15M14M13M12M11M10M9M8M7M6M5M4M3M2M1L15L14L13L12L4L3L2L1K15K14K13K12K10K9K8K7K6K4K3K2K1J15J14J13J12J10J9J8J7J6J4J3J2J1H15H14H13H12H10H9H8H7H6H4H3H2H1G15G14G13G12G10G9G8G7G6G4G3G2G1F15F14F13F12F10F9F8F7F6F4F3F2F1E15E14E13E12E4E3E2E1D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1C15C14C13C12C11C10C9C8C7C6C5C4C3C2C1B15B14B13B12B11B10B9B8B7B6B5B4B3B2B1A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1E=10.00mm · Pitch e=0.65mmD=10.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (201/201)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VSSGNDGround Reference Pin (VSS)
A2PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, I2C, PWM)
A3VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
A4VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
A5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C, PWM)
A6PB3(JTDO/ TRACES WO)I/OMultiplexed I/O & Peripheral Pin PB3(JTDO/ TRACES WO) (UART, SPI, PWM, SWD/JTAG)
A7PG11I/OMultiplexed I/O & Peripheral Pin PG11 (UART, SPI)
A8PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART, SPI)
A9PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
A10PD1I/OMultiplexed I/O & Peripheral Pin PD1 (UART)
A11PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (UART, SPI, SWD/JTAG)
A12PA14(JTC K/SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14(JTC K/SWCLK) (SWD/JTAG)
A13VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
A14VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
A15VSSGNDGround Reference Pin (VSS)
B1PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI)
B2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (UART)
B3PB9I/OMultiplexed I/O & Peripheral Pin PB9 (UART, SPI, I2C, PWM)
B4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (UART)
B5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C, PWM)
B6PB4(NJTR ST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTR ST) (UART, SPI, PWM, SWD/JTAG)
B7PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, SPI)
B8PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART, SPI)
B9PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
B10PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
B11PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI, I2C)
B12PH14I/OMultiplexed I/O & Peripheral Pin PH14 (UART, PWM)
B13PA13(JTM S/ SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(JTM S/ SWDIO) (SWD/JTAG)
B14PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, I2C, RTC/CLK)
B15PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, SPI)
C1PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
C2VSSGNDGround Reference Pin (VSS)
C3PE2I/OMultiplexed I/O & Peripheral Pin PE2 (UART, SPI)
C4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (UART)
C5BOOT0IInput-Only Pin BOOT0 (General)
C6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM)
C7PG14I/OMultiplexed I/O & Peripheral Pin PG14 (UART, SPI)
C8PG10I/OMultiplexed I/O & Peripheral Pin PG10 (SPI)
C9PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART)
C10PD0I/OMultiplexed I/O & Peripheral Pin PD0 (UART)
C11PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI, I2C)
C12PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI, I2C)
C13PH13I/OMultiplexed I/O & Peripheral Pin PH13 (UART, PWM)
C14PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, PWM)
C15PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
D1PC15 - OSC32_ OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_ OUT (RTC/CLK)
D2PC14 - OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (RTC/CLK)
D3PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
D4PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
D5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D6VSSGNDGround Reference Pin (VSS)
D7PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART, SPI)
D8PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI)
D9PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, SPI, I2C)
D10VSSGNDGround Reference Pin (VSS)
D11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D12PH15I/OMultiplexed I/O & Peripheral Pin PH15 (PWM)
D13PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, I2C, PWM)
D14PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, PWM)
D15PC7I/OMultiplexed I/O & Peripheral Pin PC7 (UART, PWM)
E1VSSGNDGround Reference Pin (VSS)
E2VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
E3PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI, I2C)
E4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E12VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E13PC9I/OMultiplexed I/O & Peripheral Pin PC9 (UART, I2C, PWM, RTC/CLK)
E14PC6I/OMultiplexed I/O & Peripheral Pin PC6 (UART, PWM)
E15VDD50US BPowerPower Supply Input (VDD50US B — 3.3V VDD (Max 4.0V))
F1VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
F2VSSSMPSGNDGround Reference Pin (VSSSMPS)
F3PF1I/OMultiplexed I/O & Peripheral Pin PF1 (I2C)
F4PF0I/OMultiplexed I/O & Peripheral Pin PF0 (I2C)
F6VSSGNDGround Reference Pin (VSS)
F7VSSGNDGround Reference Pin (VSS)
F8VSSGNDGround Reference Pin (VSS)
F9VSSGNDGround Reference Pin (VSS)
F10VSSGNDGround Reference Pin (VSS)
F12VSSGNDGround Reference Pin (VSS)
F13VDD33US BPowerPower Supply Input (VDD33US B — 3.3V VDD (Max 4.0V))
F14PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
F15PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
G1VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
G2VFBSMPSI/OMultiplexed I/O & Peripheral Pin VFBSMPS (General)
G3PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
G4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G6VSSGNDGround Reference Pin (VSS)
G7VSSGNDGround Reference Pin (VSS)
G8VSSGNDGround Reference Pin (VSS)
G9VSSGNDGround Reference Pin (VSS)
G10VSSGNDGround Reference Pin (VSS)
G12PG8I/OMultiplexed I/O & Peripheral Pin PG8 (UART, SPI)
G13PG7I/OMultiplexed I/O & Peripheral Pin PG7 (UART)
G14PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
G15PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
H1PF6I/OMultiplexed I/O & Peripheral Pin PF6 (UART, SPI, ADC)
H2PF4I/OMultiplexed I/O & Peripheral Pin PF4 (ADC)
H3PF5I/OMultiplexed I/O & Peripheral Pin PF5 (ADC)
H4PF3I/OMultiplexed I/O & Peripheral Pin PF3 (ADC)
H6VSSGNDGround Reference Pin (VSS)
H7VSSGNDGround Reference Pin (VSS)
H8VSSGNDGround Reference Pin (VSS)
H9VSSGNDGround Reference Pin (VSS)
H10VSSGNDGround Reference Pin (VSS)
H12VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H13PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
H14PD14I/OMultiplexed I/O & Peripheral Pin PD14 (UART, PWM)
H15PD13I/OMultiplexed I/O & Peripheral Pin PD13 (UART, SPI, I2C, PWM)
J1PH0 - OSC_INI/OMultiplexed I/O & Peripheral Pin PH0 - OSC_IN (RTC/CLK)
J2PF8I/OMultiplexed I/O & Peripheral Pin PF8 (UART, SPI, ADC)
J3PF7I/OMultiplexed I/O & Peripheral Pin PF7 (UART, SPI, ADC)
J4PF9I/OMultiplexed I/O & Peripheral Pin PF9 (UART, SPI, ADC)
J6VSSGNDGround Reference Pin (VSS)
J7VSSGNDGround Reference Pin (VSS)
J8VSSGNDGround Reference Pin (VSS)
J9VSSGNDGround Reference Pin (VSS)
J10VSSGNDGround Reference Pin (VSS)
J12PD15I/OMultiplexed I/O & Peripheral Pin PD15 (UART, PWM)
J13PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, SPI, I2C)
J14VSSGNDGround Reference Pin (VSS)
J15PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C, PWM)
K1PH1 - OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1 - OSC_OUT (RTC/CLK)
K2VSSGNDGround Reference Pin (VSS)
K3PF10I/OMultiplexed I/O & Peripheral Pin PF10 (ADC)
K4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K6VSSGNDGround Reference Pin (VSS)
K7VSSGNDGround Reference Pin (VSS)
K8VSSGNDGround Reference Pin (VSS)
K9VSSGNDGround Reference Pin (VSS)
K10VSSGNDGround Reference Pin (VSS)
K12VSSGNDGround Reference Pin (VSS)
K13PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
K14PB15I/OMultiplexed I/O & Peripheral Pin PB15 (UART, SPI, PWM, RTC/CLK)
K15PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
L1NRSTISystem Enable & Hardware Reset (NRST)
L2PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
L3PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC, RTC/CLK)
L4VREF -AnalogMultiplexed I/O & Peripheral Pin VREF - (General)
L12VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L13PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART)
L14PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
L15PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
M1PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
M2PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
M3VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
M4VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
M5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M6VSSGNDGround Reference Pin (VSS)
M7PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
M8PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
M9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M10VSSGNDGround Reference Pin (VSS)
M11PH7I/OMultiplexed I/O & Peripheral Pin PH7 (SPI, I2C)
M12PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI, PWM)
M13PH11I/OMultiplexed I/O & Peripheral Pin PH11 (PWM)
M14PH9I/OMultiplexed I/O & Peripheral Pin PH9 (I2C)
M15PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
N1PC2_CI/OMultiplexed I/O & Peripheral Pin PC2_C (ADC)
N2PC3_CI/OMultiplexed I/O & Peripheral Pin PC3_C (ADC)
N3VSSAGNDGround Reference Pin (VSSA)
N4PH2I/OMultiplexed I/O & Peripheral Pin PH2 (SPI, ADC)
N5PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
N6PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
N7PF11I/OMultiplexed I/O & Peripheral Pin PF11 (SPI, ADC)
N8PE8I/OMultiplexed I/O & Peripheral Pin PE8 (UART, PWM)
N9PG1I/OMultiplexed I/O & Peripheral Pin PG1 (UART)
N10PF15I/OMultiplexed I/O & Peripheral Pin PF15 (I2C)
N11PF13I/OMultiplexed I/O & Peripheral Pin PF13 (I2C, ADC)
N12PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
N13PH8I/OMultiplexed I/O & Peripheral Pin PH8 (I2C)
N14PH10I/OMultiplexed I/O & Peripheral Pin PH10 (I2C, PWM)
N15PH12I/OMultiplexed I/O & Peripheral Pin PH12 (I2C, PWM)
P1PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC, PWM)
P2PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
P3PA1_CI/OMultiplexed I/O & Peripheral Pin PA1_C (ADC)
P4PH4I/OMultiplexed I/O & Peripheral Pin PH4 (I2C, ADC)
P5PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
P6PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
P7PB2I/OMultiplexed I/O & Peripheral Pin PB2 (SPI, I2C, RTC/CLK)
P8PG0I/OMultiplexed I/O & Peripheral Pin PG0 (UART)
P9PE7I/OMultiplexed I/O & Peripheral Pin PE7 (UART)
P10PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C, PWM)
P11PF12I/OMultiplexed I/O & Peripheral Pin PF12 (ADC)
P12PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
P13PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI, PWM)
P14PE15I/OMultiplexed I/O & Peripheral Pin PE15 (UART)
P15PH6I/OMultiplexed I/O & Peripheral Pin PH6 (SPI, I2C)
R1VSSGNDGround Reference Pin (VSS)
R2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC, PWM)
R3PA0_CI/OMultiplexed I/O & Peripheral Pin PA0_C (ADC)
R4PH3I/OMultiplexed I/O & Peripheral Pin PH3 (ADC)
R5PH5I/OMultiplexed I/O & Peripheral Pin PH5 (SPI, I2C, ADC)
R6PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
R7PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC, PWM)
R8PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
R9PE10I/OMultiplexed I/O & Peripheral Pin PE10 (UART, PWM)
R10PF14I/OMultiplexed I/O & Peripheral Pin PF14 (I2C, ADC)
R11PE9I/OMultiplexed I/O & Peripheral Pin PE9 (UART, PWM)
R12PE11I/OMultiplexed I/O & Peripheral Pin PE11 (SPI, PWM)
R13VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
R14VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
R15VSSGNDGround Reference Pin (VSS)
PIN A1 VSS
GND
Ground Reference Pin (VSS)
Design note: 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 23 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32H725IEK6 (ST · UFBGA-201)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32H725IEK6 (UFBGA-201) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32H725IEK6 (UFBGA-201) - 2. Standard Pinout (Top View)
True package pinout (201 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32H725IEK6 (UFBGA-201) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32H725IEK6 (UFBGA-201) - 4. Package Dimensions (D×E×A)
UFBGA-201 · 10.00×10.00mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32H725IEK6 (UFBGA-201) - 5. Recommended Land Pattern
IPC-7351B Footprint (201 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32H725IEK6 (UFBGA-201) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (23 figures · Page 1/2)
Showing 1–12 of 23 uncropped original figures for STM32H725
P62 · p62_fig01EXACT PACKAGE
STM32H725IEK6 (UFBGA-201) — Figure 10. UFBGA169 ballout
Figure 10. UFBGA169 ballout
P62 · p62_fig02EXACT PACKAGE
STM32H725IEK6 (UFBGA-201) — Figure 11. UFBGA176+25 ballout
Figure 11. UFBGA176+25 ballout
P266 · p266_fig01EXACT PACKAGE
STM32H725IEK6 (UFBGA-201) — Figure 94. UFBGA176+25 package outline
Figure 94. UFBGA176+25 package outline
P267 · p267_fig01EXACT PACKAGE
STM32H725IEK6 (UFBGA-201) — Figure 95. UFBGA176+25 package recommended footprint
Figure 95. UFBGA176+25 package recommended footprint
P1 · p01_fig01881×1119px
STM32H725IEK6 (UFBGA-201) — • Flexible external memory controller with up to 24-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
• Flexible external memory controller with up to 24-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
P57 · p57_fig011557×1281px
STM32H725IEK6 (UFBGA-201) — Figure 5. TFBGA100 pinout
Figure 5. TFBGA100 pinout
P57 · p57_fig021546×1189px
STM32H725IEK6 (UFBGA-201) — 34
34
P58 · p58_fig011553×1548px
STM32H725IEK6 (UFBGA-201) — Figure 6. LQFP100 pinout
Figure 6. LQFP100 pinout
P62 · p62_fig01P62
STM32H725IEK6 (UFBGA-201) — Datasheet Page 62 (p62_fig01)
Datasheet Page 62 (p62_fig01)
P115 · p115_fig011546×2148px
STM32H725IEK6 (UFBGA-201) — Figure 14. Power supply scheme
Figure 14. Power supply scheme
P115 · p115_fig01P115
STM32H725IEK6 (UFBGA-201) — Datasheet Page 115 (p115_fig01)
Datasheet Page 115 (p115_fig01)
P143 · p143_fig011546×500px
STM32H725IEK6 (UFBGA-201) — Figure 24. Typical application with an 8 MHz crystal
Figure 24. Typical application with an 8 MHz crystal
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Technical Specifications & Part Details (STM32H725IEK6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32H725IEK6 (UFBGA-201) is a 201-pin embedded microcontroller unit (mcu) featuring a 10.00 × 10.00 × 0.60 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.62 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, DAC, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.62 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
550 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
118 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 0.60 mm (A1=0.20 mm)
Package family: BGA (UFBGA-201)
Pin Count & Lead PitchN / e
201 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, DAC, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol201 auto-grouped pins
OK
IPC-7351B Land Pattern201 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32H725 (9)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (UFBGA-201)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.60mm · e=0.65mm
Pad Size (W × L)Level B
0.30 × 0.30 mm
Pins / Total PadsTopology
201P / 201Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-201
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H725IEK6 (UFBGA-201)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H725IEK6 (UFBGA-201)?

Manufactured by ST, the STM32H725IEK6 is housed in a UFBGA-201 package with 201 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 1.62 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PB8: Multiplexed I/O & Peripheral Pin PB8 (UART, I2C, PWM)), A3 (VDDLDO: Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))), A4 (VCAP: Multiplexed I/O & Peripheral Pin VCAP (General)), A5 (PB6: Multiplexed I/O & Peripheral Pin PB6 (UART, I2C, PWM)), A6 (PB3(JTDO/ TRACES WO): Multiplexed I/O & Peripheral Pin PB3(JTDO/ TRACES WO) (UART, SPI, PWM, SWD/JTAG)).

What are the IPC-7351B PCB Footprint dimensions for STM32H725IEK6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H725IEK6 (UFBGA-201) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.65 mm, and 201 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H725IEK6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H725IEK6 (ST, UFBGA-201) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (201 pins) & STM32H725 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A2PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: UART, I2C, PWM.
A3VDDLDOPower_InPrimary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A4VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
A5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL, I2C4_SCL. Supported peripheral buses: UART, I2C, PWM.
A6PB3(JTDO/ TRACES WO)Digital_IOSignal terminal PB3(JTDO/ TRACES WO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK, SPI6_SCK. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
A7PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI.
A8PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI.
A9PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI.
A10PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: UART.
A11PA15(JTDI)Digital_IOSignal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS, SPI6_NSS. Supported peripheral buses: UART, SPI, SWD/JTAG.
A12PA14(JTC K/SWCLK)Digital_IOSignal terminal PA14(JTC K/SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14(JTC K/SWCLK). Supported peripheral buses: SWD/JTAG.
A13VDDLDOPower_InPrimary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A14VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
A15VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B1PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
B2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: UART.
B3PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI2_NSS, I2C4_SDA, I2C4_SMBA. Supported peripheral buses: UART, SPI, I2C, PWM.
B4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: UART.
B5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, I2C, PWM.
B6PB4(NJTR ST)Digital_IOSignal terminal PB4(NJTR ST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO, SPI2_NSS, SPI6_MISO. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
B7PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_SCK. Supported peripheral buses: UART, SPI.
B8PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI.
B9PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
B10PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
B11PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SMBA, SPI6_SCK, SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C.
B12PH14Digital_IOSignal terminal PH14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: UART, PWM.
B13PA13(JTM S/ SWDIO)Digital_IOSignal terminal PA13(JTM S/ SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13(JTM S/ SWDIO). Supported peripheral buses: SWD/JTAG.
B14PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL, I2C5_SCL. Supported peripheral buses: UART, I2C, RTC/CLK.
B15PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI.
C1PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
C2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C3PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: UART, SPI.
C4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: UART.
C5BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
C6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_MOSI, I2C4_SMBA, SPI3_MOSI, SPI6_MOSI. Supported peripheral buses: UART, SPI, I2C, PWM.
C7PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_MOSI. Supported peripheral buses: UART, SPI.
C8PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: SPI.
C9PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: UART.
C10PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: UART.
C11PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SCL, SPI3_MISO. Supported peripheral buses: UART, SPI, I2C.
C12PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SDA, SPI3_SCK. Supported peripheral buses: UART, SPI, I2C.
C13PH13Digital_IOSignal terminal PH13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: UART, PWM.
C14PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART, PWM.
C15PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: UART, SPI, PWM.
D1PC15 - OSC32_ OUTDigital_IOSignal terminal PC15 - OSC32_ OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15 - OSC32_ OUT. Supported peripheral buses: RTC/CLK.
D2PC14 - OSC32_INDigital_IOSignal terminal PC14 - OSC32_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN. Supported peripheral buses: RTC/CLK.
D3PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: SPI.
D4PDR_ONDigital_IOSignal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General.
D5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D7PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: UART, SPI.
D8PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_MISO. Supported peripheral buses: UART, SPI.
D9PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C.
D10VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D11VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D12PH15Digital_IOSignal terminal PH15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH15. Supported peripheral buses: PWM.
D13PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA, SPI2_SCK, I2C5_SMBA. Supported peripheral buses: UART, SPI, I2C, PWM.
D14PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: UART, PWM.
D15PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: UART, PWM.
E1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E2VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E3PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI, I2C.
E4VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
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