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RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — Symbol, Footprint IPC-7351B & 3D STEP Model

RN1810-I/RM110

MICROCHIPID: C641404WIRELM-SMD_MICROCHIP_RN1810 · 37 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810)1GND2TEST3GND4VDD5CMD_STATUS6STATUS_RDY7UART0_TX8IP_STATUS9UART0_CTS10UART0_RTS11NC12TCP_STATUS13SLEEP14FUNC_CONFIG15VDD16GND17TEST18TEST19RESET37GND36GND35VDD34GND33NC32NC31NC30NC29NC28NC27GND26MISC_STATUS25WAKEUP24GND23MODE122TCP_CTRL21UART0 RX/_ M20CMD_CTRLGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.830.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5mm
2. 2D FOOTPRINT
ANTENNA KEEPOUT (5.5mm)12373635343332313029282726252423222120191817161514131211109876543E=17.78mm · Pitch e=1.27mmD=26.67mm-17-15-13-11-9-7-5-3-1135791113151720181614121086420-2-4-6-8-10-12-14-16-18-20mm
3. 3D CAD MODEL
Package Body: 17.78mm × 26.67mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (37/37)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1GNDGNDGround Reference Pin (GND)
2TESTI/OMultiplexed I/O & Peripheral Pin TEST (General)
3GNDGNDGround Reference Pin (GND)
4VDDPowerPower Supply Input (VDD — 3.15V to 3.45V)
5CMD_STATUSI/OMultiplexed I/O & Peripheral Pin CMD_STATUS (General)
6STATUS_RDYI/OMultiplexed I/O & Peripheral Pin STATUS_RDY (General)
7UART0_TXI/OMultiplexed I/O & Peripheral Pin UART0_TX (UART)
8IP_STATUSI/OMultiplexed I/O & Peripheral Pin IP_STATUS (General)
9UART0_CTSI/OMultiplexed I/O & Peripheral Pin UART0_CTS (UART)
10UART0_RTSI/OMultiplexed I/O & Peripheral Pin UART0_RTS (UART)
11NCI/OMultiplexed I/O & Peripheral Pin NC (General)
12TCP_STATUSI/OMultiplexed I/O & Peripheral Pin TCP_STATUS (General)
13SLEEPI/OMultiplexed I/O & Peripheral Pin SLEEP (General)
14FUNC_CONFIGI/OMultiplexed I/O & Peripheral Pin FUNC_CONFIG (General)
15VDDPowerPower Supply Input (VDD — 3.15V to 3.45V)
16GNDGNDGround Reference Pin (GND)
17TESTI/OMultiplexed I/O & Peripheral Pin TEST (General)
18TESTI/OMultiplexed I/O & Peripheral Pin TEST (General)
19RESETISystem Enable & Hardware Reset (RESET)
20CMD_CTRLI/OMultiplexed I/O & Peripheral Pin CMD_CTRL (General)
21UART0 RX/_ MODE0I/OMultiplexed I/O & Peripheral Pin UART0 RX/_ MODE0 (UART)
22TCP_CTRLI/OMultiplexed I/O & Peripheral Pin TCP_CTRL (General)
23MODE1I/OMultiplexed I/O & Peripheral Pin MODE1 (General)
24GNDGNDGround Reference Pin (GND)
25WAKEUPI/OMultiplexed I/O & Peripheral Pin WAKEUP (General)
26MISC_STATUSI/OMultiplexed I/O & Peripheral Pin MISC_STATUS (General)
27GNDGNDGround Reference Pin (GND)
28NCI/OMultiplexed I/O & Peripheral Pin NC (General)
29NCI/OMultiplexed I/O & Peripheral Pin NC (General)
30NCI/OMultiplexed I/O & Peripheral Pin NC (General)
31NCI/OMultiplexed I/O & Peripheral Pin NC (General)
32NCI/OMultiplexed I/O & Peripheral Pin NC (General)
33NCI/OMultiplexed I/O & Peripheral Pin NC (General)
34GNDGNDGround Reference Pin (GND)
35VDDPowerPower Supply Input (VDD — 3.15V to 3.45V)
36GNDGNDGround Reference Pin (GND)
37GNDGNDGround Reference Pin (GND)
PIN 1 GND
GND
Ground Reference Pin (GND)
Design note: —
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: RN1810-I/RM110 (MICROCHIP · WIRELM-SMD_MICROCHIP_RN1810)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) - 2. Standard Pinout (Top View)
True package pinout (37 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) - 4. Package Dimensions (D×E×A)
WIRELM-SMD_MICROCHIP_RN1810 · 17.78×26.67mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) - 5. Recommended Land Pattern
IPC-7351B Footprint (37 Pads)Expand ›
6. Application SchematicSCHEMATIC
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for RN1810
P1 · p01_fig01376×200px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — 2.4 GHz IEEE 802.11b/g/n Wireless Module
2.4 GHz IEEE 802.11b/g/n Wireless Module
P1 · p01_fig02660×693px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — Compliance
Compliance
P1 · p01_fig02P1
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P7 · p07_fig011235×1148px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — FIGURE 1-3: RN1810/RN1810E MODULE PHYSICAL DIMENSIONS (TOP AND SIDE VIEW)
FIGURE 1-3: RN1810/RN1810E MODULE PHYSICAL DIMENSIONS (TOP AND SIDE VIEW)
P7 · p07_fig01P7
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — Datasheet Page 7 (p07_fig01)
Datasheet Page 7 (p07_fig01)
P8 · p08_fig011205×942px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — 

P11 · p11_fig011601×909px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — FIGURE 1-7: RN1810/RN1810E HOST PCB EXAMPLE LAYOUT
FIGURE 1-7: RN1810/RN1810E HOST PCB EXAMPLE LAYOUT
P11 · p11_fig01P11
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — Datasheet Page 11 (p11_fig01)
Datasheet Page 11 (p11_fig01)
P15 · p15_fig011777×2175px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — FIGURE 3-1: APPLICATION SCHEMATIC
FIGURE 3-1: APPLICATION SCHEMATIC
P15 · p15_fig01P15
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — Datasheet Page 15 (p15_fig01)
Datasheet Page 15 (p15_fig01)
P16 · p16_fig011039×1403px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — FIGURE 3-2: PCB ANTENNA SIMULATION DRAWING
FIGURE 3-2: PCB ANTENNA SIMULATION DRAWING
P17 · p17_fig011551×1526px
RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) — Two-dimensional (2D) pattern, including the average on main radiation planes (Phi = 0 and 90 degrees).
Two-dimensional (2D) pattern, including the average on main radiation planes (Phi = 0 and 90 degrees).

Technical Specifications & Part Details (RN1810-I/RM110)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) is a 37-pin wireless wi-fi / bluetooth le soc module featuring a 26.19 × 18.58 × 3.10 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 3.15V to 3.45V supply operation across -40°C to +85°C with integrated Wi-Fi, UART interfaces.
Operating Supply VoltageV_CC / V_DD
3.15V to 3.45V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2.4 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
26.19 × 18.58 × 3.10 mm (A1=0.00 mm)
Package family: CASTELLATED_MODULE (WIRELM-SMD_MICROCHIP_RN1810)
Pin Count & Lead PitchN / e
37 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Wi-Fi, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol37 auto-grouped pins
OK
IPC-7351B Land Pattern37 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WIRELM-SMD_MICROCHIP_RN1810)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
26.67 × 17.78 mm
Height (A) & Pitch (e)IPC-7351B
A=3.10mm · e=1.27mm
Pad Size (W × L)Level B
1.02 × 1.27 mm
Pins / Total PadsTopology
37P / 37Pad (CASTELLATED_MODULE)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WIRELM-SMD_MICROCHIP_RN1810
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810)?

Manufactured by MICROCHIP, the RN1810-I/RM110 is housed in a WIRELM-SMD_MICROCHIP_RN1810 package with 37 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 3.15V to 3.45V. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (TEST: Multiplexed I/O & Peripheral Pin TEST (General)), 3 (GND: Ground Reference Pin (GND)), 4 (VDD: Power Supply Input (VDD — 3.15V to 3.45V)), 5 (CMD_STATUS: Multiplexed I/O & Peripheral Pin CMD_STATUS (General)), 6 (STATUS_RDY: Multiplexed I/O & Peripheral Pin STATUS_RDY (General)).

What are the IPC-7351B PCB Footprint dimensions for RN1810-I/RM110?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), RN1810-I/RM110 (WIRELM-SMD_MICROCHIP_RN1810) has a nominal body envelope of 17.78 × 26.67 mm, pitch e = 1.27 mm, and 37 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for RN1810-I/RM110?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for RN1810-I/RM110 (MICROCHIP, WIRELM-SMD_MICROCHIP_RN1810) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (37 pins) & RN1810 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
2TESTDigital_IOSignal terminal TEST (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: TEST. Supported peripheral buses: General.
3GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
4VDDPower_InPrimary positive power supply input (VDD) operating in the 3.15V to 3.45V domain (Max rating: 3.45V).
5CMD_STATUSDigital_IOSignal terminal CMD_STATUS (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: CMD_STATUS. Supported peripheral buses: General.
6STATUS_RDYDigital_IOSignal terminal STATUS_RDY (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: STATUS_RDY. Supported peripheral buses: General.
7UART0_TXDigital_IOSignal terminal UART0_TX (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: UART0_TX. Supported peripheral buses: UART.
8IP_STATUSDigital_IOSignal terminal IP_STATUS (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: IP_STATUS. Supported peripheral buses: General.
9UART0_CTSDigital_IOSignal terminal UART0_CTS (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: UART0_CTS. Supported peripheral buses: UART.
10UART0_RTSDigital_IOSignal terminal UART0_RTS (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: UART0_RTS. Supported peripheral buses: UART.
11NCNCSignal terminal NC (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
12TCP_STATUSDigital_IOSignal terminal TCP_STATUS (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: TCP_STATUS. Supported peripheral buses: General.
13SLEEPDigital_IOSignal terminal SLEEP (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: SLEEP. Supported peripheral buses: General.
14FUNC_CONFIGDigital_IOSignal terminal FUNC_CONFIG (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: FUNC_CONFIG. Supported peripheral buses: General.
15VDDPower_InPrimary positive power supply input (VDD) operating in the 3.15V to 3.45V domain (Max rating: 3.45V).
16GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
17TESTDigital_IOSignal terminal TEST (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: TEST. Supported peripheral buses: General.
18TESTDigital_IOSignal terminal TEST (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: TEST. Supported peripheral buses: General.
19RESETDigital_IOActive-low hardware reset terminal (RESET): pulling this pin Low resets the processor core and peripherals.
20CMD_CTRLDigital_IOSignal terminal CMD_CTRL (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: CMD_CTRL. Supported peripheral buses: General.
21UART0 RX/_ MODE0Digital_IOSignal terminal UART0 RX/_ MODE0 (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: UART0 RX/_ MODE0. Supported peripheral buses: UART.
22TCP_CTRLDigital_IOSignal terminal TCP_CTRL (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: TCP_CTRL. Supported peripheral buses: General.
23MODE1Digital_IOSignal terminal MODE1 (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: MODE1. Supported peripheral buses: General.
24GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
25WAKEUPDigital_IOSignal terminal WAKEUP (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: WAKEUP. Supported peripheral buses: General.
26MISC_STATUSDigital_IOSignal terminal MISC_STATUS (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: MISC_STATUS. Supported peripheral buses: General.
27GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
28NCNCSignal terminal NC (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
29NCNCSignal terminal NC (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
30NCNCSignal terminal NC (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
31NCNCSignal terminal NC (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
32NCNCSignal terminal NC (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
33NCNCSignal terminal NC (I/O, 3.15V to 3.45V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
34GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
35VDDPower_InPrimary positive power supply input (VDD) operating in the 3.15V to 3.45V domain (Max rating: 3.45V).
36GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
37GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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