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RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Symbol, Footprint IPC-7351B & 3D STEP Model

RN131G-I/RM

MICROCHIPID: C636764WIRELM-SMD_MICROCHIP_RN131G-I-RM481 · 44 Pins · Pitch 2.00mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481)1SENSOR62SENSOR43SENSOR54SENSOR75RESET6EPC-ANT-A7EPC-ANT-B8SUPERCAP9FORCE_AWAKE10GPIO-1311GPIO-1212UART-RX13UART-TX14Notused15Notused16Notused173.3V-REG-OUT183.3V-REG-IN19GND20VDD-BATT21VDD-IN22DMA-TX44GND43GND42GND41GND40GND39GND38GND37GND36GND35NOCONNECT34SENSOR-033SENSE-PWR32SENSOR-331SENSOR-230SENSOR-129GPIO-428GPIO-527GPIO-626GPIO-725GPIO-824GPIO-923DMA-RXGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.833.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0mm
2. 2D FOOTPRINT
ANTENNA KEEPOUT (8.4mm)1234567891011121314151617181920212223242526272829303132333435363738394041424344E=20.00mm · Pitch e=2.00mmD=37.00mm-20-18-16-14-12-10-8-6-4-2024681012141618202826242220181614121086420-2-4-6-8-10-12-14-16-18-20-22-24-26-28mm
3. 3D CAD MODEL
Package Body: 20.00mm × 37.00mm · Pitch: 2.00mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (44/44)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1SENSOR6I/OMultiplexed I/O & Peripheral Pin SENSOR6 (General)
2SENSOR4I/OMultiplexed I/O & Peripheral Pin SENSOR4 (General)
3SENSOR5I/OMultiplexed I/O & Peripheral Pin SENSOR5 (General)
4SENSOR7I/OMultiplexed I/O & Peripheral Pin SENSOR7 (General)
5RESETISystem Enable & Hardware Reset (RESET)
6EPC-ANT-AGNDGround Reference Pin (EPC-ANT-A)
7EPC-ANT-BGNDGround Reference Pin (EPC-ANT-B)
8SUPERCAPI/OMultiplexed I/O & Peripheral Pin SUPERCAP (General)
9FORCE_AWAKEI/OMultiplexed I/O & Peripheral Pin FORCE_AWAKE (General)
10GPIO-13I/OMultiplexed I/O & Peripheral Pin GPIO-13 (General)
11GPIO-12I/OMultiplexed I/O & Peripheral Pin GPIO-12 (General)
12UART-RXI/OMultiplexed I/O & Peripheral Pin UART-RX (UART)
13UART-TXI/OMultiplexed I/O & Peripheral Pin UART-TX (UART)
14NotusedI/OMultiplexed I/O & Peripheral Pin Notused (General)
15NotusedI/OMultiplexed I/O & Peripheral Pin Notused (General)
16NotusedI/OMultiplexed I/O & Peripheral Pin Notused (General)
173.3V-REG-OUTI/OMultiplexed I/O & Peripheral Pin 3.3V-REG-OUT (General)
183.3V-REG-INI/OMultiplexed I/O & Peripheral Pin 3.3V-REG-IN (General)
19GNDGNDGround Reference Pin (GND)
20VDD-BATTPowerPower Supply Input (VDD-BATT — 3.3V / 5.0V Standard Logic)
21VDD-INPowerPower Supply Input (VDD-IN — 3.3V / 5.0V Standard Logic)
22DMA-TXI/OMultiplexed I/O & Peripheral Pin DMA-TX (General)
23DMA-RXI/OMultiplexed I/O & Peripheral Pin DMA-RX (General)
24GPIO-9I/OMultiplexed I/O & Peripheral Pin GPIO-9 (General)
25GPIO-8I/OMultiplexed I/O & Peripheral Pin GPIO-8 (General)
26GPIO-7I/OMultiplexed I/O & Peripheral Pin GPIO-7 (General)
27GPIO-6I/OMultiplexed I/O & Peripheral Pin GPIO-6 (General)
28GPIO-5I/OMultiplexed I/O & Peripheral Pin GPIO-5 (General)
29GPIO-4I/OMultiplexed I/O & Peripheral Pin GPIO-4 (General)
30SENSOR-1I/OMultiplexed I/O & Peripheral Pin SENSOR-1 (General)
31SENSOR-2I/OMultiplexed I/O & Peripheral Pin SENSOR-2 (General)
32SENSOR-3I/OMultiplexed I/O & Peripheral Pin SENSOR-3 (General)
33SENSE-PWRI/OMultiplexed I/O & Peripheral Pin SENSE-PWR (General)
34SENSOR-0I/OMultiplexed I/O & Peripheral Pin SENSOR-0 (General)
35NOCONNECTI/OMultiplexed I/O & Peripheral Pin NOCONNECT (General)
36GNDGNDGround Reference Pin (GND)
37GNDGNDGround Reference Pin (GND)
38GNDGNDGround Reference Pin (GND)
39GNDGNDExposed Thermal & Ground Pad (GND)
40GNDGNDGround Reference Pin (GND)
41GNDGNDGround Reference Pin (GND)
42GNDGNDGround Reference Pin (GND)
43GNDGNDGround Reference Pin (GND)
44GNDGNDGround Reference Pin (GND)
PIN 1 SENSOR6
I/O
Multiplexed I/O & Peripheral Pin SENSOR6 (General)
Design note: Signal terminal SENSOR6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR6. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: RN131G-I/RM (MICROCHIP · WIRELM-SMD_MICROCHIP_RN131G-I-RM481)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) - 2. Standard Pinout (Top View)
True package pinout (44 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) - 4. Package Dimensions (D×E×A)
WIRELM-SMD_MICROCHIP_RN131G-I-RM481 · 20.00×37.00mm · Pitch 2.00mmExpand ›
5. Recommended Land PatternLAND PATTERN
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) - 5. Recommended Land Pattern
IPC-7351B Footprint (44 Pads)Expand ›
6. Application SchematicSCHEMATIC
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for RN131
P1 · p01_fig01625×404px
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Description
Description
P1 · p01_fig021269×613px
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — www.rovingnetworks.com Version 3.2r 4/9/2012 1
www.rovingnetworks.com Version 3.2r 4/9/2012 1
P1 · p01_fig01P1
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P4 · p04_fig011496×1870px
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Figure 2. Application Schematic
Figure 2. Application Schematic
P4 · p04_fig01P4
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Datasheet Page 4 (p04_fig01)
Datasheet Page 4 (p04_fig01)
P7 · p07_fig011775×845px
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Figure 4. Module Physical Dimensions
Figure 4. Module Physical Dimensions
P7 · p07_fig021436×1053px
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Figure 5. Pad Dimensions
Figure 5. Pad Dimensions
P7 · p07_fig01P7
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Datasheet Page 7 (p07_fig01)
Datasheet Page 7 (p07_fig01)
P9 · p09_fig01852×849px
RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) — Figure 7. Module Placement for Grounding
Figure 7. Module Placement for Grounding

Technical Specifications & Part Details (RN131G-I/RM)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) is a 44-pin wireless wi-fi / bluetooth le soc module featuring a 37.00 × 20.00 × 3.10 mm mechanical envelope (lead pitch e = 2.00 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Wi-Fi, UART, SPI, ADC, SDIO interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2.4 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
37.00 × 20.00 × 3.10 mm (A1=0.00 mm)
Package family: CASTELLATED_MODULE (WIRELM-SMD_MICROCHIP_RN131G-I-RM481)
Pin Count & Lead PitchN / e
44 Pins | Pitch e = 2.00 mm (78.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Wi-Fi, UART, SPI, ADC, SDIO
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol44 auto-grouped pins
OK
IPC-7351B Land Pattern44 pads · Pitch 2.00mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WIRELM-SMD_MICROCHIP_RN131G-I-RM481)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
37.00 × 20.00 mm
Height (A) & Pitch (e)IPC-7351B
A=3.10mm · e=2.00mm
Pad Size (W × L)Level B
1.20 × 1.20 mm
Pins / Total PadsTopology
44P / 44Pad (CASTELLATED_MODULE)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WIRELM-SMD_MICROCHIP_RN131G-I-RM481
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481)?

Manufactured by MICROCHIP, the RN131G-I/RM is housed in a WIRELM-SMD_MICROCHIP_RN131G-I-RM481 package with 44 pins and a 2.00 mm lead pitch. Key pins include: 1 (SENSOR6: Multiplexed I/O & Peripheral Pin SENSOR6 (General)), 2 (SENSOR4: Multiplexed I/O & Peripheral Pin SENSOR4 (General)), 3 (SENSOR5: Multiplexed I/O & Peripheral Pin SENSOR5 (General)), 4 (SENSOR7: Multiplexed I/O & Peripheral Pin SENSOR7 (General)), 5 (RESET: System Enable & Hardware Reset (RESET)), 6 (EPC-ANT-A: Ground Reference Pin (EPC-ANT-A)).

What are the IPC-7351B PCB Footprint dimensions for RN131G-I/RM?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), RN131G-I/RM (WIRELM-SMD_MICROCHIP_RN131G-I-RM481) has a nominal body envelope of 20.00 × 37.00 mm, pitch e = 2.00 mm, and 44 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for RN131G-I/RM?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for RN131G-I/RM (MICROCHIP, WIRELM-SMD_MICROCHIP_RN131G-I-RM481) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (44 pins) & RN131 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1SENSOR6Digital_IOSignal terminal SENSOR6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR6. Supported peripheral buses: General.
2SENSOR4Digital_IOSignal terminal SENSOR4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR4. Supported peripheral buses: General.
3SENSOR5Digital_IOSignal terminal SENSOR5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR5. Supported peripheral buses: General.
4SENSOR7Digital_IOSignal terminal SENSOR7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR7. Supported peripheral buses: General.
5RESETDigital_IOActive-low hardware reset terminal (RESET): pulling this pin Low resets the processor core and peripherals.
6EPC-ANT-AGND0V electrical ground return terminal (EPC-ANT-A) for internal core logic, I/O drivers, and analog sub-blocks.
7EPC-ANT-BGND0V electrical ground return terminal (EPC-ANT-B) for internal core logic, I/O drivers, and analog sub-blocks.
8SUPERCAPDigital_IOSignal terminal SUPERCAP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SUPERCAP. Supported peripheral buses: General.
9FORCE_AWAKEDigital_IOSignal terminal FORCE_AWAKE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: FORCE_AWAKE. Supported peripheral buses: General.
10GPIO-13Digital_IOSignal terminal GPIO-13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-13. Supported peripheral buses: General.
11GPIO-12Digital_IOSignal terminal GPIO-12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-12. Supported peripheral buses: General.
12UART-RXDigital_IOSignal terminal UART-RX (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: UART-RX. Supported peripheral buses: UART.
13UART-TXDigital_IOSignal terminal UART-TX (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: UART-TX. Supported peripheral buses: UART.
14NotusedDigital_IOSignal terminal Notused (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: Notused. Supported peripheral buses: General.
15NotusedDigital_IOSignal terminal Notused (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: Notused. Supported peripheral buses: General.
16NotusedDigital_IOSignal terminal Notused (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: Notused. Supported peripheral buses: General.
173.3V-REG-OUTDigital_IOSignal terminal 3.3V-REG-OUT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: 3.3V-REG-OUT. Supported peripheral buses: General.
183.3V-REG-INDigital_IOSignal terminal 3.3V-REG-IN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: 3.3V-REG-IN. Supported peripheral buses: General.
19GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
20VDD-BATTPower_InPrimary positive power supply input (VDD-BATT) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
21VDD-INPower_InPrimary positive power supply input (VDD-IN) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
22DMA-TXDigital_IOSignal terminal DMA-TX (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DMA-TX. Supported peripheral buses: General.
23DMA-RXDigital_IOSignal terminal DMA-RX (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DMA-RX. Supported peripheral buses: General.
24GPIO-9Digital_IOSignal terminal GPIO-9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-9. Supported peripheral buses: General.
25GPIO-8Digital_IOSignal terminal GPIO-8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-8. Supported peripheral buses: General.
26GPIO-7Digital_IOSignal terminal GPIO-7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-7. Supported peripheral buses: General.
27GPIO-6Digital_IOSignal terminal GPIO-6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-6. Supported peripheral buses: General.
28GPIO-5Digital_IOSignal terminal GPIO-5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-5. Supported peripheral buses: General.
29GPIO-4Digital_IOSignal terminal GPIO-4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO-4. Supported peripheral buses: General.
30SENSOR-1Digital_IOSignal terminal SENSOR-1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR-1. Supported peripheral buses: General.
31SENSOR-2Digital_IOSignal terminal SENSOR-2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR-2. Supported peripheral buses: General.
32SENSOR-3Digital_IOSignal terminal SENSOR-3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR-3. Supported peripheral buses: General.
33SENSE-PWRDigital_IOSignal terminal SENSE-PWR (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSE-PWR. Supported peripheral buses: General.
34SENSOR-0Digital_IOSignal terminal SENSOR-0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SENSOR-0. Supported peripheral buses: General.
35NOCONNECTDigital_IOSignal terminal NOCONNECT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NOCONNECT. Supported peripheral buses: General.
36GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
37GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
38GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
39GNDGNDBottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
40GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
41GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
42GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
43GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
44GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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