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STM32MP135DAE7 (LFBGA-289(14x14)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32MP135DAE7

STLFBGA-289(14x14) · 289 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32MP135DAE7 (LFBGA-289(14x14))A1VSSA2PA9A3PD10A4PB7A5PE7A6PD5A7PE8A8PG4A9PH9A10PH13A11PC7A12PB9A13PB14A14PG6A15PD2A16PC9A17VSSB1PD3B2PF5B3PD14B4PE12B5PE1B6PE9B7PH14B8PE10B9PF1B10PF3B11PC6B12PB15B13PB4B14PC10B15PC12B16DDR_DQ4B17DDR_DQ0C1PB6C2PH12C3PE14C4PE13C5PD8C6PD12C7PD15C8VSSC9PG7C10PB5C11PB3C12VDDSD1C13PF0C14PC11C15DDR_DQ1C16DDR_DQS0NC17DDR_DQS0PD1PB8D2PD6D3VSSD4PE11D5PD1D6PE0D7PG0D8PE15D9PB12D10PB10D11VDDSD2D12VSSD13PE3D14PC8D15DDR_DQM0D16DDR_DQ5D17DDR_DQ3E1PG9E2PD11E3PA12E4PD0E5VSSE6PA15E7PD4E8PD9E9PF2E10PB13E11PH10E12VDDQ_DDRE13DDR_DQ2E14DDR_DQ6E15DDR_DQ7E16DDR_A5E17DDR_RESETNF1PG10F2PG5F3PG8F4PH2F5PH8F6VDDCPUF7VDDF8VDDCPUF9VDDCPUF10VDDF11VDDF12VDDQ_DDRF13VSSF14DDR_A13F15VSSF16DDR_A9F17DDR_A2G1PF9G2PF6G3PF10G4PG15G5PF8G6VDDG7VSSG8VSSG9VSSG10VSSG11VSSG12VDDQ_DDRG13DDR_BA2G14DDR_A7G15DDR_A3G16DDR_A0G17DDR_BA0H1PH11H2PI3H3PH7H4PB2H5PE4H6VDDCPUH7VSSH8VDDCOREH9VDDCOREH10VDDCOREH11VSSH12VDDQ_DDRH13DDR_WENH14VSSH15DDR_ODTH16DDR_CSNH17DDR_RASNJ1PD13J2VBATJ3PI2J4VSS_PLLJ5VDD_PLLJ6VDDCPUJ7VSSJ8VDDCOREJ9VSSU17VSSU16PI7U15PA10U14PI4BOOT0 - (U13USB_DM1U12USB_RREFU11USB_DM2U10NRSTU9PC2U8PC1U7PB0U6PC4U5PA4U4PA5U3PA0U2PA7U1VSST17DDR_DQ14T16DDR_DQ15T15PH4(JTDI)T14BYPASS_REG 1T13USB_DP1T12PA14T11USB_DP2T10PDR_ONT9PE5T8PA6T7PB1T6PF11T5PC3T4PF12T3PC0T2PA11T1PG12R17DDR_DQS1PR16DDR_DQS1NR15DDR_DQ12R14PH5(JTDO)R13VDD_PLL2R12PI6BOOT2 - (R11VDDA1V8_ REGR10PF15 (JTMS/SR9VDDR8VSSR7PC5R6VREF+R5VSSR4PA1R3PWR_CPUON_R2PH3R1PG2P17DDR_DQ9P16DDR_DQ13P15DDR_DQ11P14PWR_ONP13VSS_PLL2P12PI5BOOT1 - (P11VSSP10VDD3V3_ USBHP9PG14P8PG13P7VDDAP6VREF -P5PA2P4PF14(JTCK/SWP3PA13P2PH1OSC OUT -P1PH0OSC IN -_N17DDR_ZQN16DDR_DQ8N15DDR_DQ10N14DDR_DQM1N13PWR_LPN12VDDQ_DDRN11VDDA1V1_ REGN10VSS_USBHSN9NJTRSTN8PA3N7VSSAN6PF13N5PB11N4VSSN3PD7N2PG1N1PE6M17DDR_A6M16DDR_DTO1M15VSSM14DDR_A4M13DDR_VREFM12VDDQ_DDRM11VDDM10VDDM9VDDM8VDDM7VDDM6VDDM5VSS_ANAM4VDD_ANAM3PG11M2PA8M1PF7L17DDR_A14L16DDR_BA1L15DDR_A8L14DDR_DTO0L13DDR_ATOL12VDDQ_DDRL11VSSL10VSSL9VSSL8VSSL7VSSL6VDDL5PG3L4PI0L3PH6L2PF4L1PE2K17DDR_A12K16DDR_A15K15DDR_A1K14DDR_CKEK13DDR_A11K12VDDQ_DDRK11VSSK10VDDCOREK9VDDCOREK8VDDCOREK7VSSK6VDDK5PI1K4PC13K3VSSK2PC15 - OSC32K1PC14 - OSC32J17DDR_CLKNJ16DDR_CLKPJ15DDR_CASNJ14DDR_A10J13VDDCOREJ12VDDQ_DDRJ11VSSJ10VDDCOREGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8190.5185.4180.3175.3170.2165.1160.0154.9149.9144.8139.7134.6129.5124.5119.4114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3-119.4-124.5-129.5-134.6-139.7-144.8-149.9-154.9-160.0-165.1-170.2-175.3-180.3-185.4-190.5mm
2. 2D FOOTPRINT
A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15C16C17D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15D16D17E1E2E3E4E5E6E7E8E9E10E11E12E13E14E15E16E17F1F2F3F4F5F6F7F8F9F10F11F12F13F14F15F16F17G1G2G3G4G5G6G7G8G9G10G11G12G13G14G15G16G17H1H2H3H4H5H6H7H8H9H10H11H12H13H14H15H16H17J1J2J3J4J5J6J7J8J9J10J11J12J13J14J15J16J17K1K2K3K4K5K6K7K8K9K10K11K12K13K14K15K16K17L1L2L3L4L5L6L7L8L9L10L11L12L13L14L15L16L17M1M2M3M4M5M6M7M8M9M10M11M12M13M14M15M16M17N1N2N3N4N5N6N7N8N9N10N11N12N13N14N15N16N17P1P2P3P4P5P6P7P8P9P10P11P12P13P14P15P16P17R1R2R3R4R5R6R7R8R9R10R11R12R13R14R15R16R17T1T2T3T4T5T6T7T8T9T10T11T12T13T14T15T16T17U1U2U3U4U5U6U7U8U9U10U11U12U13U14U15U16U17E=14.00mm · Pitch e=0.80mmD=14.00mm-10-8-6-4-202468101086420-2-4-6-8-10mm
3. 3D CAD MODEL
Package Body: 14.00mm × 14.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (289/289)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VSSGNDGround Reference Pin (VSS)
A2PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, PWM)
A3PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART, SPI, RTC/CLK)
A4PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
A5PE7I/OMultiplexed I/O & Peripheral Pin PE7 (UART)
A6PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
A7PE8I/OMultiplexed I/O & Peripheral Pin PE8 (UART, PWM)
A8PG4I/OMultiplexed I/O & Peripheral Pin PG4 (UART)
A9PH9I/OMultiplexed I/O & Peripheral Pin PH9 (SPI, PWM)
A10PH13I/OMultiplexed I/O & Peripheral Pin PH13 (UART, SPI, PWM)
A11PC7I/OMultiplexed I/O & Peripheral Pin PC7 (UART, PWM)
A12PB9I/OMultiplexed I/O & Peripheral Pin PB9 (I2C)
A13PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART)
A14PG6I/OMultiplexed I/O & Peripheral Pin PG6 (UART, PWM)
A15PD2I/OMultiplexed I/O & Peripheral Pin PD2 (SPI, I2C)
A16PC9I/OMultiplexed I/O & Peripheral Pin PC9 (UART, PWM)
A17VSSGNDGround Reference Pin (VSS)
B1PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI, PWM)
B2PF5I/OMultiplexed I/O & Peripheral Pin PF5 (I2C)
B3PD14I/OMultiplexed I/O & Peripheral Pin PD14 (UART, PWM)
B4PE12I/OMultiplexed I/O & Peripheral Pin PE12 (UART, SPI, PWM)
B5PE1I/OMultiplexed I/O & Peripheral Pin PE1 (UART)
B6PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
B7PH14I/OMultiplexed I/O & Peripheral Pin PH14 (General)
B8PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
B9PF1I/OMultiplexed I/O & Peripheral Pin PF1 (SPI, I2C)
B10PF3I/OMultiplexed I/O & Peripheral Pin PF3 (SPI)
B11PC6I/OMultiplexed I/O & Peripheral Pin PC6 (UART, PWM)
B12PB15I/OMultiplexed I/O & Peripheral Pin PB15 (UART, SPI, RTC/CLK)
B13PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI, PWM)
B14PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI, I2C)
B15PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART)
B16DDR_DQ4I/OMultiplexed I/O & Peripheral Pin DDR_DQ4 (General)
B17DDR_DQ0I/OMultiplexed I/O & Peripheral Pin DDR_DQ0 (General)
C1PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, PWM)
C2PH12I/OMultiplexed I/O & Peripheral Pin PH12 (UART, SPI)
C3PE14I/OMultiplexed I/O & Peripheral Pin PE14 (UART)
C4PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI, PWM)
C5PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
C6PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C)
C7PD15I/OMultiplexed I/O & Peripheral Pin PD15 (UART)
C8VSSGNDGround Reference Pin (VSS)
C9PG7I/OMultiplexed I/O & Peripheral Pin PG7 (UART, SPI)
C10PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM)
C11PB3I/OMultiplexed I/O & Peripheral Pin PB3 (SPI)
C12VDDSD1PowerPower Supply Input (VDDSD1 — 3.3V VDD (Max 4.0V))
C13PF0I/OMultiplexed I/O & Peripheral Pin PF0 (UART)
C14PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI, I2C)
C15DDR_DQ1I/OMultiplexed I/O & Peripheral Pin DDR_DQ1 (General)
C16DDR_DQS0NI/OMultiplexed I/O & Peripheral Pin DDR_DQS0N (General)
C17DDR_DQS0PI/OMultiplexed I/O & Peripheral Pin DDR_DQS0P (General)
D1PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, I2C)
D2PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, I2C)
D3VSSGNDGround Reference Pin (VSS)
D4PE11I/OMultiplexed I/O & Peripheral Pin PE11 (UART, SPI, PWM)
D5PD1I/OMultiplexed I/O & Peripheral Pin PD1 (UART, SPI, I2C)
D6PE0I/OMultiplexed I/O & Peripheral Pin PE0 (UART)
D7PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
D8PE15I/OMultiplexed I/O & Peripheral Pin PE15 (UART, SPI, I2C)
D9PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, I2C)
D10PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
D11VDDSD2PowerPower Supply Input (VDDSD2 — 3.3V VDD (Max 4.0V))
D12VSSGNDGround Reference Pin (VSS)
D13PE3I/OMultiplexed I/O & Peripheral Pin PE3 (UART, SPI)
D14PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, SPI, PWM)
D15DDR_DQM0I/OMultiplexed I/O & Peripheral Pin DDR_DQM0 (General)
D16DDR_DQ5I/OMultiplexed I/O & Peripheral Pin DDR_DQ5 (General)
D17DDR_DQ3I/OMultiplexed I/O & Peripheral Pin DDR_DQ3 (General)
E1PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART, I2C)
E2PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, SPI)
E3PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART)
E4PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
E5VSSGNDGround Reference Pin (VSS)
E6PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART)
E7PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, SPI)
E8PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
E9PF2I/OMultiplexed I/O & Peripheral Pin PF2 (UART, I2C)
E10PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C)
E11PH10I/OMultiplexed I/O & Peripheral Pin PH10 (UART, SPI)
E12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
E13DDR_DQ2I/OMultiplexed I/O & Peripheral Pin DDR_DQ2 (General)
E14DDR_DQ6I/OMultiplexed I/O & Peripheral Pin DDR_DQ6 (General)
E15DDR_DQ7I/OMultiplexed I/O & Peripheral Pin DDR_DQ7 (General)
E16DDR_A5I/OMultiplexed I/O & Peripheral Pin DDR_A5 (General)
E17DDR_RESETNISystem Enable & Hardware Reset (DDR_RESETN)
F1PG10I/OMultiplexed I/O & Peripheral Pin PG10 (UART, SPI)
F2PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
F3PG8I/OMultiplexed I/O & Peripheral Pin PG8 (UART, SPI, PWM)
F4PH2I/OMultiplexed I/O & Peripheral Pin PH2 (General)
F5PH8I/OMultiplexed I/O & Peripheral Pin PH8 (UART)
F6VDDCPUPowerPower Supply Input (VDDCPU — 3.3V VDD (Max 4.0V))
F7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F8VDDCPUPowerPower Supply Input (VDDCPU — 3.3V VDD (Max 4.0V))
F9VDDCPUPowerPower Supply Input (VDDCPU — 3.3V VDD (Max 4.0V))
F10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
F13VSSGNDGround Reference Pin (VSS)
F14DDR_A13I/OMultiplexed I/O & Peripheral Pin DDR_A13 (General)
F15VSSGNDGround Reference Pin (VSS)
F16DDR_A9I/OMultiplexed I/O & Peripheral Pin DDR_A9 (General)
F17DDR_A2I/OMultiplexed I/O & Peripheral Pin DDR_A2 (General)
G1PF9I/OMultiplexed I/O & Peripheral Pin PF9 (UART)
G2PF6I/OMultiplexed I/O & Peripheral Pin PF6 (UART)
G3PF10I/OMultiplexed I/O & Peripheral Pin PF10 (UART)
G4PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART, SPI)
G5PF8I/OMultiplexed I/O & Peripheral Pin PF8 (UART)
G6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G7VSSGNDGround Reference Pin (VSS)
G8VSSGNDGround Reference Pin (VSS)
G9VSSGNDGround Reference Pin (VSS)
G10VSSGNDGround Reference Pin (VSS)
G11VSSGNDGround Reference Pin (VSS)
G12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
G13DDR_BA2I/OMultiplexed I/O & Peripheral Pin DDR_BA2 (General)
G14DDR_A7I/OMultiplexed I/O & Peripheral Pin DDR_A7 (General)
G15DDR_A3I/OMultiplexed I/O & Peripheral Pin DDR_A3 (General)
G16DDR_A0I/OMultiplexed I/O & Peripheral Pin DDR_A0 (General)
G17DDR_BA0I/OMultiplexed I/O & Peripheral Pin DDR_BA0 (General)
H1PH11I/OMultiplexed I/O & Peripheral Pin PH11 (SPI, I2C)
H2PI3I/OMultiplexed I/O & Peripheral Pin PI3 (General)
H3PH7I/OMultiplexed I/O & Peripheral Pin PH7 (SPI)
H4PB2I/OMultiplexed I/O & Peripheral Pin PB2 (UART, RTC/CLK)
H5PE4I/OMultiplexed I/O & Peripheral Pin PE4 (UART, SPI)
H6VDDCPUPowerPower Supply Input (VDDCPU — 3.3V VDD (Max 4.0V))
H7VSSGNDGround Reference Pin (VSS)
H8VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H9VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H10VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H11VSSGNDGround Reference Pin (VSS)
H12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
H13DDR_WENI/OMultiplexed I/O & Peripheral Pin DDR_WEN (General)
H14VSSGNDGround Reference Pin (VSS)
H15DDR_ODTI/OMultiplexed I/O & Peripheral Pin DDR_ODT (General)
H16DDR_CSNI/OMultiplexed I/O & Peripheral Pin DDR_CSN (SPI)
H17DDR_RASNI/OMultiplexed I/O & Peripheral Pin DDR_RASN (General)
J1PD13I/OMultiplexed I/O & Peripheral Pin PD13 (PWM)
J2VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
J3PI2I/OMultiplexed I/O & Peripheral Pin PI2 (General)
J4VSS_PLLGNDGround Reference Pin (VSS_PLL)
J5VDD_PLLPowerPower Supply Input (VDD_PLL — 3.3V VDD (Max 4.0V))
J6VDDCPUPowerPower Supply Input (VDDCPU — 3.3V VDD (Max 4.0V))
J7VSSGNDGround Reference Pin (VSS)
J8VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
J9VSSGNDGround Reference Pin (VSS)
J10VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
J11VSSGNDGround Reference Pin (VSS)
J12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
J13VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
J14DDR_A10I/OMultiplexed I/O & Peripheral Pin DDR_A10 (General)
J15DDR_CASNI/OMultiplexed I/O & Peripheral Pin DDR_CASN (General)
J16DDR_CLKPI/OMultiplexed I/O & Peripheral Pin DDR_CLKP (General)
J17DDR_CLKNI/OMultiplexed I/O & Peripheral Pin DDR_CLKN (General)
K1PC14 - OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (RTC/CLK)
K2PC15 - OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_OUT (RTC/CLK)
K3VSSGNDGround Reference Pin (VSS)
K4PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
K5PI1I/OMultiplexed I/O & Peripheral Pin PI1 (RTC/CLK)
K6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K7VSSGNDGround Reference Pin (VSS)
K8VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
K9VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
K10VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
K11VSSGNDGround Reference Pin (VSS)
K12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
K13DDR_A11I/OMultiplexed I/O & Peripheral Pin DDR_A11 (General)
K14DDR_CKEI/OMultiplexed I/O & Peripheral Pin DDR_CKE (General)
K15DDR_A1I/OMultiplexed I/O & Peripheral Pin DDR_A1 (General)
K16DDR_A15I/OMultiplexed I/O & Peripheral Pin DDR_A15 (General)
K17DDR_A12I/OMultiplexed I/O & Peripheral Pin DDR_A12 (General)
L1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (UART, I2C)
L2PF4I/OMultiplexed I/O & Peripheral Pin PF4 (UART)
L3PH6I/OMultiplexed I/O & Peripheral Pin PH6 (UART, SPI, I2C)
L4PI0I/OMultiplexed I/O & Peripheral Pin PI0 (General)
L5PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
L6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L7VSSGNDGround Reference Pin (VSS)
L8VSSGNDGround Reference Pin (VSS)
L9VSSGNDGround Reference Pin (VSS)
L10VSSGNDGround Reference Pin (VSS)
L11VSSGNDGround Reference Pin (VSS)
L12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
L13DDR_ATOI/OMultiplexed I/O & Peripheral Pin DDR_ATO (General)
L14DDR_DTO0I/OMultiplexed I/O & Peripheral Pin DDR_DTO0 (General)
L15DDR_A8I/OMultiplexed I/O & Peripheral Pin DDR_A8 (General)
L16DDR_BA1I/OMultiplexed I/O & Peripheral Pin DDR_BA1 (General)
L17DDR_A14I/OMultiplexed I/O & Peripheral Pin DDR_A14 (General)
M1PF7I/OMultiplexed I/O & Peripheral Pin PF7 (UART)
M2PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, RTC/CLK)
M3PG11I/OMultiplexed I/O & Peripheral Pin PG11 (UART)
M4VDD_ANAPowerPower Supply Input (VDD_ANA — 3.3V VDD (Max 4.0V))
M5VSS_ANAGNDGround Reference Pin (VSS_ANA)
M6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
M13DDR_VREFAnalogMultiplexed I/O & Peripheral Pin DDR_VREF (General)
M14DDR_A4I/OMultiplexed I/O & Peripheral Pin DDR_A4 (General)
M15VSSGNDGround Reference Pin (VSS)
M16DDR_DTO1I/OMultiplexed I/O & Peripheral Pin DDR_DTO1 (General)
M17DDR_A6I/OMultiplexed I/O & Peripheral Pin DDR_A6 (General)
N1PE6I/OMultiplexed I/O & Peripheral Pin PE6 (UART, SPI, I2C, RTC/CLK)
N2PG1I/OMultiplexed I/O & Peripheral Pin PG1 (UART, SPI)
N3PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART, I2C, RTC/CLK)
N4VSSGNDGround Reference Pin (VSS)
N5PB11I/OMultiplexed I/O & Peripheral Pin PB11 (I2C, PWM)
N6PF13I/OMultiplexed I/O & Peripheral Pin PF13 (UART, ADC)
N7VSSAGNDGround Reference Pin (VSSA)
N8PA3I/OMultiplexed I/O & Peripheral Pin PA3 (SPI, ADC, PWM)
N9NJTRSTI/OMultiplexed I/O & Peripheral Pin NJTRST (SWD/JTAG)
N10VSS_USBHSGNDGround Reference Pin (VSS_USBHS)
N11VDDA1V1_ REGPowerPower Supply Input (VDDA1V1_ REG — 3.3V VDD (Max 4.0V))
N12VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
N13PWR_LPI/OMultiplexed I/O & Peripheral Pin PWR_LP (General)
N14DDR_DQM1I/OMultiplexed I/O & Peripheral Pin DDR_DQM1 (General)
N15DDR_DQ10I/OMultiplexed I/O & Peripheral Pin DDR_DQ10 (General)
N16DDR_DQ8I/OMultiplexed I/O & Peripheral Pin DDR_DQ8 (General)
N17DDR_ZQI/OMultiplexed I/O & Peripheral Pin DDR_ZQ (General)
P1PH0OSC IN -_I/OMultiplexed I/O & Peripheral Pin PH0OSC IN -_ (RTC/CLK)
P2PH1OSC OUT -_I/OMultiplexed I/O & Peripheral Pin PH1OSC OUT -_ (RTC/CLK)
P3PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, RTC/CLK)
P4PF14(JTCK/SW CLK)I/OMultiplexed I/O & Peripheral Pin PF14(JTCK/SW CLK) (SWD/JTAG)
P5PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
P6VREF -AnalogMultiplexed I/O & Peripheral Pin VREF - (General)
P7VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
P8PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, SPI, ADC)
P9PG14I/OMultiplexed I/O & Peripheral Pin PG14 (UART)
P10VDD3V3_ USBHSPowerPower Supply Input (VDD3V3_ USBHS — 3.3V VDD (Max 4.0V))
P11VSSGNDGround Reference Pin (VSS)
P12PI5BOOT1 - (BOOT1)I/OMultiplexed I/O & Peripheral Pin PI5BOOT1 - (BOOT1) (General)
P13VSS_PLL2GNDGround Reference Pin (VSS_PLL2)
P14PWR_ONI/OMultiplexed I/O & Peripheral Pin PWR_ON (General)
P15DDR_DQ11I/OMultiplexed I/O & Peripheral Pin DDR_DQ11 (General)
P16DDR_DQ13I/OMultiplexed I/O & Peripheral Pin DDR_DQ13 (General)
P17DDR_DQ9I/OMultiplexed I/O & Peripheral Pin DDR_DQ9 (General)
R1PG2I/OMultiplexed I/O & Peripheral Pin PG2 (RTC/CLK)
R2PH3I/OMultiplexed I/O & Peripheral Pin PH3 (I2C)
R3PWR_CPUON_I/OMultiplexed I/O & Peripheral Pin PWR_CPUON_ (General)
R4PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
R5VSSGNDGround Reference Pin (VSS)
R6VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
R7PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, SPI, ADC)
R8VSSGNDGround Reference Pin (VSS)
R9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
R10PF15 (JTMS/SWDIO)I/OMultiplexed I/O & Peripheral Pin PF15 (JTMS/SWDIO) (SWD/JTAG)
R11VDDA1V8_ REGPowerPower Supply Input (VDDA1V8_ REG — 3.3V VDD (Max 4.0V))
R12PI6BOOT2 - (BOOT2)I/OMultiplexed I/O & Peripheral Pin PI6BOOT2 - (BOOT2) (General)
R13VDD_PLL2PowerPower Supply Input (VDD_PLL2 — 3.3V VDD (Max 4.0V))
R14PH5(JTDO)I/OMultiplexed I/O & Peripheral Pin PH5(JTDO) (SWD/JTAG)
R15DDR_DQ12I/OMultiplexed I/O & Peripheral Pin DDR_DQ12 (General)
R16DDR_DQS1NI/OMultiplexed I/O & Peripheral Pin DDR_DQS1N (General)
R17DDR_DQS1PI/OMultiplexed I/O & Peripheral Pin DDR_DQS1P (General)
T1PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART)
T2PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
T3PC0I/OMultiplexed I/O & Peripheral Pin PC0 (UART, SPI, ADC)
T4PF12I/OMultiplexed I/O & Peripheral Pin PF12 (SPI, ADC)
T5PC3I/OMultiplexed I/O & Peripheral Pin PC3 (UART, SPI, ADC)
T6PF11I/OMultiplexed I/O & Peripheral Pin PF11 (UART, ADC)
T7PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, SPI, ADC, PWM)
T8PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC)
T9PE5I/OMultiplexed I/O & Peripheral Pin PE5 (UART, SPI)
T10PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
T11USB_DP2I/OMultiplexed I/O & Peripheral Pin USB_DP2 (USB)
T12PA14I/OMultiplexed I/O & Peripheral Pin PA14 (RTC/CLK)
T13USB_DP1I/OMultiplexed I/O & Peripheral Pin USB_DP1 (USB)
T14BYPASS_REG 1V8I/OMultiplexed I/O & Peripheral Pin BYPASS_REG 1V8 (General)
T15PH4(JTDI)I/OMultiplexed I/O & Peripheral Pin PH4(JTDI) (SWD/JTAG)
T16DDR_DQ15I/OMultiplexed I/O & Peripheral Pin DDR_DQ15 (General)
T17DDR_DQ14I/OMultiplexed I/O & Peripheral Pin DDR_DQ14 (General)
U1VSSGNDGround Reference Pin (VSS)
U2PA7I/OMultiplexed I/O & Peripheral Pin PA7 (UART, SPI, ADC, PWM)
U3PA0I/OMultiplexed I/O & Peripheral Pin PA0 (ADC, PWM)
U4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (UART, SPI, ADC)
U5PA4I/OMultiplexed I/O & Peripheral Pin PA4 (SPI, ADC)
U6PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
U7PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
U8PC1I/OMultiplexed I/O & Peripheral Pin PC1 (ADC)
U9PC2I/OMultiplexed I/O & Peripheral Pin PC2 (UART, SPI, ADC)
U10NRSTISystem Enable & Hardware Reset (NRST)
U11USB_DM2I/OMultiplexed I/O & Peripheral Pin USB_DM2 (USB)
U12USB_RREFI/OMultiplexed I/O & Peripheral Pin USB_RREF (USB)
U13USB_DM1I/OMultiplexed I/O & Peripheral Pin USB_DM1 (USB)
U14PI4BOOT0 - (BOOT0)I/OMultiplexed I/O & Peripheral Pin PI4BOOT0 - (BOOT0) (General)
U15PA10I/OMultiplexed I/O & Peripheral Pin PA10 (PWM)
U16PI7I/OMultiplexed I/O & Peripheral Pin PI7 (General)
U17VSSGNDGround Reference Pin (VSS)
PIN A1 VSS
GND
Ground Reference Pin (VSS)
Design note: 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 11 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32MP135DAE7 (ST · LFBGA-289(14x14))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32MP135DAE7 (LFBGA-289(14x14)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32MP135DAE7 (LFBGA-289(14x14)) - 2. Standard Pinout (Top View)
True package pinout (289 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32MP135DAE7 (LFBGA-289(14x14)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32MP135DAE7 (LFBGA-289(14x14)) - 4. Package Dimensions (D×E×A)
LFBGA-289(14x14) · 14.00×14.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32MP135DAE7 (LFBGA-289(14x14)) - 5. Recommended Land Pattern
IPC-7351B Footprint (289 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32MP135DAE7 (LFBGA-289(14x14)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (11 figures · Page 1/1)
Showing 1–11 of 11 uncropped original figures for STM32MP135
P49 · p49_fig01EXACT PACKAGE
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 5. STM32MP135A/D LFBGA289 ballout
Figure 5. STM32MP135A/D LFBGA289 ballout
P50 · p50_fig01EXACT PACKAGE
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 6. STM32MP135A/D TFBGA289 ballout
Figure 6. STM32MP135A/D TFBGA289 ballout
P211 · p211_fig01EXACT PACKAGE
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 61. LFBGA289 - Recommended footprint
Figure 61. LFBGA289 - Recommended footprint
P212 · p212_fig01EXACT PACKAGE
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 62. TFBGA289 - Outline
Figure 62. TFBGA289 - Outline
P212 · p212_fig02EXACT PACKAGE
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 62. TFBGA289 - Outline
Figure 62. TFBGA289 - Outline
P214 · p214_fig01EXACT PACKAGE
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 63. TFBGA289 - Recommended footprint
Figure 63. TFBGA289 - Recommended footprint
P1 · p01_fig011751×510px
STM32MP135DAE7 (LFBGA-289(14x14)) — • 32-bit Arm® Cortex®-A7 - L1 32-Kbyte I / 32-Kbyte D - 128-Kbyte unified level 2 cache - Arm® NEON™ and Arm® TrustZone®
• 32-bit Arm® Cortex®-A7 - L1 32-Kbyte I / 32-Kbyte D - 128-Kbyte unified level 2 cache - Arm® NEON™ and Arm® TrustZone®
P101 · p101_fig011751×2074px
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 10. Power supply scheme
Figure 10. Power supply scheme
P127 · p127_fig011546×499px
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 18. Typical application with a 24 MHz crystal fHSE CL1
Figure 18. Typical application with a 24 MHz crystal fHSE CL1
P128 · p128_fig011546×521px
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 19. Typical application with a 32.768 kHz crystal
Figure 19. Typical application with a 32.768 kHz crystal
P51 · p51_fig01EXACT PACKAGE
STM32MP135DAE7 (LFBGA-289(14x14)) — Figure 6. STM32MP135A/D TFBGA289 ballout [TFBGA-289(9x9)]
Figure 6. STM32MP135A/D TFBGA289 ballout [TFBGA-289(9x9)]

Technical Specifications & Part Details (STM32MP135DAE7)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32MP135DAE7 (LFBGA-289(14x14)) is a 289-pin embedded microcontroller unit (mcu) featuring a 14.00 × 14.00 × 1.07 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
1 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
145 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
14.00 × 14.00 × 1.07 mm (A1=0.25 mm)
Package family: BGA (LFBGA-289(14x14))
Pin Count & Lead PitchN / e
289 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PI5BOOT1 - (BOOT1), PI4BOOT0 - (BOOT0)): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol289 auto-grouped pins
OK
IPC-7351B Land Pattern289 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32MP135 (8)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (LFBGA-289(14x14))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.07mm · e=0.80mm
Pad Size (W × L)Level B
0.34 × 0.34 mm
Pins / Total PadsTopology
289P / 289Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LFBGA-289(14x14)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32MP135DAE7 (LFBGA-289(14x14))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32MP135DAE7 (LFBGA-289(14x14))?

Manufactured by ST, the STM32MP135DAE7 is housed in a LFBGA-289(14x14) package with 289 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PA9: Multiplexed I/O & Peripheral Pin PA9 (UART, PWM)), A3 (PD10: Multiplexed I/O & Peripheral Pin PD10 (UART, SPI, RTC/CLK)), A4 (PB7: Multiplexed I/O & Peripheral Pin PB7 (General)), A5 (PE7: Multiplexed I/O & Peripheral Pin PE7 (UART)), A6 (PD5: Multiplexed I/O & Peripheral Pin PD5 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32MP135DAE7?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32MP135DAE7 (LFBGA-289(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.80 mm, and 289 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32MP135DAE7?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32MP135DAE7 (ST, LFBGA-289(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (289 pins) & STM32MP135 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A2PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, PWM.
A3PD10Digital_IOSignal terminal PD10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: UART, SPI, RTC/CLK.
A4PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
A5PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: UART.
A6PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
A7PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: UART, PWM.
A8PG4Digital_IOSignal terminal PG4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG4. Supported peripheral buses: UART.
A9PH9Digital_IOSignal terminal PH9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: SPI, PWM.
A10PH13Digital_IOSignal terminal PH13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI, PWM.
A11PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: UART, PWM.
A12PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: I2C.
A13PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: UART.
A14PG6Digital_IOSignal terminal PG6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG6. Supported peripheral buses: UART, PWM.
A15PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI3_NSS. Supported peripheral buses: SPI, I2C.
A16PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: UART, PWM.
A17VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B1PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: UART, SPI, PWM.
B2PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: I2C.
B3PD14Digital_IOSignal terminal PD14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: UART, PWM.
B4PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: UART, SPI, PWM.
B5PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: UART.
B6PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: PWM.
B7PH14Digital_IOSignal terminal PH14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: General.
B8PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: PWM.
B9PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI3_MOSI. Supported peripheral buses: SPI, I2C.
B10PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO, SPI3_NSS. Supported peripheral buses: SPI.
B11PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: UART, PWM.
B12PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: UART, SPI, RTC/CLK.
B13PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: UART, SPI, PWM.
B14PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL, SPI3_SCK. Supported peripheral buses: UART, SPI, I2C.
B15PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: UART.
B16DDR_DQ4Digital_IOSignal terminal DDR_DQ4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQ4. Supported peripheral buses: General.
B17DDR_DQ0Digital_IOSignal terminal DDR_DQ0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQ0. Supported peripheral buses: General.
C1PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART, PWM.
C2PH12Digital_IOSignal terminal PH12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI5_MOSI_SAI1SCKA. Supported peripheral buses: UART, SPI.
C3PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: UART.
C4PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: SPI, PWM.
C5PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: UART.
C6PD12Digital_IOSignal terminal PD12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
C7PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: UART.
C8VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C9PG7Digital_IOSignal terminal PG7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
C10PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, I2C, PWM.
C11PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
C12VDDSD1Power_InPrimary positive power supply input (VDDSD1) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C13PF0Digital_IOSignal terminal PF0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: UART.
C14PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C.
C15DDR_DQ1Digital_IOSignal terminal DDR_DQ1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQ1. Supported peripheral buses: General.
C16DDR_DQS0NDigital_IOSignal terminal DDR_DQS0N (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQS0N. Supported peripheral buses: General.
C17DDR_DQS0PDigital_IOSignal terminal DDR_DQS0P (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQS0P. Supported peripheral buses: General.
D1PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: UART, I2C.
D2PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: UART, I2C.
D3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D4PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: UART, SPI, PWM.
D5PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SCL, SPI4_MOSI. Supported peripheral buses: UART, SPI, I2C.
D6PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: UART.
D7PG0Digital_IOSignal terminal PG0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
D8PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SCL. Supported peripheral buses: UART, SPI, I2C.
D9PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA. Supported peripheral buses: UART, I2C.
D10PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SMBA, SPI4_NSS, SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, PWM.
D11VDDSD2Power_InPrimary positive power supply input (VDDSD2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D13PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: UART, SPI.
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