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STM32L422KBT6 (LQFP-32(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32L422KBT6

STID: C529444LQFP-32(7x7) · 32 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32L422KBT6 (LQFP-32(7x7))1VDD2PC14OSC32 IN33V34NRST5VDDA/VREF+6PA0 CK IN -_7PA18PA29PA310PA411PA512PA613PA714PB015PB116VSS32VSS31PH3BOOT0 - (30PB729PB628PB527PB4(NJTRST)26PB3 (JTDO/TR25PA15(JTDI)24PA14 (JTCK/S23PA13 (JTMS/S22PA1221PA1120PA1019PA918PA817VDDGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.825.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132E=7.00mm · Pitch e=0.80mmD=7.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (32/32)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
2PC14OSC32 IN -_ (PC14)I/OMultiplexed I/O & Peripheral Pin PC14OSC32 IN -_ (PC14) (RTC/CLK)
33V3Power3.3V Main Power Supply Rail (3.0V ~ 3.6V)
4NRSTISystem Enable & Hardware Reset (NRST)
5VDDA/VREF+PowerPower Supply Input (VDDA/VREF+ — 3.3V VDD (Max 4.0V))
6PA0 CK IN -_I/OMultiplexed I/O & Peripheral Pin PA0 CK IN -_ (PWM, RTC/CLK)
7PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, I2C)
8PA2I/OMultiplexed I/O & Peripheral Pin PA2 (ADC, PWM)
9PA3I/OMultiplexed I/O & Peripheral Pin PA3 (ADC, PWM)
10PA4I/OMultiplexed I/O & Peripheral Pin PA4 (SPI)
11PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
12PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, ADC)
13PA7I/OMultiplexed I/O & Peripheral Pin PA7 (I2C, ADC)
14PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC)
15PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART)
16VSSGNDGround Reference Pin (VSS)
17VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
18PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, RTC/CLK)
19PA9I/OMultiplexed I/O & Peripheral Pin PA9 (I2C)
20PA10I/OMultiplexed I/O & Peripheral Pin PA10 (USB, I2C)
21PA11I/OMultiplexed I/O & Peripheral Pin PA11 (USB)
22PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART)
23PA13 (JTMS/SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13 (JTMS/SWDIO) (USB, SWD/JTAG)
24PA14 (JTCK/SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14 (JTCK/SWCLK) (I2C, SWD/JTAG)
25PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (UART, SWD/JTAG)
26PB3 (JTDO/TRACES WO)I/OMultiplexed I/O & Peripheral Pin PB3 (JTDO/TRACES WO) (UART, SPI, SWD/JTAG)
27PB4(NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTRST) (UART, SPI, I2C, SWD/JTAG)
28PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C)
29PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
30PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
31PH3BOOT0 - (BOOT0)I/OMultiplexed I/O & Peripheral Pin PH3BOOT0 - (BOOT0) (General)
32VSSGNDGround Reference Pin (VSS)
PIN 1 VDD
Power
Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 24 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32L422KBT6 (ST · LQFP-32(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32L422KBT6 (LQFP-32(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32L422KBT6 (LQFP-32(7x7)) - 2. Standard Pinout (Top View)
True package pinout (32 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32L422KBT6 (LQFP-32(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32L422KBT6 (LQFP-32(7x7)) - 4. Package Dimensions (D×E×A)
LQFP-32(7x7) · 7.00×7.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32L422KBT6 (LQFP-32(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (32 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32L422KBT6 (LQFP-32(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (24 figures · Page 1/2)
Showing 1–12 of 24 uncropped original figures for STM32L422
P1 · p01_fig01EXACT PACKAGE
STM32L422KBT6 (LQFP-32(7x7)) — • RTC with HW calendar, alarms and calibration
• RTC with HW calendar, alarms and calibration
P53 · p53_fig01EXACT PACKAGE
STM32L422KBT6 (LQFP-32(7x7)) — Figure 9. STM32L422Tx WLCSP36 ballout(1)
Figure 9. STM32L422Tx WLCSP36 ballout(1)
P53 · p53_fig02EXACT PACKAGE
STM32L422KBT6 (LQFP-32(7x7)) — Figure 10. STM32L422Kx LQFP32 pinout(1)
Figure 10. STM32L422Kx LQFP32 pinout(1)
P54 · p54_fig01EXACT PACKAGE
STM32L422KBT6 (LQFP-32(7x7)) — Figure 11. STM32L422Kx UFQFPN32 pinout(1)
Figure 11. STM32L422Kx UFQFPN32 pinout(1)
P175 · p175_fig01EXACT PACKAGE
STM32L422KBT6 (LQFP-32(7x7)) — Figure 53. LQFP - 32 pins, 7 x 7 mm low-profile quad flat package outline 3%!4).' 0,!.% # !
Figure 53. LQFP - 32 pins, 7 x 7 mm low-profile quad flat package outline 3%!4).' 0,!.% # !
P177 · p177_fig02EXACT PACKAGE
STM32L422KBT6 (LQFP-32(7x7)) — Figure 55. LQFP32 marking (package top view)
Figure 55. LQFP32 marking (package top view)
P53 · p53_fig02P53
STM32L422KBT6 (LQFP-32(7x7)) — Datasheet Page 53 (p53_fig02)
Datasheet Page 53 (p53_fig02)
P72 · p72_fig011546×1275px
STM32L422KBT6 (LQFP-32(7x7)) — Figure 15. Power supply scheme
Figure 15. Power supply scheme
P72 · p72_fig01P72
STM32L422KBT6 (LQFP-32(7x7)) — Datasheet Page 72 (p72_fig01)
Datasheet Page 72 (p72_fig01)
P108 · p108_fig011546×702px
STM32L422KBT6 (LQFP-32(7x7)) — Figure 20. Typical application with an 8 MHz crystal
Figure 20. Typical application with an 8 MHz crystal
P109 · p109_fig011546×702px
STM32L422KBT6 (LQFP-32(7x7)) — Figure 21. Typical application with a 32.768 kHz crystal
Figure 21. Typical application with a 32.768 kHz crystal
P157 · p157_fig011875×1355px
STM32L422KBT6 (LQFP-32(7x7)) — Figure 36. LQFP - 64 pins, 10 x 10 mm low-profile quad flat package
Figure 36. LQFP - 64 pins, 10 x 10 mm low-profile quad flat package
Page 1 / 2 (24 extracted figures)

Technical Specifications & Part Details (STM32L422KBT6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32L422KBT6 (LQFP-32(7x7)) is a 32-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 1.60 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
80 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
23 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-32(7x7))
Pin Count & Lead PitchN / e
32 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PH3BOOT0 - (BOOT0)): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol32 auto-grouped pins
OK
IPC-7351B Land Pattern32 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32L422 (4)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (LQFP-32(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.80mm
Pad Size (W × L)Level B
0.50 × 1.30 mm
Pins / Total PadsTopology
32P / 32Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-32(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32L422KBT6 (LQFP-32(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32L422KBT6 (LQFP-32(7x7))?

Manufactured by ST, the STM32L422KBT6 is housed in a LQFP-32(7x7) package with 32 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), 2 (PC14OSC32 IN -_ (PC14): Multiplexed I/O & Peripheral Pin PC14OSC32 IN -_ (PC14) (RTC/CLK)), 3 (3V3: 3.3V Main Power Supply Rail (3.0V ~ 3.6V)), 4 (NRST: System Enable & Hardware Reset (NRST)), 5 (VDDA/VREF+: Power Supply Input (VDDA/VREF+ — 3.3V VDD (Max 4.0V))), 6 (PA0 CK IN -_: Multiplexed I/O & Peripheral Pin PA0 CK IN -_ (PWM, RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32L422KBT6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32L422KBT6 (LQFP-32(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.80 mm, and 32 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32L422KBT6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32L422KBT6 (ST, LQFP-32(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (32 pins) & STM32L422 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
2PC14OSC32 IN -_ (PC14)Digital_IOSignal terminal PC14OSC32 IN -_ (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14OSC32 IN -_ (PC14). Supported peripheral buses: RTC/CLK.
33V3Power_In3.3V Main Power Supply Rail (3.0V ~ 3.6V)
4NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
5VDDA/VREF+Power_InPrimary positive power supply input (VDDA/VREF+) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
6PA0 CK IN -_Digital_IOSignal terminal PA0 CK IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0 CK IN -_. Supported peripheral buses: PWM, RTC/CLK.
7PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, I2C.
8PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: ADC, PWM.
9PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: ADC, PWM.
10PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSSUSART2CK. Supported peripheral buses: SPI.
11PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
12PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: UART, ADC.
13PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: I2C, ADC.
14PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC.
15PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART.
16VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
17VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
18PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, RTC/CLK.
19PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: I2C.
20PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: USB, I2C.
21PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: USB.
22PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: UART.
23PA13 (JTMS/SWDIO)Digital_IOSignal terminal PA13 (JTMS/SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13 (JTMS/SWDIO). Supported peripheral buses: USB, SWD/JTAG.
24PA14 (JTCK/SWCLK)Digital_IOSignal terminal PA14 (JTCK/SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBAEVENTOUT. Supported peripheral buses: I2C, SWD/JTAG.
25PA15(JTDI)Digital_IOSignal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA15(JTDI). Supported peripheral buses: UART, SWD/JTAG.
26PB3 (JTDO/TRACES WO)Digital_IOSignal terminal PB3 (JTDO/TRACES WO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK_USART1RTSDE. Supported peripheral buses: UART, SPI, SWD/JTAG.
27PB4(NJTRST)Digital_IOSignal terminal PB4(NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SDA, SPI1_MISO. Supported peripheral buses: UART, SPI, I2C, SWD/JTAG.
28PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_MOSIUSART1CK. Supported peripheral buses: SPI, I2C.
29PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
30PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C.
31PH3BOOT0 - (BOOT0)Digital_IOSignal terminal PH3BOOT0 - (BOOT0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH3BOOT0 - (BOOT0). Supported peripheral buses: General.
32VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
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