MIC37100-3.3WS-TR (SOT-223) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of MIC37100-3.3WS-TR (SOT-223)?

Manufactured by MICROCHIP, the MIC37100-3.3WS-TR is housed in a SOT-223 package with 4 pins and a 2.30 mm lead pitch, supporting a VCC supply range of 3.0V to 2.5V. Key pins include: 1 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 2 (GND: Ground Reference Pin (GND)), 3 (OUT: Regulated Power Output (OUT — 3.0V to 2.5V)), 4 (GND: Ground Reference Pin (GND)).

Q: What are the IPC-7351B PCB Footprint dimensions for MIC37100-3.3WS-TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MIC37100-3.3WS-TR (SOT-223) has a nominal body envelope of 3.50 × 6.50 mm, pitch e = 2.30 mm, and 4 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MIC37100-3.3WS-TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MIC37100-3.3WS-TR (MICROCHIP, SOT-223) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 6.50mm × 3.50mm · Pitch: 2.30mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (4/4)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	IN	I/O	Multiplexed I/O & Peripheral Pin IN (General)
2	GND	GND	Ground Reference Pin (GND)
3	OUT	Power	Regulated Power Output (OUT — 3.0V to 2.5V)
4	GND	GND	Ground Reference Pin (GND)

PIN 1 IN

I/O

Multiplexed I/O & Peripheral Pin IN (General)

Design note: Supply(Input) .

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

MIC37100-3.3WS-TR (SOT-223) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

MIC37100-3.3WS-TR (SOT-223) - 2. Standard Pinout (Top View)

True package pinout (4 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

MIC37100-3.3WS-TR (SOT-223) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

MIC37100-3.3WS-TR (SOT-223) - 4. Package Dimensions (D×E×A)

SOT-223 · 6.50×3.50mm · Pitch 2.30mmExpand ›

5. Recommended Land PatternLAND PATTERN

MIC37100-3.3WS-TR (SOT-223) - 5. Recommended Land Pattern

IPC-7351B Footprint (4 Pads)Expand ›

6. Application SchematicSCHEMATIC

MIC37100-3.3WS-TR (SOT-223) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)

Showing 1–12 of 15 uncropped original figures for MIC37100

P2 · p02_fig01EXACT PACKAGE

8 GND

P2 · p02_fig03EXACT PACKAGE

3-Pin SOT223 (S) (Top View)

P18 · p18_fig01EXACT PACKAGE

5.1 Package Marking Information

P1 · p01_fig01376×200px

1A Low-Voltage µCap LDO Regulator

P1 · p01_fig021777×921px

Typical Application

P1 · p01_fig02P1

Datasheet Page 1 (p01_fig02)

P2 · p02_fig03P2

Datasheet Page 2 (p02_fig03)

P14 · p14_fig011365×744px

FIGURE 4-1: Capacitor Requirements. 4.1 Output Capacitor

P19 · p19_fig011570×1663px

MIC37100-3.3WS-TR (SOT-223) — Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging.

P20 · p20_fig011570×1659px

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging.

P20 · p20_fig01P20

Datasheet Page 20 (p20_fig01)

P2 · p02_fig02All Packages in PDF

MIC37102 (ADJUSTABLE)

Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (MIC37100-3.3WS-TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Low-Dropout Linear Voltage Regulator (LDO)

Detailed Overview:MIC37100-3.3WS-TR (SOT-223) is a 4-pin low-dropout linear voltage regulator (ldo) featuring a 6.50 × 3.50 × 1.60 mm mechanical envelope (lead pitch e = 2.30 mm). Rated for 3.0V to 2.5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Standard I/O / Passive interfaces.

Operating Supply VoltageV_CC / V_DD

3.0V to 2.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C ~ +85°C (Industrial Grade)

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

DC / Broadband Passive

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

6.50 × 3.50 × 1.60 mm (A1=0.06 mm)

Package family: SOT223 (SOT-223)

Pin Count & Lead PitchN / e

4 Pins | Pitch e = 2.30 mm (90.6 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

Standard I/O / Passive

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol4 auto-grouped pins

IPC-7351B Land Pattern4 pads · Pitch 2.30mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOT-223)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

6.50 × 3.50 mm

Height (A) & Pitch (e)IPC-7351B

A=1.60mm · e=2.30mm

Pad Size (W × L)Level B

0.95 × 2.00 mm

Pins / Total PadsTopology

4P / 4Pad (SOT_TAB)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit SOT-223	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — MIC37100-3.3WS-TR (SOT-223)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of MIC37100-3.3WS-TR (SOT-223)?

Manufactured by MICROCHIP, the MIC37100-3.3WS-TR is housed in a SOT-223 package with 4 pins and a 2.30 mm lead pitch, supporting a VCC supply range of 3.0V to 2.5V. Key pins include: 1 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 2 (GND: Ground Reference Pin (GND)), 3 (OUT: Regulated Power Output (OUT — 3.0V to 2.5V)), 4 (GND: Ground Reference Pin (GND)).

What are the IPC-7351B PCB Footprint dimensions for MIC37100-3.3WS-TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MIC37100-3.3WS-TR (SOT-223) has a nominal body envelope of 3.50 × 6.50 mm, pitch e = 2.30 mm, and 4 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MIC37100-3.3WS-TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MIC37100-3.3WS-TR (MICROCHIP, SOT-223) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (4 pins) & MIC37100 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	IN	Digital_IO	Signal terminal IN (I/O, 3.0V to 2.5V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General.
2	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
3	OUT	Power_Out	Regulated power output rail (OUT) operating in the 3.0V to 2.5V domain (Max rating: 3.0V).
4	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.

4D Studio: MIC37100-3.3WS-TR Permalink: /part/C512207 MICROCHIP SOT-223 All Packages All Manufacturers