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MCP1810T-33I/TT (SOT-23-3) — Symbol, Footprint IPC-7351B & 3D STEP Model

MCP1810T-33I/TT

MICROCHIPID: C510886SOT-23-3 · 3 Pins · Pitch 1.90mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · MCP1810T-33I/TT (SOT-23-3)1V OUT2V IN3GNDGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.810.25.10-5.1-10.2mm
2. 2D FOOTPRINT
123E=2.90mm · Pitch e=1.90mmD=1.30mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 2.90mm × 1.30mm · Pitch: 1.90mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (3/3)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1V OUTI/OMultiplexed I/O & Peripheral Pin V OUT (General)
2V INI/OMultiplexed I/O & Peripheral Pin V IN (General)
3GNDGNDGround Reference Pin (GND)
PIN 1 V OUT
I/O
Multiplexed I/O & Peripheral Pin V OUT (General)
Design note: RegulatedOutputVoltage
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 18 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: MCP1810T-33I/TT (MICROCHIP · SOT-23-3)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
MCP1810T-33I/TT (SOT-23-3) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
MCP1810T-33I/TT (SOT-23-3) - 2. Standard Pinout (Top View)
True package pinout (3 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
MCP1810T-33I/TT (SOT-23-3) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
MCP1810T-33I/TT (SOT-23-3) - 4. Package Dimensions (D×E×A)
SOT-23-3 · 2.90×1.30mm · Pitch 1.90mmExpand ›
5. Recommended Land PatternLAND PATTERN
MCP1810T-33I/TT (SOT-23-3) - 5. Recommended Land Pattern
IPC-7351B Footprint (3 Pads)Expand ›
6. Application SchematicSCHEMATIC
MCP1810T-33I/TT (SOT-23-3) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (18 figures · Page 1/2)
Showing 1–12 of 18 uncropped original figures for MCP1810
P1 · p01_fig03EXACT PACKAGE
MCP1810T-33I/TT (SOT-23-3) — MCP1810 2x2 VDFN*
MCP1810 2x2 VDFN*
P23 · p23_fig04EXACT PACKAGE
MCP1810T-33I/TT (SOT-23-3) — 5-Lead SOT23 Example
5-Lead SOT23 Example
P23 · p23_fig05EXACT PACKAGE
MCP1810T-33I/TT (SOT-23-3) — 5-Lead SOT23 Example
5-Lead SOT23 Example
P31 · p31_fig01EXACT PACKAGE
MCP1810T-33I/TT (SOT-23-3) —  2016-2018 Microchip Technology Inc. DS20005623B-page 31 | RECOMMENDED LAND PATTERN | 5-Lead Plastic Small Outline Transistor (OT) [SOT23] | For the most current package drawings, please see the Microchip Packaging Specification located at
 2016-2018 Microchip Technology Inc. DS20005623B-page 31 | RECOMMENDED LAND PATTERN | 5-Lead Plastic Small Outline Transistor (OT) [SOT23] | For the most current package drawings, please see the Microchip Packaging Specification located at
P1 · p01_fig01377×200px
MCP1810T-33I/TT (SOT-23-3) — Ultra-Low Quiescent Current LDO Regulator
Ultra-Low Quiescent Current LDO Regulator
P1 · p01_fig02856×611px
MCP1810T-33I/TT (SOT-23-3) — 1 2
1 2
P2 · p02_fig011551×836px
MCP1810T-33I/TT (SOT-23-3) — Functional Block Diagram
Functional Block Diagram
P2 · p02_fig021777×844px
MCP1810T-33I/TT (SOT-23-3) — Functional Block Diagram | VIN | SHDN | Voltage Reference | VOUT | FB + | - | GND | Overcurrent | SHDN
Functional Block Diagram | VIN | SHDN | Voltage Reference | VOUT | FB + | - | GND | Overcurrent | SHDN
P2 · p02_fig01P2
MCP1810T-33I/TT (SOT-23-3) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P22 · p22_fig011778×1234px
MCP1810T-33I/TT (SOT-23-3) — 5.3 Typical Application Examples
5.3 Typical Application Examples
P22 · p22_fig021779×1062px
MCP1810T-33I/TT (SOT-23-3) — 5.3 Typical Application Examples
5.3 Typical Application Examples
P23 · p23_fig04P23
MCP1810T-33I/TT (SOT-23-3) — Datasheet Page 23 (p23_fig04)
Datasheet Page 23 (p23_fig04)
Page 1 / 2 (18 extracted figures)

Technical Specifications & Part Details (MCP1810T-33I/TT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:MCP1810T-33I/TT (SOT-23-3) is a 3-pin standard electronic & interconnect component featuring a 2.90 × 1.30 × 1.10 mm mechanical envelope (lead pitch e = 1.90 mm). Rated for 2.5V to 5.5V supply operation across 65°C to +150°C with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
2.5V to 5.5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
65°C to +150°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
1 kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
2.90 × 1.30 × 1.10 mm (A1=0.07 mm)
Package family: SOT23 (SOT-23-3)
Pin Count & Lead PitchN / e
3 Pins | Pitch e = 1.90 mm (74.8 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol3 auto-grouped pins
OK
IPC-7351B Land Pattern3 pads · Pitch 1.90mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOT-23-3)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
2.90 × 1.30 mm
Height (A) & Pitch (e)IPC-7351B
A=1.10mm · e=1.90mm
Pad Size (W × L)Level B
0.65 × 1.00 mm
Pins / Total PadsTopology
3P / 3Pad (CUSTOM_ARRAY)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOT-23-3
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — MCP1810T-33I/TT (SOT-23-3)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of MCP1810T-33I/TT (SOT-23-3)?

Manufactured by MICROCHIP, the MCP1810T-33I/TT is housed in a SOT-23-3 package with 3 pins and a 1.90 mm lead pitch, supporting a VCC supply range of 2.5V to 5.5V. Key pins include: 1 (V OUT: Multiplexed I/O & Peripheral Pin V OUT (General)), 2 (V IN: Multiplexed I/O & Peripheral Pin V IN (General)), 3 (GND: Ground Reference Pin (GND)).

What are the IPC-7351B PCB Footprint dimensions for MCP1810T-33I/TT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MCP1810T-33I/TT (SOT-23-3) has a nominal body envelope of 1.30 × 2.90 mm, pitch e = 1.90 mm, and 3 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MCP1810T-33I/TT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MCP1810T-33I/TT (MICROCHIP, SOT-23-3) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (3 pins) & MCP1810 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1V OUTDigital_IOSignal terminal V OUT (I/O, 2.5V to 5.5V domain). Multiplexed alternate functions: V OUT. Supported peripheral buses: General.
2V INDigital_IOSignal terminal V IN (I/O, 2.5V to 5.5V domain). Multiplexed alternate functions: V IN. Supported peripheral buses: General.
3GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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