Mechanical Dimensions & Land Pattern (QFN-28-EP(4x4))
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit QFN-28-EP(4x4) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — PIC16F15356T-I/MV (QFN-28-EP(4x4))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of PIC16F15356T-I/MV (QFN-28-EP(4x4))?
Manufactured by MICROCHIP, the PIC16F15356T-I/MV is housed in a QFN-28-EP(4x4) package with 29 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.8V to 3.6V. Key pins include: 1 (RA2: Multiplexed I/O & Peripheral Pin RA2 (General)), 2 (RA3: Multiplexed I/O & Peripheral Pin RA3 (General)), 3 (RA4: Multiplexed I/O & Peripheral Pin RA4 (General)), 4 (RA5: Multiplexed I/O & Peripheral Pin RA5 (General)), 5 (VSS: Ground Reference Pin (VSS)), 6 (RA7: Multiplexed I/O & Peripheral Pin RA7 (General)).
What are the IPC-7351B PCB Footprint dimensions for PIC16F15356T-I/MV?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC16F15356T-I/MV (QFN-28-EP(4x4)) has a nominal body envelope of 4.00 × 4.00 mm, pitch e = 0.40 mm, and 29 copper pads plus a central exposed thermal pad (EPAD) of 2.70 × 2.70 mm with a 60% IPC-7525 windowed solder paste grid.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC16F15356T-I/MV?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC16F15356T-I/MV (MICROCHIP, QFN-28-EP(4x4)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (29 pins) & PIC16F15356T Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | RA2 | Digital_IO | Signal terminal RA2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA2. Supported peripheral buses: General. |
| 2 | RA3 | Digital_IO | Signal terminal RA3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA3. Supported peripheral buses: General. |
| 3 | RA4 | Digital_IO | Signal terminal RA4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA4. Supported peripheral buses: General. |
| 4 | RA5 | Digital_IO | Signal terminal RA5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA5. Supported peripheral buses: General. |
| 5 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 6 | RA7 | Digital_IO | Signal terminal RA7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA7. Supported peripheral buses: General. |
| 7 | RA6 | Digital_IO | Signal terminal RA6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA6. Supported peripheral buses: General. |
| 8 | RC0 | Digital_IO | Signal terminal RC0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC0. Supported peripheral buses: General. |
| 9 | RC1 | Digital_IO | Signal terminal RC1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC1. Supported peripheral buses: General. |
| 10 | RC2 | Digital_IO | Signal terminal RC2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC2. Supported peripheral buses: General. |
| 11 | RC3 | Digital_IO | Signal terminal RC3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC3. Supported peripheral buses: General. |
| 12 | RC4 | Digital_IO | Signal terminal RC4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC4. Supported peripheral buses: General. |
| 13 | RC5 | Digital_IO | Signal terminal RC5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC5. Supported peripheral buses: General. |
| 14 | RC6 | Digital_IO | Signal terminal RC6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC6. Supported peripheral buses: General. |
| 15 | RC7 | Digital_IO | Signal terminal RC7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC7. Supported peripheral buses: General. |
| 16 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 17 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 1.8V to 3.6V domain (Max rating: 3.6V). |
| 18 | RB0 | Digital_IO | Signal terminal RB0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB0. Supported peripheral buses: General. |
| 19 | RB1 | Digital_IO | Signal terminal RB1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB1. Supported peripheral buses: General. |
| 20 | RB2 | Digital_IO | Signal terminal RB2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB2. Supported peripheral buses: General. |
| 21 | RB3 | Digital_IO | Signal terminal RB3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB3. Supported peripheral buses: General. |
| 22 | RB4 | Digital_IO | Signal terminal RB4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB4. Supported peripheral buses: General. |
| 23 | RB5 | Digital_IO | Signal terminal RB5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB5. Supported peripheral buses: General. |
| 24 | RB6/ICSPCLK | Digital_IO | Signal terminal RB6/ICSPCLK (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB6/ICSPCLK. Supported peripheral buses: General. |
| 25 | RB7/ICSPDAT | Digital_IO | Signal terminal RB7/ICSPDAT (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB7/ICSPDAT. Supported peripheral buses: General. |
| 26 | RE3/MCLR#/VPP | Digital_IO | Signal terminal RE3/MCLR#/VPP (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE3/MCLR#/VPP. Supported peripheral buses: General. |
| 27 | RA0 | Digital_IO | Signal terminal RA0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA0. Supported peripheral buses: General. |
| 28 | RA1 | Digital_IO | Signal terminal RA1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA1. Supported peripheral buses: General. |
| 29 | EP | GND | Bottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return. |












