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STM32WL31CBV6 (VFQFN-48) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32WL31CBV6

STID: C45066924VFQFN-48 · 49 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32WL31CBV6 (VFQFN-48)1PA22PA33VDD_14PB35PB46PB57PA08PA49PA1110PA1011PA912PA813PB614PA515PA616PA717PB1218PB1319PB1420PB1521VDD222NC23RX24EXTGND25TX_HP49GND48PB247PB146PB045PA1544PA1443PA1342PA1241VCAP40VFBSD39VSSSD38VLXSD37VDDSD36NRST35PB834PB933PB1032PB1131PB730PA129OSCIN28OSCOUT27VDDRF26TXGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.838.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1mm
2. 2D FOOTPRINT
49484746454443424140393837363534333231302928272625242322212019181716151413121110987654321E=6.00mm · Pitch e=0.40mmD=6.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 6.00mm × 6.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (49/49)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
2PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
3VDD_1PowerPower Supply Input (VDD_1 — 3.3V VDD (Max 4.0V))
4PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
7PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
8PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
9PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
10PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
11PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
12PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
13PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
14PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
15PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
16PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
17PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
18PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
19PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
20PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
21VDD2PowerPower Supply Input (VDD2 — 3.3V VDD (Max 4.0V))
22NCI/OMultiplexed I/O & Peripheral Pin NC (General)
23RXI/OMultiplexed I/O & Peripheral Pin RX (General)
24EXTGNDGNDGround Reference Pin (EXTGND)
25TX_HPI/OMultiplexed I/O & Peripheral Pin TX_HP (General)
26TXI/OMultiplexed I/O & Peripheral Pin TX (General)
27VDDRFPowerPower Supply Input (VDDRF — 3.3V VDD (Max 4.0V))
28OSCOUTI/OMultiplexed I/O & Peripheral Pin OSCOUT (RTC/CLK)
29OSCINI/OMultiplexed I/O & Peripheral Pin OSCIN (RTC/CLK)
30PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
31PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
32PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
33PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
34PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
35PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
36NRSTISystem Enable & Hardware Reset (NRST)
37VDDSDPowerPower Supply Input (VDDSD — 3.3V VDD (Max 4.0V))
38VLXSDI/OMultiplexed I/O & Peripheral Pin VLXSD (General)
39VSSSDGNDExposed Thermal & Ground Pad (VSSSD)
40VFBSDI/OMultiplexed I/O & Peripheral Pin VFBSD (General)
41VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
42PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
43PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
44PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
45PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
46PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
47PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
48PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
49GNDGNDExposed Thermal & Ground Pad (GND)
PIN 1 PA2
I/O
Multiplexed I/O & Peripheral Pin PA2 (General)
Design note: Signal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32WL31CBV6 (ST · VFQFN-48)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32WL31CBV6 (VFQFN-48) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32WL31CBV6 (VFQFN-48) - 2. Standard Pinout (Top View)
True package pinout (49 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32WL31CBV6 (VFQFN-48) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32WL31CBV6 (VFQFN-48) - 4. Package Dimensions (D×E×A)
VFQFN-48 · 6.00×6.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32WL31CBV6 (VFQFN-48) - 5. Recommended Land Pattern
IPC-7351B Footprint (49 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32WL31CBV6 (VFQFN-48) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32WL31CBV6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32WL31CBV6 (VFQFN-48) is a 48-pin embedded microcontroller unit (mcu) featuring a 6.00 × 6.00 × 0.85 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
6.00 × 6.00 × 0.85 mm (A1=0.03 mm)
Package family: QFN (VFQFN-48)
Pin Count & Lead PitchN / e
48 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol49 auto-grouped pins
OK
IPC-7351B Land Pattern49 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteEPAD 4.40×4.40mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (VFQFN-48)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
6.00 × 6.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.85mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.77 mm
Pins / Total PadsTopology
49P / 49Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
VFQFN-48
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32WL31CBV6 (VFQFN-48)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32WL31CBV6 (VFQFN-48)?

Manufactured by ST, the STM32WL31CBV6 is housed in a VFQFN-48 package with 49 pins and a 0.40 mm lead pitch. Key pins include: 1 (PA2: Multiplexed I/O & Peripheral Pin PA2 (General)), 2 (PA3: Multiplexed I/O & Peripheral Pin PA3 (General)), 3 (VDD_1: Power Supply Input (VDD_1 — 3.3V VDD (Max 4.0V))), 4 (PB3: Multiplexed I/O & Peripheral Pin PB3 (General)), 5 (PB4: Multiplexed I/O & Peripheral Pin PB4 (General)), 6 (PB5: Multiplexed I/O & Peripheral Pin PB5 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32WL31CBV6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32WL31CBV6 (VFQFN-48) has a nominal body envelope of 6.00 × 6.00 mm, pitch e = 0.40 mm, and 49 copper pads plus a central exposed thermal pad (EPAD) of 4.40 × 4.40 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32WL31CBV6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32WL31CBV6 (ST, VFQFN-48) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (49 pins) & STM32WL31 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
2PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
3VDD_1Power_InPrimary positive power supply input (VDD_1) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
4PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
7PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
8PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
9PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
10PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
11PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
12PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
13PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
14PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
15PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
16PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
17PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
18PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
19PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
20PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
21VDD2Power_InPrimary positive power supply input (VDD2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
22NCDigital_IOSignal terminal NC (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
23RXDigital_IOSignal terminal RX (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: RX. Supported peripheral buses: General.
24EXTGNDGND0V electrical ground return terminal (EXTGND) for internal core logic, I/O drivers, and analog sub-blocks.
25TX_HPDigital_IOSignal terminal TX_HP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: TX_HP. Supported peripheral buses: General.
26TXDigital_IOSignal terminal TX (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: TX. Supported peripheral buses: General.
27VDDRFPower_InPrimary positive power supply input (VDDRF) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
28OSCOUTDigital_IOSignal terminal OSCOUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSCOUT. Supported peripheral buses: RTC/CLK.
29OSCINDigital_IOSignal terminal OSCIN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSCIN. Supported peripheral buses: RTC/CLK.
30PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
31PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
32PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
33PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
34PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
35PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
36NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
37VDDSDPower_InPrimary positive power supply input (VDDSD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
38VLXSDDigital_IOSignal terminal VLXSD (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSD. Supported peripheral buses: General.
39VSSSDGNDBottom exposed die attach pad (VSSSD) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
40VFBSDDigital_IOSignal terminal VFBSD (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VFBSD. Supported peripheral buses: General.
41VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
42PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
43PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
44PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
45PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
46PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
47PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
48PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
49GNDGNDBottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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