![CH368P (LQFP-100(14x14)) — 2、特点 | SPI/IIC | ADDR | WR# CS# | RD# | INT# | MEM_WR MEM_RD IOP_WR IOP_RD | D[31-0] | A[15-0] PCIE 信号 | CH368 接口芯片 | PCIE 总线 | RSTO | 配置接口 辅助接口 | CPU MCU 单片机 | 本地 32 位 被动 并行 接口 | 本地 32 位 或8 位 | 主动 并行 总线](/api/v1/assets/C41416984/extracted/figures/p01_fig01.png)
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Mechanical Dimensions & Land Pattern (LQFP-100(14x14))
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.25 mm
Pins / Total PadsTopology
100P / 100Pad (QUAD_ROW)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit LQFP-100(14x14) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — CH368P (LQFP-100(14x14))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of CH368P (LQFP-100(14x14))?
Manufactured by WCH, the CH368P is housed in a LQFP-100(14x14) package with 100 pins and a 0.50 mm lead pitch. Key pins include: 1 (RSTO: Multiplexed I/O & Peripheral Pin RSTO (General)), 2 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 3 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 4 (RSVD: Multiplexed I/O & Peripheral Pin RSVD (General)), 5 (WAKE#: Multiplexed I/O & Peripheral Pin WAKE# (General)), 6 (PERST#: Multiplexed I/O & Peripheral Pin PERST# (General)).
What are the IPC-7351B PCB Footprint dimensions for CH368P?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH368P (LQFP-100(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.50 mm, and 100 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH368P?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH368P (WCH, LQFP-100(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (100 pins) & CH368 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | RSTO | Digital_IO | Signal terminal RSTO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSTO. Supported peripheral buses: General. |
| 2 | NC | NC | Signal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 3 | NC | NC | Signal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 4 | RSVD | NC | Signal terminal RSVD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSVD. Supported peripheral buses: General. |
| 5 | WAKE# | Digital_IO | Signal terminal WAKE# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: WAKE#. Supported peripheral buses: General. |
| 6 | PERST# | Digital_IO | Signal terminal PERST# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PERST#. Supported peripheral buses: General. |
| 7 | PERST# | Digital_IO | Signal terminal PERST# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PERST#. Supported peripheral buses: General. |
| 8 | VCC33 | Power_In | Primary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 9 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 10 | VCC18 | Power_In | Primary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 11 | PECKP | Digital_IO | Signal terminal PECKP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PECKP. Supported peripheral buses: General. |
| 12 | PECKN | Digital_IO | Signal terminal PECKN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PECKN. Supported peripheral buses: General. |
| 13 | VCC18A | Power_In | Primary positive power supply input (VCC18A) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 14 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 15 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 16 | RREF | Digital_IO | Signal terminal RREF (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RREF. Supported peripheral buses: General. |
| 17 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 18 | PERP | Digital_IO | Signal terminal PERP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PERP. Supported peripheral buses: General. |
| 19 | PERN | Digital_IO | Signal terminal PERN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PERN. Supported peripheral buses: General. |
| 20 | VCC18A | Power_In | Primary positive power supply input (VCC18A) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 21 | PETN | Digital_IO | Signal terminal PETN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PETN. Supported peripheral buses: General. |
| 22 | PETP | Digital_IO | Signal terminal PETP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PETP. Supported peripheral buses: General. |
| 23 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 24 | NC | NC | Signal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 25 | VCC33 | Power_In | Primary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 26 | VCC33 | Power_In | Primary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 27 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 28 | SCL | Digital_IO | Signal terminal SCL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SCL. Supported peripheral buses: SPI, I2C. |
| 29 | SDA | Digital_IO | Signal terminal SDA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SDA. Supported peripheral buses: I2C. |
| 30 | SDX | Digital_IO | Signal terminal SDX (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SDX. Supported peripheral buses: SPI. |
| 31 | SCS | Digital_IO | Signal terminal SCS (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SCS. Supported peripheral buses: SPI. |
| 32 | INT# | Digital_IO | Signal terminal INT# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: INT#. Supported peripheral buses: General. |
| 33 | D31 | Digital_IO | Signal terminal D31 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D31. Supported peripheral buses: General. |
| 34 | D30 | Digital_IO | Signal terminal D30 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D30. Supported peripheral buses: General. |
| 35 | D29 | Digital_IO | Signal terminal D29 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D29. Supported peripheral buses: General. |
| 36 | D28 | Digital_IO | Signal terminal D28 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D28. Supported peripheral buses: General. |
| 37 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 38 | D27 | Digital_IO | Signal terminal D27 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D27. Supported peripheral buses: General. |
| 39 | D26 | Digital_IO | Signal terminal D26 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D26. Supported peripheral buses: General. |
| 40 | D25 | Digital_IO | Signal terminal D25 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D25. Supported peripheral buses: General. |
| 41 | D24 | Digital_IO | Signal terminal D24 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D24. Supported peripheral buses: General. |
| 42 | D23 | Digital_IO | Signal terminal D23 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D23. Supported peripheral buses: General. |
| 43 | D22 | Digital_IO | Signal terminal D22 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D22. Supported peripheral buses: General. |
| 44 | D21 | Digital_IO | Signal terminal D21 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D21. Supported peripheral buses: General. |
| 45 | D20 | Digital_IO | Signal terminal D20 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D20. Supported peripheral buses: General. |
| 46 | D19 | Digital_IO | Signal terminal D19 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D19. Supported peripheral buses: General. |
| 47 | D18 | Digital_IO | Signal terminal D18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D18. Supported peripheral buses: General. |
| 48 | VCC18 | Power_In | Primary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 49 | GND | GND | Bottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return. |
| 50 | VCC33 | Power_In | Primary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 51 | D17 | Digital_IO | Signal terminal D17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D17. Supported peripheral buses: General. |
| 52 | D16 | Digital_IO | Signal terminal D16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D16. Supported peripheral buses: General. |
| 53 | D15 | Digital_IO | Signal terminal D15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D15. Supported peripheral buses: General. |
| 54 | D14 | Digital_IO | Signal terminal D14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D14. Supported peripheral buses: General. |
| 55 | D13 | Digital_IO | Signal terminal D13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D13. Supported peripheral buses: General. |
| 56 | D12 | Digital_IO | Signal terminal D12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D12. Supported peripheral buses: General. |
| 57 | D11 | Digital_IO | Signal terminal D11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D11. Supported peripheral buses: General. |
| 58 | D10 | Digital_IO | Signal terminal D10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D10. Supported peripheral buses: General. |
| 59 | D09 | Digital_IO | Signal terminal D09 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D09. Supported peripheral buses: General. |
| 60 | D08 | Digital_IO | Signal terminal D08 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D08. Supported peripheral buses: General. |
| 61 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 62 | D7 | Digital_IO | Signal terminal D7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D7. Supported peripheral buses: General. |
| 63 | D6 | Digital_IO | Signal terminal D6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D6. Supported peripheral buses: General. |
| 64 | D5 | Digital_IO | Signal terminal D5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D5. Supported peripheral buses: General. |