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PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC24FJ64GB004-I/ML

MICROCHIPID: C220570QFN-44-EP(8x8) · 45 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC24FJ64GB004-I/ML (QFN-44-EP(8x8))1ST2ST3I2C4I2C5RP25/PMA6/CN6ST7NC8IO09IO410USBVoltage(311ST12TMS/PMA10/RA13ST14IO1615IO1716ST17AVdd18ST19IO2020IO921ST22ST23ST45EP44IO4443RP7/PMD5/INT42IO4241CN27/USBID/R40IO4039IO3938RP21/PMA3/CN37RP20/PMA4/CN36IO3635TDI/PMA9/RA934IO3433IO3332TDO/PMA8/RA831OSCO/CLKO/CN30IO3029IO2928IO3327ST26ST25AN6/RP16/CN824IO13Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.835.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445E=8.00mm · Pitch e=0.65mmD=8.00mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 8.00mm × 8.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (45/45)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1STI/OMultiplexed I/O & Peripheral Pin ST (General)
2STI/OMultiplexed I/O & Peripheral Pin ST (General)
3I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
4I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
5RP25/PMA6/CN19/RC9I/OMultiplexed I/O & Peripheral Pin RP25/PMA6/CN19/RC9 (General)
6STI/OMultiplexed I/O & Peripheral Pin ST (General)
7NCNCNo Connect (Leave Floating)
8IO0I/OGPIO0 / RTC_GPIO0 (Chip Boot Mode Strapping Pin)
9IO4I/OGPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10USBVoltage(33V) . .I/OMultiplexed I/O & Peripheral Pin USBVoltage(33V) . . (USB)
11STI/OMultiplexed I/O & Peripheral Pin ST (USB)
12TMS/PMA10/RA10I/OMultiplexed I/O & Peripheral Pin TMS/PMA10/RA10 (General)
13STI/OMultiplexed I/O & Peripheral Pin ST (General)
14IO16I/OGPIO16 / RTC_GPIO16 / U0CTS / ADC2_CH5 / XTAL_32K_N
15IO17I/OGPIO17 / RTC_GPIO17 / U1TXD / ADC2_CH6
16STI/OMultiplexed I/O & Peripheral Pin ST (General)
17AVddPowerPower Supply Input (AVdd — 2.0V to 3.6V)
18STI/OMultiplexed I/O & Peripheral Pin ST (General)
19IO20I/OGPIO20 / RTC_GPIO20 / USB_D+ / U1CTS / ADC2_CH9
20IO9I/OGPIO9 / RTC_GPIO9 / TOUCH9 / ADC1_CH8 / FSPIHD
21STI/OMultiplexed I/O & Peripheral Pin ST (General)
22STI/OMultiplexed I/O & Peripheral Pin ST (General)
23STI/OMultiplexed I/O & Peripheral Pin ST (General)
24IO13I/OGPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ
25AN6/RP16/CN8/RC0I/OMultiplexed I/O & Peripheral Pin AN6/RP16/CN8/RC0 (General)
26STI/OMultiplexed I/O & Peripheral Pin ST (General)
27STI/OMultiplexed I/O & Peripheral Pin ST (General)
28IO33I/OGPIO33 / FSPIHD / SUBSPIHD / SPIIO4
29IO29I/OGeneral Purpose Digital I/O Pin IO29
30IO30I/OGeneral Purpose Digital I/O Pin IO30
31OSCO/CLKO/CN29/RA3I/OMultiplexed I/O & Peripheral Pin OSCO/CLKO/CN29/RA3 (RTC/CLK)
32TDO/PMA8/RA8I/OMultiplexed I/O & Peripheral Pin TDO/PMA8/RA8 (General)
33IO33I/OGeneral Purpose Digital I/O Pin IO33
34IO34I/OGeneral Purpose Digital I/O Pin IO34
35TDI/PMA9/RA9I/OMultiplexed I/O & Peripheral Pin TDI/PMA9/RA9 (General)
36IO36I/OGeneral Purpose Digital I/O Pin IO36
37RP20/PMA4/CN25/RC4I/OMultiplexed I/O & Peripheral Pin RP20/PMA4/CN25/RC4 (General)
38RP21/PMA3/CN26/RC5I/OMultiplexed I/O & Peripheral Pin RP21/PMA3/CN26/RC5 (General)
39IO39I/OGeneral Purpose Digital I/O Pin IO39
40IO40I/OGeneral Purpose Digital I/O Pin IO40
41CN27/USBID/RB5I/OMultiplexed I/O & Peripheral Pin CN27/USBID/RB5 (USB)
42IO42I/OGeneral Purpose Digital I/O Pin IO42
43RP7/PMD5/INT0/CN23/RB7I/OMultiplexed I/O & Peripheral Pin RP7/PMD5/INT0/CN23/RB7 (General)
44IO44I/OGeneral Purpose Digital I/O Pin IO44
45EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 ST
I/O
Multiplexed I/O & Peripheral Pin ST (General)
Design note: RP0
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: PIC24FJ64GB004-I/ML (MICROCHIP · QFN-44-EP(8x8))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) - 2. Standard Pinout (Top View)
True package pinout (45 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) - 4. Package Dimensions (D×E×A)
QFN-44-EP(8x8) · 8.00×8.00mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) - 5. Recommended Land Pattern
IPC-7351B Footprint (45 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for PIC24FJ64GB0
P2 · p02_fig011777×1640px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — DS39940D-page 2  2010 Microchip Technology Inc. | Trademarks | FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Inc
DS39940D-page 2  2010 Microchip Technology Inc. | Trademarks | FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Inc
P2 · p02_fig02786×285px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — ISBN: 978-1-60932-439-1
ISBN: 978-1-60932-439-1
P12 · p12_fig011647×2223px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — FIGURE 1-1: PIC24FJ64GB004 FAMILY GENERAL BLOCK DIAGRAM
FIGURE 1-1: PIC24FJ64GB004 FAMILY GENERAL BLOCK DIAGRAM
P20 · p20_fig01867×940px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — FIGURE 2-2: EXAMPLE OF MCLR PIN CONNECTIONS
FIGURE 2-2: EXAMPLE OF MCLR PIN CONNECTIONS
P55 · p55_fig011778×620px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — It can be programmed in four ways:
It can be programmed in four ways:
P55 · p55_fig021405×784px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — FIGURE 5-1: ADDRESSING FOR TABLE REGISTERS
FIGURE 5-1: ADDRESSING FOR TABLE REGISTERS
P275 · p275_fig011778×789px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — PIC24FJ64GB004 FAMILY | 25.0 CHARGE TIME MEASUREMENT UNIT (CTMU) | The Charge Time Measurement Unit is a flexible analog module that provides accurate differential time measurement between pulse sources, as well as asynchronous pulse genera
PIC24FJ64GB004 FAMILY | 25.0 CHARGE TIME MEASUREMENT UNIT (CTMU) | The Charge Time Measurement Unit is a flexible analog module that provides accurate differential time measurement between pulse sources, as well as asynchronous pulse genera
P275 · p275_fig021777×986px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — FIGURE 25-1: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR CAPACITANCE MEASUREMENT
FIGURE 25-1: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR CAPACITANCE MEASUREMENT
P275 · p275_fig02P275
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — Datasheet Page 275 (p275_fig02)
Datasheet Page 275 (p275_fig02)
P276 · p276_fig01977×607px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — FIGURE 25-2: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME MEASUREMENT
FIGURE 25-2: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME MEASUREMENT
P276 · p276_fig021777×782px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) — FIGURE 25-3: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE DELAY GENERATION
FIGURE 25-3: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE DELAY GENERATION
P327 · p327_fig021777×734px
PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) —  2010 Microchip Technology Inc. DS39940D-page 327 | Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-spe
 2010 Microchip Technology Inc. DS39940D-page 327 | Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-spe
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (PIC24FJ64GB004-I/ML)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) is a 44-pin standard electronic & interconnect component featuring a 8.00 × 8.00 × 0.90 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 2.0V to 3.6V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, ADC, PWM, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
2.0V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
32 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
8.00 × 8.00 × 0.90 mm (A1=0.03 mm)
Package family: QFN (QFN-44-EP(8x8))
Pin Count & Lead PitchN / e
44 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, ADC, PWM, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol45 auto-grouped pins
OK
IPC-7351B Land Pattern45 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteEPAD 6.55×6.55mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (QFN-44-EP(8x8))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
8.00 × 8.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.90mm · e=0.65mm
Pad Size (W × L)Level B
0.28 × 0.80 mm
Pins / Total PadsTopology
45P / 45Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
QFN-44-EP(8x8)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC24FJ64GB004-I/ML (QFN-44-EP(8x8))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC24FJ64GB004-I/ML (QFN-44-EP(8x8))?

Manufactured by MICROCHIP, the PIC24FJ64GB004-I/ML is housed in a QFN-44-EP(8x8) package with 45 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 2.0V to 3.6V. Key pins include: 1 (ST: Multiplexed I/O & Peripheral Pin ST (General)), 2 (ST: Multiplexed I/O & Peripheral Pin ST (General)), 3 (I2C: Multiplexed I/O & Peripheral Pin I2C (I2C)), 4 (I2C: Multiplexed I/O & Peripheral Pin I2C (I2C)), 5 (RP25/PMA6/CN19/RC9: Multiplexed I/O & Peripheral Pin RP25/PMA6/CN19/RC9 (General)), 6 (ST: Multiplexed I/O & Peripheral Pin ST (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC24FJ64GB004-I/ML?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC24FJ64GB004-I/ML (QFN-44-EP(8x8)) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.65 mm, and 45 copper pads plus a central exposed thermal pad (EPAD) of 6.55 × 6.55 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC24FJ64GB004-I/ML?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC24FJ64GB004-I/ML (MICROCHIP, QFN-44-EP(8x8)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (45 pins) & PIC24FJ64GB0 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
2STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
3I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
4I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
5RP25/PMA6/CN19/RC9Digital_IOSignal terminal RP25/PMA6/CN19/RC9 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP25/PMA6/CN19/RC9. Supported peripheral buses: General.
6STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
7NCNo_ConnectNo Connect (Leave Floating)
8IO0Digital_IOGPIO0 / RTC_GPIO0 (Chip Boot Mode Strapping Pin)
9IO4Digital_IOGPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10USBVoltage(33V) . .Digital_IOSignal terminal USBVoltage(33V) . . (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: USBVoltage(33V) . .. Supported peripheral buses: USB.
11STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: USB.
12TMS/PMA10/RA10Digital_IOSignal terminal TMS/PMA10/RA10 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: TMS/PMA10/RA10. Supported peripheral buses: General.
13STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
14IO16Digital_IOGPIO16 / RTC_GPIO16 / U0CTS / ADC2_CH5 / XTAL_32K_N
15IO17Digital_IOGPIO17 / RTC_GPIO17 / U1TXD / ADC2_CH6
16STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
17AVddPower_InPrimary positive power supply input (AVdd) operating in the 2.0V to 3.6V domain (Max rating: 3.6V).
18STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
19IO20Digital_IOGPIO20 / RTC_GPIO20 / USB_D+ / U1CTS / ADC2_CH9
20IO9Digital_IOGPIO9 / RTC_GPIO9 / TOUCH9 / ADC1_CH8 / FSPIHD
21STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
22STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
23STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
24IO13Digital_IOGPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ
25AN6/RP16/CN8/RC0Digital_IOSignal terminal AN6/RP16/CN8/RC0 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: AN6/RP16/CN8/RC0. Supported peripheral buses: General.
26STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
27STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
28IO33Digital_IOGPIO33 / FSPIHD / SUBSPIHD / SPIIO4
29IO29Digital_IOGeneral Purpose Digital I/O Pin IO29
30IO30Digital_IOGeneral Purpose Digital I/O Pin IO30
31OSCO/CLKO/CN29/RA3Digital_IOSignal terminal OSCO/CLKO/CN29/RA3 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: OSCO/CLKO/CN29/RA3. Supported peripheral buses: RTC/CLK.
32TDO/PMA8/RA8Digital_IOSignal terminal TDO/PMA8/RA8 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: TDO/PMA8/RA8. Supported peripheral buses: General.
33IO33Digital_IOGeneral Purpose Digital I/O Pin IO33
34IO34Digital_IOGeneral Purpose Digital I/O Pin IO34
35TDI/PMA9/RA9Digital_IOSignal terminal TDI/PMA9/RA9 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: TDI/PMA9/RA9. Supported peripheral buses: General.
36IO36Digital_IOGeneral Purpose Digital I/O Pin IO36
37RP20/PMA4/CN25/RC4Digital_IOSignal terminal RP20/PMA4/CN25/RC4 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP20/PMA4/CN25/RC4. Supported peripheral buses: General.
38RP21/PMA3/CN26/RC5Digital_IOSignal terminal RP21/PMA3/CN26/RC5 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP21/PMA3/CN26/RC5. Supported peripheral buses: General.
39IO39Digital_IOGeneral Purpose Digital I/O Pin IO39
40IO40Digital_IOGeneral Purpose Digital I/O Pin IO40
41CN27/USBID/RB5Digital_IOSignal terminal CN27/USBID/RB5 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: CN27/USBID/RB5. Supported peripheral buses: USB.
42IO42Digital_IOGeneral Purpose Digital I/O Pin IO42
43RP7/PMD5/INT0/CN23/RB7Digital_IOSignal terminal RP7/PMD5/INT0/CN23/RB7 (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: RP7/PMD5/INT0/CN23/RB7. Supported peripheral buses: General.
44IO44Digital_IOGeneral Purpose Digital I/O Pin IO44
45EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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