PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of PIC32MX664F128H-I/MR (QFN-64-EP(9x9))?

Manufactured by MICROCHIP, the PIC32MX664F128H-I/MR is housed in a QFN-64-EP(9x9) package with 65 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.3V to 3.6V. Key pins include: 1 (ETXEN: Multiplexed I/O & Peripheral Pin ETXEN (General)), 2 (ETXD0: Multiplexed I/O & Peripheral Pin ETXD0 (General)), 3 (ETXD1: Multiplexed I/O & Peripheral Pin ETXD1 (General)), 4 (PMA5: Multiplexed I/O & Peripheral Pin PMA5 (General)), 5 (PMA4: Multiplexed I/O & Peripheral Pin PMA4 (General)), 6 (PMA3: Multiplexed I/O & Peripheral Pin PMA3 (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for PIC32MX664F128H-I/MR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) has a nominal body envelope of 9.00 × 9.00 mm, pitch e = 0.50 mm, and 65 copper pads plus a central exposed thermal pad (EPAD) of 7.30 × 7.30 mm with a 60% IPC-7525 windowed solder paste grid.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC32MX664F128H-I/MR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC32MX664F128H-I/MR (MICROCHIP, QFN-64-EP(9x9)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 9.00mm × 9.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (65/65)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	ETXEN	I/O	Multiplexed I/O & Peripheral Pin ETXEN (General)
2	ETXD0	I/O	Multiplexed I/O & Peripheral Pin ETXD0 (General)
3	ETXD1	I/O	Multiplexed I/O & Peripheral Pin ETXD1 (General)
4	PMA5	I/O	Multiplexed I/O & Peripheral Pin PMA5 (General)
5	PMA4	I/O	Multiplexed I/O & Peripheral Pin PMA4 (General)
6	PMA3	I/O	Multiplexed I/O & Peripheral Pin PMA3 (General)
7	MCLR	I/O	Multiplexed I/O & Peripheral Pin MCLR (General)
8	PMA2	I/O	Multiplexed I/O & Peripheral Pin PMA2 (General)
9	VSS	GND	Ground Reference Pin (VSS)
10	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
11	VBUSON	Power	Regulated Power Output (VBUSON — 2.3V to 3.6V)
12	C1IN -	I/O	Multiplexed I/O & Peripheral Pin C1IN - (General)
13	C2IN+	I/O	Multiplexed I/O & Peripheral Pin C2IN+ (General)
14	C2IN -	I/O	Multiplexed I/O & Peripheral Pin C2IN - (General)
15	VREF-	Analog	Multiplexed I/O & Peripheral Pin VREF- (General)
16	VREF+	Analog	Multiplexed I/O & Peripheral Pin VREF+ (General)
17	PGEC2	I/O	Multiplexed I/O & Peripheral Pin PGEC2 (General)
18	PGED2	I/O	Multiplexed I/O & Peripheral Pin PGED2 (General)
19	AVDD	Power	Power Supply Input (AVDD — 2.3V to 3.6V)
20	AVSS	GND	Ground Reference Pin (AVSS)
21	C2TX	I/O	Multiplexed I/O & Peripheral Pin C2TX (CAN)
22	PMA7	I/O	Multiplexed I/O & Peripheral Pin PMA7 (General)
23	PMA13	I/O	Multiplexed I/O & Peripheral Pin PMA13 (General)
24	PMA12	I/O	Multiplexed I/O & Peripheral Pin PMA12 (General)
25	VSS	GND	Ground Reference Pin (VSS)
26	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
27	PMA11	I/O	Multiplexed I/O & Peripheral Pin PMA11 (General)
28	PMA10	I/O	Multiplexed I/O & Peripheral Pin PMA10 (General)
29	C2RX	I/O	Multiplexed I/O & Peripheral Pin C2RX (CAN)
30	AEMDC	I/O	Multiplexed I/O & Peripheral Pin AEMDC (General)
31	AC1TX	I/O	Multiplexed I/O & Peripheral Pin AC1TX (General)
32	AC1RX	I/O	Multiplexed I/O & Peripheral Pin AC1RX (General)
33	USBID	I/O	Multiplexed I/O & Peripheral Pin USBID (USB)
34	VBUS	Power	Power Supply Input (VBUS — 2.3V to 3.6V)
35	VUSB3V3	Power	Power Supply Input (VUSB3V3 — 2.3V to 3.6V)
36	D -	I/O	Multiplexed I/O & Peripheral Pin D - (USB)
37	D+	I/O	Multiplexed I/O & Peripheral Pin D+ (USB)
38	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
39	RC12	I/O	Multiplexed I/O & Peripheral Pin RC12 (General)
40	RC15	I/O	Multiplexed I/O & Peripheral Pin RC15 (General)
41	VSS	GND	Ground Reference Pin (VSS)
42	AERXD1	I/O	Multiplexed I/O & Peripheral Pin AERXD1 (General)
43	AERXD0	I/O	Multiplexed I/O & Peripheral Pin AERXD0 (General)
44	AECRSDV	I/O	Multiplexed I/O & Peripheral Pin AECRSDV (General)
45	AEREFCLK	I/O	Multiplexed I/O & Peripheral Pin AEREFCLK (General)
46	RD0	I/O	Multiplexed I/O & Peripheral Pin RD0 (General)
47	RC13	I/O	Multiplexed I/O & Peripheral Pin RC13 (General)
48	T1CK	I/O	Multiplexed I/O & Peripheral Pin T1CK (General)
49	AEMDIO	I/O	Multiplexed I/O & Peripheral Pin AEMDIO (General)
50	SDA3	I/O	Multiplexed I/O & Peripheral Pin SDA3 (I2C)
51	SCL3	I/O	Multiplexed I/O & Peripheral Pin SCL3 (I2C)
52	PMWR	I/O	Multiplexed I/O & Peripheral Pin PMWR (General)
53	PMRD	I/O	Multiplexed I/O & Peripheral Pin PMRD (General)
54	AETXEN	I/O	Multiplexed I/O & Peripheral Pin AETXEN (General)
55	AERXERR	I/O	Multiplexed I/O & Peripheral Pin AERXERR (General)
56	VCAP	I/O	Multiplexed I/O & Peripheral Pin VCAP (General)
57	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
58	AETXD1	I/O	Multiplexed I/O & Peripheral Pin AETXD1 (General)
59	AETXD0	I/O	Multiplexed I/O & Peripheral Pin AETXD0 (General)
60	ERXD1	I/O	Multiplexed I/O & Peripheral Pin ERXD1 (General)
61	ERXD0	I/O	Multiplexed I/O & Peripheral Pin ERXD0 (General)
62	ECRSDV	I/O	Multiplexed I/O & Peripheral Pin ECRSDV (General)
63	EREFCLK	I/O	Multiplexed I/O & Peripheral Pin EREFCLK (General)
64	ERXERR	I/O	Multiplexed I/O & Peripheral Pin ERXERR (General)
65	PAD	I/O	Multiplexed I/O & Peripheral Pin PAD (General)

PIN 1 ETXEN

I/O

Multiplexed I/O & Peripheral Pin ETXEN (General)

Design note: Ethernettransmitenable(2)

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) - 2. Standard Pinout (Top View)

True package pinout (65 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) - 4. Package Dimensions (D×E×A)

QFN-64-EP(9x9) · 9.00×9.00mm · Pitch 0.50mmExpand ›

5. Recommended Land PatternLAND PATTERN

PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) - 5. Recommended Land Pattern

IPC-7351B Footprint (65 Pads)Expand ›

6. Application SchematicSCHEMATIC

PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)

Showing 1–12 of 13 uncropped original figures for PIC32MX664F1

P1 · p01_fig01377×200px

32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM) with Graphics Interface, USB, CAN, and Ethernet

P20 · p20_fig011775×2269px

TABLE 13: PIN NAMES FOR 124-PIN USB, ETHERNET, AND CAN DEVICES

P20 · p20_fig02608×430px

Polarity Indicator

P21 · p21_fig011779×1887px

PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) — PIC32MX5XX/6XX/7XX | B8 VSS B33 TDO/RA5 | B9 TMS/RA0 B34 OSC1/CLKI/RC12 | B10 AERXD1/INT2/RE9 B35 No Connect (NC) | B11 AN4/C1IN-/CN6/RB4 B36 AETXCLK/SCL1/INT3/RA14 | B12 VSS B37 RTCC/EMDIO/AEMDIO/IC1/RD8 | B13 AN2/C2IN-/CN4/RB2 B38 SCK1/IC

P21 · p21_fig02608×430px

Polarity Indicator

P25 · p25_fig011492×1544px

FIGURE 1-1: BLOCK DIAGRAM(1,2)

P211 · p211_fig011779×802px

PIC32MX5XX/6XX/7XX | 21.0 PARALLEL MASTER PORT (PMP) | The following are key features of the PMP module:

P211 · p211_fig02795×1277px

FIGURE 21-1: PMP MODULE PINOUT AND CONNECTIONS TO EXTERNAL DEVICES

P211 · p211_fig031232×1278px

FIGURE 21-1: PMP MODULE PINOUT AND CONNECTIONS TO EXTERNAL DEVICES

P211 · p211_fig03P211

Datasheet Page 211 (p211_fig03)

P404 · p404_fig011779×2504px

PIC32MX5XX/6XX/7XX

P418 · p418_fig011779×2735px

PIC32MX5XX/6XX/7XX | DS60001156J-page 418  2009-2016 Microchip Technology Inc. | For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: | RECOMMENDED LAND

Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (PIC32MX664F128H-I/MR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) is a 64-pin standard electronic & interconnect component featuring a 9.00 × 9.00 × 0.90 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 2.3V to 3.6V supply operation across -40°C to +85°C with integrated USB, UART, SPI, I2C, ADC, JTAG / SWD, IrDA, CAN interfaces.

Operating Supply VoltageV_CC / V_DD

2.3V to 3.6V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to +85°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

80 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

9.00 × 9.00 × 0.90 mm (A1=0.03 mm)

Package family: QFN (QFN-64-EP(9x9))

Pin Count & Lead PitchN / e

64 Pins | Pitch e = 0.50 mm (19.7 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

USB, UART, SPI, I2C, ADC, JTAG / SWD, IrDA, CAN

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol65 auto-grouped pins

IPC-7351B Land Pattern65 pads · Pitch 0.50mm

IPC-7525 60% Solder PasteEPAD 7.30×7.30mm windowed grid

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (QFN-64-EP(9x9))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

9.00 × 9.00 mm

Height (A) & Pitch (e)IPC-7351B

A=0.90mm · e=0.50mm

Pad Size (W × L)Level B

0.30 × 0.80 mm

Pins / Total PadsTopology

65P / 65Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit QFN-64-EP(9x9)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC32MX664F128H-I/MR (QFN-64-EP(9x9))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC32MX664F128H-I/MR (QFN-64-EP(9x9))?

Manufactured by MICROCHIP, the PIC32MX664F128H-I/MR is housed in a QFN-64-EP(9x9) package with 65 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.3V to 3.6V. Key pins include: 1 (ETXEN: Multiplexed I/O & Peripheral Pin ETXEN (General)), 2 (ETXD0: Multiplexed I/O & Peripheral Pin ETXD0 (General)), 3 (ETXD1: Multiplexed I/O & Peripheral Pin ETXD1 (General)), 4 (PMA5: Multiplexed I/O & Peripheral Pin PMA5 (General)), 5 (PMA4: Multiplexed I/O & Peripheral Pin PMA4 (General)), 6 (PMA3: Multiplexed I/O & Peripheral Pin PMA3 (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC32MX664F128H-I/MR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC32MX664F128H-I/MR (QFN-64-EP(9x9)) has a nominal body envelope of 9.00 × 9.00 mm, pitch e = 0.50 mm, and 65 copper pads plus a central exposed thermal pad (EPAD) of 7.30 × 7.30 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC32MX664F128H-I/MR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC32MX664F128H-I/MR (MICROCHIP, QFN-64-EP(9x9)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (65 pins) & PIC32MX664F1 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	ETXEN	Digital_IO	Signal terminal ETXEN (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: ETXEN. Supported peripheral buses: General.
2	ETXD0	Digital_IO	Signal terminal ETXD0 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: ETXD0. Supported peripheral buses: General.
3	ETXD1	Digital_IO	Signal terminal ETXD1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: ETXD1. Supported peripheral buses: General.
4	PMA5	Digital_IO	Signal terminal PMA5 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA5. Supported peripheral buses: General.
5	PMA4	Digital_IO	Signal terminal PMA4 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA4. Supported peripheral buses: General.
6	PMA3	Digital_IO	Signal terminal PMA3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA3. Supported peripheral buses: General.
7	MCLR	Digital_IO	Signal terminal MCLR (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: MCLR. Supported peripheral buses: General.
8	PMA2	Digital_IO	Signal terminal PMA2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA2. Supported peripheral buses: General.
9	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
10	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
11	VBUSON	Power_Out	Regulated power output rail (VBUSON) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
12	C1IN -	Digital_IO	Signal terminal C1IN - (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C1IN -. Supported peripheral buses: General.
13	C2IN+	Digital_IO	Signal terminal C2IN+ (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C2IN+. Supported peripheral buses: General.
14	C2IN -	Digital_IO	Signal terminal C2IN - (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C2IN -. Supported peripheral buses: General.
15	VREF-	Analog	Signal terminal VREF- (Analog, 2.3V to 3.6V domain). Multiplexed alternate functions: VREF-. Supported peripheral buses: General.
16	VREF+	Analog	Signal terminal VREF+ (Analog, 2.3V to 3.6V domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
17	PGEC2	Digital_IO	Signal terminal PGEC2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGEC2. Supported peripheral buses: General.
18	PGED2	Digital_IO	Signal terminal PGED2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGED2. Supported peripheral buses: General.
19	AVDD	Power_In	Primary positive power supply input (AVDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
20	AVSS	GND	0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks.
21	C2TX	Digital_IO	Signal terminal C2TX (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C2TX. Supported peripheral buses: CAN.
22	PMA7	Digital_IO	Signal terminal PMA7 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA7. Supported peripheral buses: General.
23	PMA13	Digital_IO	Signal terminal PMA13 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA13. Supported peripheral buses: General.
24	PMA12	Digital_IO	Signal terminal PMA12 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA12. Supported peripheral buses: General.
25	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
26	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
27	PMA11	Digital_IO	Signal terminal PMA11 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA11. Supported peripheral buses: General.
28	PMA10	Digital_IO	Signal terminal PMA10 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA10. Supported peripheral buses: General.
29	C2RX	Digital_IO	Signal terminal C2RX (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C2RX. Supported peripheral buses: CAN.
30	AEMDC	Digital_IO	Signal terminal AEMDC (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AEMDC. Supported peripheral buses: General.
31	AC1TX	Digital_IO	Signal terminal AC1TX (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AC1TX. Supported peripheral buses: General.
32	AC1RX	Digital_IO	Signal terminal AC1RX (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AC1RX. Supported peripheral buses: General.
33	USBID	Digital_IO	Signal terminal USBID (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: USBID. Supported peripheral buses: USB.
34	VBUS	Power_In	Primary positive power supply input (VBUS) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
35	VUSB3V3	Power_In	Primary positive power supply input (VUSB3V3) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
36	D -	Digital_IO	Signal terminal D - (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: D -. Supported peripheral buses: USB.
37	D+	Digital_IO	Signal terminal D+ (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: D+. Supported peripheral buses: USB.
38	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
39	RC12	Digital_IO	Signal terminal RC12 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC12. Supported peripheral buses: General.
40	RC15	Digital_IO	Signal terminal RC15 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC15. Supported peripheral buses: General.
41	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
42	AERXD1	Digital_IO	Signal terminal AERXD1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AERXD1. Supported peripheral buses: General.
43	AERXD0	Digital_IO	Signal terminal AERXD0 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AERXD0. Supported peripheral buses: General.
44	AECRSDV	Digital_IO	Signal terminal AECRSDV (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AECRSDV. Supported peripheral buses: General.
45	AEREFCLK	Digital_IO	Signal terminal AEREFCLK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AEREFCLK. Supported peripheral buses: General.
46	RD0	Digital_IO	Signal terminal RD0 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RD0. Supported peripheral buses: General.
47	RC13	Digital_IO	Signal terminal RC13 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC13. Supported peripheral buses: General.
48	T1CK	Digital_IO	Signal terminal T1CK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: T1CK. Supported peripheral buses: General.
49	AEMDIO	Digital_IO	Signal terminal AEMDIO (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AEMDIO. Supported peripheral buses: General.
50	SDA3	Digital_IO	Signal terminal SDA3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: SDA3. Supported peripheral buses: I2C.
51	SCL3	Digital_IO	Signal terminal SCL3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: SCL3. Supported peripheral buses: I2C.
52	PMWR	Digital_IO	Signal terminal PMWR (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMWR. Supported peripheral buses: General.
53	PMRD	Digital_IO	Signal terminal PMRD (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMRD. Supported peripheral buses: General.
54	AETXEN	Digital_IO	Signal terminal AETXEN (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AETXEN. Supported peripheral buses: General.
55	AERXERR	Digital_IO	Signal terminal AERXERR (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AERXERR. Supported peripheral buses: General.
56	VCAP	Digital_IO	Signal terminal VCAP (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
57	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
58	AETXD1	Digital_IO	Signal terminal AETXD1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AETXD1. Supported peripheral buses: General.
59	AETXD0	Digital_IO	Signal terminal AETXD0 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: AETXD0. Supported peripheral buses: General.
60	ERXD1	Digital_IO	Signal terminal ERXD1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: ERXD1. Supported peripheral buses: General.
61	ERXD0	Digital_IO	Signal terminal ERXD0 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: ERXD0. Supported peripheral buses: General.
62	ECRSDV	Digital_IO	Signal terminal ECRSDV (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: ECRSDV. Supported peripheral buses: General.
63	EREFCLK	Digital_IO	Signal terminal EREFCLK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: EREFCLK. Supported peripheral buses: General.
64	ERXERR	Digital_IO	Signal terminal ERXERR (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: ERXERR. Supported peripheral buses: General.

4D Studio: PIC32MX664F128H-I/MR Permalink: /part/C220283 MICROCHIP QFN-64-EP(9x9)All Packages All Manufacturers