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ESP32-PICO-D4 (QFN-48-EP(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

ESP32-PICO-D4

ESPRESSIFID: C193707QFN-48-EP(7x7) · 49 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ESP32-PICO-D4 (QFN-48-EP(7x7))1VDDA2LNA_IN3VDDA3P34VDDA3P35SENSOR_VP6SENSOR_CAPP7SENSOR_CAPN8SENSOR_VN9EN10IO3411IO3512IO3213IO3314IO2515IO2616IO2717IO1418IO1219VDD3P3_RTC20IO1321IO1522IO223IO024IO425IO1649GND48CAP1_NC47CAP2_NC46VDDA45XTAL_PNC_44XTAL_NNC_43VDDA42IO2141U0TXD40U0RXD39IO2238IO1937VDD3P3_CPU36IO2335IO1834IO533SD132SD031CLK30CMD29SD328SD227IO1726VDD_SDIOGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.838.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849E=7.00mm · Pitch e=0.50mmD=7.00mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (49/49)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VDDAPowerPower Supply Input (VDDA — 3.3V VDD3P3 (3.0V ~ 3.6V))
2LNA_INI/OMultiplexed I/O & Peripheral Pin LNA_IN (General)
3VDDA3P3PowerPower Supply Input (VDDA3P3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
4VDDA3P3PowerPower Supply Input (VDDA3P3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
5SENSOR_VPIInput-Only Pin SENSOR_VP (ADC, RTC/CLK)
6SENSOR_CAPPI/OMultiplexed I/O & Peripheral Pin SENSOR_CAPP (ADC, RTC/CLK)
7SENSOR_CAPNI/OMultiplexed I/O & Peripheral Pin SENSOR_CAPN (ADC, RTC/CLK)
8SENSOR_VNIInput-Only Pin SENSOR_VN (ADC, RTC/CLK)
9ENISystem Enable & Hardware Reset (EN)
10IO34IInput-Only Pin IO34 (ADC, RTC/CLK)
11IO35IInput-Only Pin IO35 (ADC, RTC/CLK)
12IO32I/OMultiplexed I/O & Peripheral Pin IO32 (ADC, RTC/CLK, TOUCH)
13IO33I/OMultiplexed I/O & Peripheral Pin IO33 (ADC, RTC/CLK, TOUCH)
14IO25I/OMultiplexed I/O & Peripheral Pin IO25 (UART, ADC, DAC, RTC/CLK)
15IO26I/OMultiplexed I/O & Peripheral Pin IO26 (UART, ADC, DAC, RTC/CLK)
16IO27I/OMultiplexed I/O & Peripheral Pin IO27 (ADC, RTC/CLK, TOUCH)
17IO14I/OMultiplexed I/O & Peripheral Pin IO14 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
18IO12I/OMultiplexed I/O & Peripheral Pin IO12 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
19VDD3P3_RTCPowerPower Supply Input (VDD3P3_RTC — 3.3V VDD3P3 (3.0V ~ 3.6V))
20IO13I/OMultiplexed I/O & Peripheral Pin IO13 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
21IO15I/OMultiplexed I/O & Peripheral Pin IO15 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
22IO2I/OMultiplexed I/O & Peripheral Pin IO2 (ADC, RTC/CLK, TOUCH)
23IO0I/OMultiplexed I/O & Peripheral Pin IO0 (ADC, RTC/CLK, TOUCH)
24IO4I/OMultiplexed I/O & Peripheral Pin IO4 (ADC, RTC/CLK, TOUCH)
25IO16I/OMultiplexed I/O & Peripheral Pin IO16 (General)
26VDD_SDIOPowerPower Supply Input (VDD_SDIO — 3.3V VDD3P3 (3.0V ~ 3.6V))
27IO17I/OMultiplexed I/O & Peripheral Pin IO17 (General)
28SD2I/OMultiplexed I/O & Peripheral Pin SD2 (UART, SPI)
29SD3I/OMultiplexed I/O & Peripheral Pin SD3 (UART, SPI)
30CMDI/OMultiplexed I/O & Peripheral Pin CMD (SPI)
31CLKI/OMultiplexed I/O & Peripheral Pin CLK (SPI)
32SD0I/OMultiplexed I/O & Peripheral Pin SD0 (SPI)
33SD1I/OMultiplexed I/O & Peripheral Pin SD1 (SPI)
34IO5I/OMultiplexed I/O & Peripheral Pin IO5 (General)
35IO18I/OMultiplexed I/O & Peripheral Pin IO18 (General)
36IO23I/OMultiplexed I/O & Peripheral Pin IO23 (General)
37VDD3P3_CPUPowerPower Supply Input (VDD3P3_CPU — 3.3V VDD3P3 (3.0V ~ 3.6V))
38IO19I/OMultiplexed I/O & Peripheral Pin IO19 (UART)
39IO22I/OMultiplexed I/O & Peripheral Pin IO22 (UART)
40U0RXDI/OMultiplexed I/O & Peripheral Pin U0RXD (UART)
41U0TXDI/OMultiplexed I/O & Peripheral Pin U0TXD (UART)
42IO21I/OMultiplexed I/O & Peripheral Pin IO21 (General)
43VDDAPowerPower Supply Input (VDDA — 3.3V VDD3P3 (3.0V ~ 3.6V))
44XTAL_NNC_I/OMultiplexed I/O & Peripheral Pin XTAL_NNC_ (RTC/CLK)
45XTAL_PNC_I/OMultiplexed I/O & Peripheral Pin XTAL_PNC_ (RTC/CLK)
46VDDAPowerPower Supply Input (VDDA — 3.3V VDD3P3 (3.0V ~ 3.6V))
47CAP2_NCI/OMultiplexed I/O & Peripheral Pin CAP2_NC (General)
48CAP1_NCI/OMultiplexed I/O & Peripheral Pin CAP1_NC (General)
49GNDGNDExposed Thermal & Ground Pad (GND)
PIN 1 VDDA
Power
Power Supply Input (VDDA — 3.3V VDD3P3 (3.0V ~ 3.6V))
Design note: 模拟电源(23V~36V) . .
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ESP32-PICO-D4 (ESPRESSIF · QFN-48-EP(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ESP32-PICO-D4 (QFN-48-EP(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ESP32-PICO-D4 (QFN-48-EP(7x7)) - 2. Standard Pinout (Top View)
True package pinout (49 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ESP32-PICO-D4 (QFN-48-EP(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ESP32-PICO-D4 (QFN-48-EP(7x7)) - 4. Package Dimensions (D×E×A)
QFN-48-EP(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
ESP32-PICO-D4 (QFN-48-EP(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (49 Pads)Expand ›
6. Application SchematicSCHEMATIC
ESP32-PICO-D4 (QFN-48-EP(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for ESP32-PICO
P18 · p18_fig01EXACT PACKAGE
ESP32-PICO-D4 (QFN-48-EP(7x7)) — 图4: ESP32-PICO-D4 模组外围设计原理图
图4: ESP32-PICO-D4 模组外围设计原理图
P18 · p18_fig02EXACT PACKAGE
ESP32-PICO-D4 (QFN-48-EP(7x7)) — 图4: ESP32-PICO-D4 模组外围设计原理图
图4: ESP32-PICO-D4 模组外围设计原理图
P20 · p20_fig01EXACT PACKAGE
ESP32-PICO-D4 (QFN-48-EP(7x7)) — 图6: ESP32-PICO-D4 封装图形
图6: ESP32-PICO-D4 封装图形
P1 · p01_fig01642×315px
ESP32-PICO-D4 (QFN-48-EP(7x7)) — 版本2.0 | 乐鑫信息科技 | 版权© 2022 N BEAR 2.0 5))) Tae LAL ARAN © 2022
版本2.0 | 乐鑫信息科技 | 版权© 2022 N BEAR 2.0 5))) Tae LAL ARAN © 2022
P7 · p07_fig011659×1489px
ESP32-PICO-D4 (QFN-48-EP(7x7)) — 2.1 管脚布局
2.1 管脚布局
P7 · p07_fig01P7
ESP32-PICO-D4 (QFN-48-EP(7x7)) — Datasheet Page 7 (p07_fig01)
Datasheet Page 7 (p07_fig01)
P18 · p18_fig01P18
ESP32-PICO-D4 (QFN-48-EP(7x7)) — Datasheet Page 18 (p18_fig01)
Datasheet Page 18 (p18_fig01)
P20 · p20_fig01P20
ESP32-PICO-D4 (QFN-48-EP(7x7)) — Datasheet Page 20 (p20_fig01)
Datasheet Page 20 (p20_fig01)

Technical Specifications & Part Details (ESP32-PICO-D4)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:ESP32-PICO-D4 (QFN-48-EP(7x7)) is a 48-pin wireless wi-fi / bluetooth le soc module featuring a 7.00 × 7.00 × 0.85 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Wi-Fi, ADC, DAC, RTC/CLK, SPI, SWD/JTAG, TOUCH, UART interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2484 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_TX(peak) ≈ 310 mA @ 3.3V | Deep-Sleep ≈ 10 µA | I_GPIO(max) = 40 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.85 mm (A1=0.03 mm)
Package family: QFN (QFN-48-EP(7x7))
Pin Count & Lead PitchN / e
48 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Wi-Fi, ADC, DAC, RTC/CLK, SPI, SWD/JTAG, TOUCH, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (IO0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol49 auto-grouped pins
OK
IPC-7351B Land Pattern49 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 5.40×5.40mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (QFN-48-EP(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.85mm · e=0.50mm
Pad Size (W × L)Level B
0.28 × 0.85 mm
Pins / Total PadsTopology
49P / 49Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
C1, C2
BOM
22µF (or 10µF) X5R + 100nF X7R
0805 + 0402
3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA.
R_en + C_en
BOM
R = 10kΩ to 3V3 + C = 1µF to GND
0402 / 0603
Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot.
R_boot + SW1
BOM
10kΩ Pull-up + BOOT button
0402 + SMD
Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download.
D_esd
BOM
USBLC6-2SC6 / LESD5D5.0CT1G
SOT-23-6 / SOD-523
ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20.
ESP32-S3-MINI-1-N8 / 1U-N4R2
Espressif
100% Drop-inSame 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping.

Technical Frequently Asked Questions (FAQ) — ESP32-PICO-D4 (QFN-48-EP(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ESP32-PICO-D4 (QFN-48-EP(7x7))?

Manufactured by ESPRESSIF, the ESP32-PICO-D4 is housed in a QFN-48-EP(7x7) package with 49 pins and a 0.50 mm lead pitch. Key pins include: 1 (VDDA: Power Supply Input (VDDA — 3.3V VDD3P3 (3.0V ~ 3.6V))), 2 (LNA_IN: Multiplexed I/O & Peripheral Pin LNA_IN (General)), 3 (VDDA3P3: Power Supply Input (VDDA3P3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 4 (VDDA3P3: Power Supply Input (VDDA3P3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 5 (SENSOR_VP: Input-Only Pin SENSOR_VP (ADC, RTC/CLK)), 6 (SENSOR_CAPP: Multiplexed I/O & Peripheral Pin SENSOR_CAPP (ADC, RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for ESP32-PICO-D4?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-PICO-D4 (QFN-48-EP(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 49 copper pads plus a central exposed thermal pad (EPAD) of 5.40 × 5.40 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-PICO-D4?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-PICO-D4 (ESPRESSIF, QFN-48-EP(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (49 pins) & ESP32-PICO Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
2LNA_INRF_50OhmSignal terminal LNA_IN (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: LNA_IN. Supported peripheral buses: General.
3VDDA3P3Power_InPrimary positive power supply input (VDDA3P3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
4VDDA3P3Power_InPrimary positive power supply input (VDDA3P3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
5SENSOR_VPDigital_IOSignal terminal SENSOR_VP (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO36, ADC1_CH0, RTC_GPIO0. Supported peripheral buses: ADC, RTC/CLK.
6SENSOR_CAPPDigital_IOSignal terminal SENSOR_CAPP (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO37, ADC1_CH1, RTC_GPIO1. Supported peripheral buses: ADC, RTC/CLK.
7SENSOR_CAPNDigital_IOSignal terminal SENSOR_CAPN (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO38, ADC1_CH2, RTC_GPIO2. Supported peripheral buses: ADC, RTC/CLK.
8SENSOR_VNDigital_IOSignal terminal SENSOR_VN (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO39, ADC1_CH3, RTC_GPIO3. Supported peripheral buses: ADC, RTC/CLK.
9ENDigital_IOChip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.
10IO34Digital_IOSignal terminal IO34 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO34, ADC1_CH6, RTC_GPIO4. Supported peripheral buses: ADC, RTC/CLK.
11IO35Digital_IOSignal terminal IO35 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO35, ADC1_CH7, RTC_GPIO5. Supported peripheral buses: ADC, RTC/CLK.
12IO32Digital_IOSignal terminal IO32 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO32, ADC1_CH4, TOUCH9, RTC_GPIO9. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
13IO33Digital_IOSignal terminal IO33 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO33, ADC1_CH5, TOUCH8, RTC_GPIO8. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
14IO25Digital_IOSignal terminal IO25 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO25, ADC2_CH8, RTC_GPIO6. Supported peripheral buses: UART, ADC, DAC, RTC/CLK.
15IO26Digital_IOSignal terminal IO26 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO26, ADC2_CH9, RTC_GPIO7. Supported peripheral buses: UART, ADC, DAC, RTC/CLK.
16IO27Digital_IOSignal terminal IO27 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
17IO14Digital_IOSignal terminal IO14 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
18IO12Digital_IOSignal terminal IO12 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
19VDD3P3_RTCPower_InPrimary positive power supply input (VDD3P3_RTC) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
20IO13Digital_IOSignal terminal IO13 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
21IO15Digital_IOSignal terminal IO15 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO15, ADC2_CH3, TOUCH3, RTC_GPIO13, MTDO. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
22IO2Digital_IOSignal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
23IO0Digital_IOSignal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
24IO4Digital_IOSignal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
25IO16Digital_IOSignal terminal IO16 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO16, U2RXD. Supported peripheral buses: General.
26VDD_SDIOPower_InPrimary positive power supply input (VDD_SDIO) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
27IO17Digital_IOSignal terminal IO17 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO17, U2TXD. Supported peripheral buses: General.
28SD2Digital_IOSignal terminal SD2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO9, SPIHD, U1RXD. Supported peripheral buses: UART, SPI.
29SD3Digital_IOSignal terminal SD3 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO10, SPIWP, U1TXD. Supported peripheral buses: UART, SPI.
30CMDDigital_IOSignal terminal CMD (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO11, SPICS0, U1RTS. Supported peripheral buses: SPI.
31CLKDigital_IOSignal terminal CLK (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO6, SPICLK. Supported peripheral buses: SPI.
32SD0Digital_IOSignal terminal SD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO7, SPIQ, U2RTS. Supported peripheral buses: SPI.
33SD1Digital_IOSignal terminal SD1 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO8, SPID, U2CTS. Supported peripheral buses: SPI.
34IO5Digital_IOSignal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO5. Supported peripheral buses: General.
35IO18Digital_IOSignal terminal IO18 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO18. Supported peripheral buses: General.
36IO23Digital_IOSignal terminal IO23 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO23. Supported peripheral buses: General.
37VDD3P3_CPUPower_InPrimary positive power supply input (VDD3P3_CPU) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
38IO19Digital_IOSignal terminal IO19 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO19, U0CTS. Supported peripheral buses: UART.
39IO22Digital_IOSignal terminal IO22 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO22, U0RTS. Supported peripheral buses: UART.
40U0RXDDigital_IOSignal terminal U0RXD (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO3, CLK_OUT2. Supported peripheral buses: UART.
41U0TXDDigital_IOSignal terminal U0TXD (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO1, CLK_OUT3. Supported peripheral buses: UART.
42IO21Digital_IOSignal terminal IO21 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO21. Supported peripheral buses: General.
43VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
44XTAL_NNC_Digital_IOSignal terminal XTAL_NNC_ (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: XTAL_NNC_. Supported peripheral buses: RTC/CLK.
45XTAL_PNC_Digital_IOSignal terminal XTAL_PNC_ (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: XTAL_PNC_. Supported peripheral buses: RTC/CLK.
46VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
47CAP2_NCDigital_IOSignal terminal CAP2_NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: CAP2_NC. Supported peripheral buses: General.
48CAP1_NCDigital_IOSignal terminal CAP1_NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: CAP1_NC. Supported peripheral buses: General.
49GNDGNDBottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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