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CH456G (SOP-16) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH456G

WCHID: C19270726SOP-16 · 16 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH456G (SOP-16)1X4/KI42X5/KI53SCL4SDA5GND6X11 (KO3) (I7GND8X11/INT#16X3/KI315X2/KI214VCC13X1/KI112VCC11X8/KO010X9/KO19X10/KO2Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.215.210.25.10-5.1-10.2-15.2mm
2. 2D FOOTPRINT
12345678910111213141516E=3.90mm · Pitch e=1.27mmD=9.90mm-6-5-4-3-2-1012345676543210-1-2-3-4-5-6-7mm
3. 3D CAD MODEL
Package Body: 3.90mm × 9.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (16/16)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1X4/KI4I/OMultiplexed I/O & Peripheral Pin X4/KI4 (General)
2X5/KI5I/OMultiplexed I/O & Peripheral Pin X5/KI5 (General)
3SCLI/OMultiplexed I/O & Peripheral Pin SCL (I2C)
4SDAI/OMultiplexed I/O & Peripheral Pin SDA (I2C)
5GNDGNDGround Reference Pin (GND)
6X11 (KO3) (INT#)I/OMultiplexed I/O & Peripheral Pin X11 (KO3) (INT#) (General)
7GNDGNDGround Reference Pin (GND)
8X11/INT#I/OMultiplexed I/O & Peripheral Pin X11/INT# (General)
9X10/KO2I/OMultiplexed I/O & Peripheral Pin X10/KO2 (General)
10X9/KO1I/OMultiplexed I/O & Peripheral Pin X9/KO1 (General)
11X8/KO0I/OMultiplexed I/O & Peripheral Pin X8/KO0 (General)
12VCCPowerPower Supply Input (VCC — 3.3V / 5.0V Standard Logic)
13X1/KI1I/OMultiplexed I/O & Peripheral Pin X1/KI1 (General)
14VCCPowerPower Supply Input (VCC — 3.3V / 5.0V Standard Logic)
15X2/KI2I/OMultiplexed I/O & Peripheral Pin X2/KI2 (General)
16X3/KI3I/OMultiplexed I/O & Peripheral Pin X3/KI3 (General)
PIN 1 X4/KI4
I/O
Multiplexed I/O & Peripheral Pin X4/KI4 (General)
Design note: Signal terminal X4/KI4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X4/KI4. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 5 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH456G (WCH · SOP-16)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH456G (SOP-16) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH456G (SOP-16) - 2. Standard Pinout (Top View)
True package pinout (16 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH456G (SOP-16) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH456G (SOP-16) - 4. Package Dimensions (D×E×A)
SOP-16 · 3.90×9.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH456G (SOP-16) - 5. Recommended Land Pattern
IPC-7351B Footprint (16 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH456G (SOP-16) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (5 figures · Page 1/1)
Showing 1–5 of 5 uncropped original figures for CH456
P1 · p01_fig011648×604px
CH456G (SOP-16) — CH456 是16 位数码管显示驱动和键盘扫描控制芯片。CH456 内置时钟振荡电路，可以动态驱动 最多16 只数码管或者128 只LED 发光管；同时还可以进行64 键的键盘扫描；CH456 通过2 线串行接 口与单片机等交换数据。 | 2、特点 | X15～X0 | X15 | SCL | SDA | CH456 芯片 | 单片机 | MCU 等 | 16 只 数码管 | 或 128 只 发光管 8×8 矩阵 64 键键盘
CH456 是16 位数码管显示驱动和键盘扫描控制芯片。CH456 内置时钟振荡电路，可以动态驱动 最多16 只数码管或者128 只LED 发光管；同时还可以进行64 键的键盘扫描；CH456 通过2 线串行接 口与单片机等交换数据。 | 2、特点 | X15～X0 | X15 | SCL | SDA | CH456 芯片 | 单片机 | MCU 等 | 16 只 数码管 | 或 128 只 发光管 8×8 矩阵 64 键键盘
P1 · p01_fig021572×744px
CH456G (SOP-16) — 3、封装
3、封装
P1 · p01_fig01P1
CH456G (SOP-16) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P6 · p06_fig011301×261px
CH456G (SOP-16) — （注：本表计量单位以纳秒即10
（注：本表计量单位以纳秒即10
P7 · p07_fig011875×1701px
CH456G (SOP-16) — 8.2. 抗干扰
8.2. 抗干扰

Technical Specifications & Part Details (CH456G)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH456G (SOP-16) is a 16-pin standard electronic & interconnect component featuring a 9.90 × 3.90 × 1.75 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated I2C interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
9.90 × 3.90 × 1.75 mm (A1=0.15 mm)
Package family: SOP (SOP-16)
Pin Count & Lead PitchN / e
16 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
I2C
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol16 auto-grouped pins
OK
IPC-7351B Land Pattern16 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOP-16)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
9.90 × 3.90 mm
Height (A) & Pitch (e)IPC-7351B
A=1.75mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.55 mm
Pins / Total PadsTopology
16P / 16Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOP-16
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH456G (SOP-16)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH456G (SOP-16)?

Manufactured by WCH, the CH456G is housed in a SOP-16 package with 16 pins and a 1.27 mm lead pitch. Key pins include: 1 (X4/KI4: Multiplexed I/O & Peripheral Pin X4/KI4 (General)), 2 (X5/KI5: Multiplexed I/O & Peripheral Pin X5/KI5 (General)), 3 (SCL: Multiplexed I/O & Peripheral Pin SCL (I2C)), 4 (SDA: Multiplexed I/O & Peripheral Pin SDA (I2C)), 5 (GND: Ground Reference Pin (GND)), 6 (X11 (KO3) (INT#): Multiplexed I/O & Peripheral Pin X11 (KO3) (INT#) (General)).

What are the IPC-7351B PCB Footprint dimensions for CH456G?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH456G (SOP-16) has a nominal body envelope of 3.90 × 9.90 mm, pitch e = 1.27 mm, and 16 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH456G?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH456G (WCH, SOP-16) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (16 pins) & CH456 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1X4/KI4Digital_IOSignal terminal X4/KI4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X4/KI4. Supported peripheral buses: General.
2X5/KI5Digital_IOSignal terminal X5/KI5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X5/KI5. Supported peripheral buses: General.
3SCLDigital_IOSignal terminal SCL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SCL. Supported peripheral buses: I2C.
4SDADigital_IOSignal terminal SDA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SDA. Supported peripheral buses: I2C.
5GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
6X11 (KO3) (INT#)Digital_IOSignal terminal X11 (KO3) (INT#) (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X11 (KO3) (INT#). Supported peripheral buses: General.
7GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
8X11/INT#Digital_IOSignal terminal X11/INT# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X11/INT#. Supported peripheral buses: General.
9X10/KO2Digital_IOSignal terminal X10/KO2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X10/KO2. Supported peripheral buses: General.
10X9/KO1Digital_IOSignal terminal X9/KO1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X9/KO1. Supported peripheral buses: General.
11X8/KO0Digital_IOSignal terminal X8/KO0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X8/KO0. Supported peripheral buses: General.
12VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
13X1/KI1Digital_IOSignal terminal X1/KI1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X1/KI1. Supported peripheral buses: General.
14VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
15X2/KI2Digital_IOSignal terminal X2/KI2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X2/KI2. Supported peripheral buses: General.
16X3/KI3Digital_IOSignal terminal X3/KI3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: X3/KI3. Supported peripheral buses: General.
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