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PIC16F723-I/SP (SPDIP-28) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC16F723-I/SP

MICROCHIPID: C185814SPDIP-28 · 28 Pins · Pitch 2.54mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC16F723-I/SP (SPDIP-28)1VPP/MCLR#/RE2VCAP(3)/SS(23AN1/RA14AN2/RA25VREF/AN3/RA36T0CKI/CPS6/R7NC8VSS9CLKIN/OSC1/R10IO511T1CKI/T1OSO/12CCP2(1)/T1OS13CCP1/RC214SCL/SCK/RC328RB7/ICSPDAT27RB6/ICSPCLK26RB5/AN13/CPS25RB4/AN11/CPS24RB3/AN9/CPS323RB2/AN8/CPS222RB1/AN10/CPS21RB0/AN12/CPS20VDD19VSS18RC7/RX/DT17RC6/TX/CK16RC5/SDO15RC4/SDI/SDAGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.822.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728E=6.35mm · Pitch e=2.54mmD=35.02mm-14-12-10-8-6-4-20246810121427252321191715131197531-1-3-5-7-9-11-13-15-17-19-21-23-25-27mm
3. 3D CAD MODEL
Package Body: 6.35mm × 35.02mm · Pitch: 2.54mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VPP/MCLR#/RE3I/OMultiplexed I/O & Peripheral Pin VPP/MCLR#/RE3 (General)
2VCAP(3)/SS(2)#/AN0/RA0I/OMultiplexed I/O & Peripheral Pin VCAP(3)/SS(2)#/AN0/RA0 (General)
3AN1/RA1I/OMultiplexed I/O & Peripheral Pin AN1/RA1 (General)
4AN2/RA2I/OMultiplexed I/O & Peripheral Pin AN2/RA2 (General)
5VREF/AN3/RA3AnalogMultiplexed I/O & Peripheral Pin VREF/AN3/RA3 (General)
6T0CKI/CPS6/RA4I/OMultiplexed I/O & Peripheral Pin T0CKI/CPS6/RA4 (General)
7NCNCNo Connect (Leave Floating)
8VSSGNDGround Reference Pin (VSS)
9CLKIN/OSC1/RA7I/OMultiplexed I/O & Peripheral Pin CLKIN/OSC1/RA7 (RTC/CLK)
10IO5I/OGPIO5 / RTC_GPIO5 / TOUCH5 / ADC1_CH4
11T1CKI/T1OSO/RC0I/OMultiplexed I/O & Peripheral Pin T1CKI/T1OSO/RC0 (General)
12CCP2(1)/T1OSI/RC1I/OMultiplexed I/O & Peripheral Pin CCP2(1)/T1OSI/RC1 (General)
13CCP1/RC2I/OMultiplexed I/O & Peripheral Pin CCP1/RC2 (General)
14SCL/SCK/RC3I/OMultiplexed I/O & Peripheral Pin SCL/SCK/RC3 (SPI, I2C)
15RC4/SDI/SDAI/OMultiplexed I/O & Peripheral Pin RC4/SDI/SDA (I2C)
16RC5/SDOI/OMultiplexed I/O & Peripheral Pin RC5/SDO (General)
17RC6/TX/CKI/OMultiplexed I/O & Peripheral Pin RC6/TX/CK (General)
18RC7/RX/DTI/OMultiplexed I/O & Peripheral Pin RC7/RX/DT (General)
19VSSGNDGround Reference Pin (VSS)
20VDDPowerPower Supply Input (VDD — 1.8V-5.5V)
21RB0/AN12/CPS0/INTI/OMultiplexed I/O & Peripheral Pin RB0/AN12/CPS0/INT (General)
22RB1/AN10/CPS1I/OMultiplexed I/O & Peripheral Pin RB1/AN10/CPS1 (General)
23RB2/AN8/CPS2I/OMultiplexed I/O & Peripheral Pin RB2/AN8/CPS2 (General)
24RB3/AN9/CPS3/CCP2(1)I/OMultiplexed I/O & Peripheral Pin RB3/AN9/CPS3/CCP2(1) (General)
25RB4/AN11/CPS4I/OMultiplexed I/O & Peripheral Pin RB4/AN11/CPS4 (General)
26RB5/AN13/CPS5/T1GI/OMultiplexed I/O & Peripheral Pin RB5/AN13/CPS5/T1G (General)
27RB6/ICSPCLKI/OMultiplexed I/O & Peripheral Pin RB6/ICSPCLK (General)
28RB7/ICSPDATI/OMultiplexed I/O & Peripheral Pin RB7/ICSPDAT (General)
PIN 1 VPP/MCLR#/RE3
I/O
Multiplexed I/O & Peripheral Pin VPP/MCLR#/RE3 (General)
Design note: Signal terminal VPP/MCLR#/RE3 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: VPP/MCLR#/RE3. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: PIC16F723-I/SP (MICROCHIP · SPDIP-28)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
PIC16F723-I/SP (SPDIP-28) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC16F723-I/SP (SPDIP-28) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC16F723-I/SP (SPDIP-28) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC16F723-I/SP (SPDIP-28) - 4. Package Dimensions (D×E×A)
SPDIP-28 · 6.35×35.02mm · Pitch 2.54mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC16F723-I/SP (SPDIP-28) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC16F723-I/SP (SPDIP-28) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for PIC16F723
P1 · p01_fig01377×200px
PIC16F723-I/SP (SPDIP-28) — 28/40/44-Pin Flash Microcontrollers with XLP Technology
28/40/44-Pin Flash Microcontrollers with XLP Technology
P122 · p122_fig011777×2074px
PIC16F723-I/SP (SPDIP-28) — FIGURE 14-1: CAPACITIVE SENSING BLOCK DIAGRAM
FIGURE 14-1: CAPACITIVE SENSING BLOCK DIAGRAM
P130 · p130_fig011617×587px
PIC16F723-I/SP (SPDIP-28) — FIGURE 15-1: CAPTURE MODE OPERATION BLOCK DIAGRAM
FIGURE 15-1: CAPTURE MODE OPERATION BLOCK DIAGRAM
P132 · p132_fig011763×946px
PIC16F723-I/SP (SPDIP-28) — FIGURE 15-2: COMPARE MODE OPERATION BLOCK DIAGRAM
FIGURE 15-2: COMPARE MODE OPERATION BLOCK DIAGRAM
P132 · p132_fig021628×333px
PIC16F723-I/SP (SPDIP-28) — Either RC1 or RB3 can be selected as the CCP2 pin. Refer to Section 6.1 “Alternate Pin Function” for more information. | 15.2.2 TIMER1 MODE SELECTION | In Compare mode, Timer1 must be running in either Timer mode or Synchronized Counter mod
Either RC1 or RB3 can be selected as the CCP2 pin. Refer to Section 6.1 “Alternate Pin Function” for more information. | 15.2.2 TIMER1 MODE SELECTION | In Compare mode, Timer1 must be running in either Timer mode or Synchronized Counter mod
P134 · p134_fig01867×478px
PIC16F723-I/SP (SPDIP-28) — FIGURE 15-4: CCP PWM OUTPUT
FIGURE 15-4: CCP PWM OUTPUT
P134 · p134_fig02867×1037px
PIC16F723-I/SP (SPDIP-28) — FIGURE 15-3: SIMPLIFIED PWM BLOCK DIAGRAM Duty Cycle Registers
FIGURE 15-3: SIMPLIFIED PWM BLOCK DIAGRAM Duty Cycle Registers
P134 · p134_fig01P134
PIC16F723-I/SP (SPDIP-28) — Datasheet Page 134 (p134_fig01)
Datasheet Page 134 (p134_fig01)
P186 · p186_fig011416×1013px
PIC16F723-I/SP (SPDIP-28) — FIGURE 20-1: TYPICAL CONNECTION FOR ICSP™ PROGRAMMING
FIGURE 20-1: TYPICAL CONNECTION FOR ICSP™ PROGRAMMING
P186 · p186_fig01P186
PIC16F723-I/SP (SPDIP-28) — Datasheet Page 186 (p186_fig01)
Datasheet Page 186 (p186_fig01)
P263 · p263_fig011586×1912px
PIC16F723-I/SP (SPDIP-28) — 25.1 Package Marking Information
25.1 Package Marking Information
P271 · p271_fig01All Packages in PDF
PIC16F723-I/SP (SPDIP-28) — PIC16(L)F722/3/4/6/7 - 28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] - http://www.microchip.com/packaging |  2007-2015 Microchip Technology Inc. DS40001341F-page 271 | >D3dêÜè nóܧ•îé qûÜóó m¶•óîüê .qm/  uîèê2 C4A6 ûû T†è
PIC16(L)F722/3/4/6/7 - 28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] - http://www.microchip.com/packaging |  2007-2015 Microchip Technology Inc. DS40001341F-page 271 | >D3dêÜè nóܧ•îé qûÜóó m¶•óîüê .qm/  uîèê2 C4A6 ûû T†è

Technical Specifications & Part Details (PIC16F723-I/SP)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC16F723-I/SP (SPDIP-28) is a 28-pin standard electronic & interconnect component featuring a 35.02 × 6.35 × 4.20 mm mechanical envelope (lead pitch e = 2.54 mm). Rated for 1.8V-5.5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated SPI, I2C, ADC, PWM, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V-5.5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
20 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
35.02 × 6.35 × 4.20 mm (A1=0.51 mm)
Package family: DIP (SPDIP-28)
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 2.54 mm (100.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
SPI, I2C, ADC, PWM, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 2.54mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SPDIP-28)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
35.02 × 6.35 mm
Height (A) & Pitch (e)IPC-7351B
A=4.20mm · e=2.54mm
Pad Size (W × L)Level B
1.60 × 1.60 mm
Pins / Total PadsTopology
28P / 28Pad (THT_DIP)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SPDIP-28
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC16F723-I/SP (SPDIP-28)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC16F723-I/SP (SPDIP-28)?

Manufactured by MICROCHIP, the PIC16F723-I/SP is housed in a SPDIP-28 package with 28 pins and a 2.54 mm lead pitch, supporting a VCC supply range of 1.8V-5.5V. Key pins include: 1 (VPP/MCLR#/RE3: Multiplexed I/O & Peripheral Pin VPP/MCLR#/RE3 (General)), 2 (VCAP(3)/SS(2)#/AN0/RA0: Multiplexed I/O & Peripheral Pin VCAP(3)/SS(2)#/AN0/RA0 (General)), 3 (AN1/RA1: Multiplexed I/O & Peripheral Pin AN1/RA1 (General)), 4 (AN2/RA2: Multiplexed I/O & Peripheral Pin AN2/RA2 (General)), 5 (VREF/AN3/RA3: Multiplexed I/O & Peripheral Pin VREF/AN3/RA3 (General)), 6 (T0CKI/CPS6/RA4: Multiplexed I/O & Peripheral Pin T0CKI/CPS6/RA4 (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC16F723-I/SP?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC16F723-I/SP (SPDIP-28) has a nominal body envelope of 6.35 × 35.02 mm, pitch e = 2.54 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC16F723-I/SP?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC16F723-I/SP (MICROCHIP, SPDIP-28) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & PIC16F723 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VPP/MCLR#/RE3Digital_IOSignal terminal VPP/MCLR#/RE3 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: VPP/MCLR#/RE3. Supported peripheral buses: General.
2VCAP(3)/SS(2)#/AN0/RA0Digital_IOSignal terminal VCAP(3)/SS(2)#/AN0/RA0 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: VCAP(3)/SS(2)#/AN0/RA0. Supported peripheral buses: General.
3AN1/RA1Digital_IOSignal terminal AN1/RA1 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: AN1/RA1. Supported peripheral buses: General.
4AN2/RA2Digital_IOSignal terminal AN2/RA2 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: AN2/RA2. Supported peripheral buses: General.
5VREF/AN3/RA3AnalogSignal terminal VREF/AN3/RA3 (Analog, 1.8V-5.5V domain). Multiplexed alternate functions: VREF/AN3/RA3. Supported peripheral buses: General.
6T0CKI/CPS6/RA4Digital_IOSignal terminal T0CKI/CPS6/RA4 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: T0CKI/CPS6/RA4. Supported peripheral buses: General.
7NCNo_ConnectNo Connect (Leave Floating)
8VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
9CLKIN/OSC1/RA7Digital_IOSignal terminal CLKIN/OSC1/RA7 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CLKIN/OSC1/RA7. Supported peripheral buses: RTC/CLK.
10IO5Digital_IOGPIO5 / RTC_GPIO5 / TOUCH5 / ADC1_CH4
11T1CKI/T1OSO/RC0Digital_IOSignal terminal T1CKI/T1OSO/RC0 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: T1CKI/T1OSO/RC0. Supported peripheral buses: General.
12CCP2(1)/T1OSI/RC1Digital_IOSignal terminal CCP2(1)/T1OSI/RC1 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CCP2(1)/T1OSI/RC1. Supported peripheral buses: General.
13CCP1/RC2Digital_IOSignal terminal CCP1/RC2 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CCP1/RC2. Supported peripheral buses: General.
14SCL/SCK/RC3Digital_IOSignal terminal SCL/SCK/RC3 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: SCL/SCK/RC3. Supported peripheral buses: SPI, I2C.
15RC4/SDI/SDADigital_IOSignal terminal RC4/SDI/SDA (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC4/SDI/SDA. Supported peripheral buses: I2C.
16RC5/SDODigital_IOSignal terminal RC5/SDO (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC5/SDO. Supported peripheral buses: General.
17RC6/TX/CKDigital_IOSignal terminal RC6/TX/CK (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC6/TX/CK. Supported peripheral buses: General.
18RC7/RX/DTDigital_IOSignal terminal RC7/RX/DT (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC7/RX/DT. Supported peripheral buses: General.
19VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
20VDDPower_InPrimary positive power supply input (VDD) operating in the 1.8V-5.5V domain (Max rating: 5.5V).
21RB0/AN12/CPS0/INTDigital_IOSignal terminal RB0/AN12/CPS0/INT (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB0/AN12/CPS0/INT. Supported peripheral buses: General.
22RB1/AN10/CPS1Digital_IOSignal terminal RB1/AN10/CPS1 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB1/AN10/CPS1. Supported peripheral buses: General.
23RB2/AN8/CPS2Digital_IOSignal terminal RB2/AN8/CPS2 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB2/AN8/CPS2. Supported peripheral buses: General.
24RB3/AN9/CPS3/CCP2(1)Digital_IOSignal terminal RB3/AN9/CPS3/CCP2(1) (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB3/AN9/CPS3/CCP2(1). Supported peripheral buses: General.
25RB4/AN11/CPS4Digital_IOSignal terminal RB4/AN11/CPS4 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB4/AN11/CPS4. Supported peripheral buses: General.
26RB5/AN13/CPS5/T1GDigital_IOSignal terminal RB5/AN13/CPS5/T1G (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB5/AN13/CPS5/T1G. Supported peripheral buses: General.
27RB6/ICSPCLKDigital_IOSignal terminal RB6/ICSPCLK (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB6/ICSPCLK. Supported peripheral buses: General.
28RB7/ICSPDATDigital_IOSignal terminal RB7/ICSPDAT (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RB7/ICSPDAT. Supported peripheral buses: General.
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