PIC18LF6490-I/PT (TQFP-64(10x10)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of PIC18LF6490-I/PT (TQFP-64(10x10))?

Manufactured by MICROCHIP, the PIC18LF6490-I/PT is housed in a TQFP-64(10x10) package with 64 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.0V to 5.5V. Key pins include: 1 (LCDBIAS2: Multiplexed I/O & Peripheral Pin LCDBIAS2 (General)), 2 (LCDBIAS1: Multiplexed I/O & Peripheral Pin LCDBIAS1 (General)), 3 (RG0/SEG30: Multiplexed I/O & Peripheral Pin RG0/SEG30 (General)), 4 (RG1/TX2/CK2/SEG29: Multiplexed I/O & Peripheral Pin RG1/TX2/CK2/SEG29 (General)), 5 (RG2/RX2/DT2/SEG28: Multiplexed I/O & Peripheral Pin RG2/RX2/DT2/SEG28 (General)), 6 (RG3/SEG27: Multiplexed I/O & Peripheral Pin RG3/SEG27 (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for PIC18LF6490-I/PT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC18LF6490-I/PT (TQFP-64(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC18LF6490-I/PT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC18LF6490-I/PT (MICROCHIP, TQFP-64(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 10.00mm × 10.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	LCDBIAS2	I/O	Multiplexed I/O & Peripheral Pin LCDBIAS2 (General)
2	LCDBIAS1	I/O	Multiplexed I/O & Peripheral Pin LCDBIAS1 (General)
3	RG0/SEG30	I/O	Multiplexed I/O & Peripheral Pin RG0/SEG30 (General)
4	RG1/TX2/CK2/SEG29	I/O	Multiplexed I/O & Peripheral Pin RG1/TX2/CK2/SEG29 (General)
5	RG2/RX2/DT2/SEG28	I/O	Multiplexed I/O & Peripheral Pin RG2/RX2/DT2/SEG28 (General)
6	RG3/SEG27	I/O	Multiplexed I/O & Peripheral Pin RG3/SEG27 (General)
7	NC	NC	No Connect (Leave Floating)
8	RG4/SEG26	I/O	Multiplexed I/O & Peripheral Pin RG4/SEG26 (General)
9	IO4	I/O	GPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10	VDD	Power	Power Supply Input (VDD — 2.0V to 5.5V)
11	RF7/SS#/SEG25	I/O	Multiplexed I/O & Peripheral Pin RF7/SS#/SEG25 (General)
12	RF6/AN11/SEG24	I/O	Multiplexed I/O & Peripheral Pin RF6/AN11/SEG24 (General)
13	RF5/AN10/CVREF/SEG23	I/O	Multiplexed I/O & Peripheral Pin RF5/AN10/CVREF/SEG23 (General)
14	RF4/AN9/SEG22	I/O	Multiplexed I/O & Peripheral Pin RF4/AN9/SEG22 (General)
15	RF3/AN8/SEG21	I/O	Multiplexed I/O & Peripheral Pin RF3/AN8/SEG21 (General)
16	RF2/AN7/C1OUT/SEG20	I/O	Multiplexed I/O & Peripheral Pin RF2/AN7/C1OUT/SEG20 (General)
17	RF1/AN6/C2OUT/SEG19	I/O	Multiplexed I/O & Peripheral Pin RF1/AN6/C2OUT/SEG19 (General)
18	RF0/AN5/SEG18	I/O	Multiplexed I/O & Peripheral Pin RF0/AN5/SEG18 (General)
19	AVDD	Power	Power Supply Input (AVDD — 2.0V to 5.5V)
20	AVSS	GND	Ground Reference Pin (AVSS)
21	RA3/AN3/VREF+/SEG17	Analog	Multiplexed I/O & Peripheral Pin RA3/AN3/VREF+/SEG17 (General)
22	RA2/AN2/VREF-/SEG16	Analog	Multiplexed I/O & Peripheral Pin RA2/AN2/VREF-/SEG16 (General)
23	RA1/AN1	I/O	Multiplexed I/O & Peripheral Pin RA1/AN1 (General)
24	RA0/AN0	I/O	Multiplexed I/O & Peripheral Pin RA0/AN0 (General)
25	VSS	GND	Ground Reference Pin (VSS)
26	VDD	Power	Power Supply Input (VDD — 2.0V to 5.5V)
27	RA5/AN4/HLVDIN/SEG15	I/O	Multiplexed I/O & Peripheral Pin RA5/AN4/HLVDIN/SEG15 (General)
28	RA4/T0CKI/SEG14	I/O	Multiplexed I/O & Peripheral Pin RA4/T0CKI/SEG14 (General)
29	RC1/T1OSI/CCP2(1)	I/O	Multiplexed I/O & Peripheral Pin RC1/T1OSI/CCP2(1) (General)
30	RC0/T1OSO/T13CKI	I/O	Multiplexed I/O & Peripheral Pin RC0/T1OSO/T13CKI (General)
31	RC6/TX1/CK1	I/O	Multiplexed I/O & Peripheral Pin RC6/TX1/CK1 (General)
32	RC7/RX1/DT1	I/O	Multiplexed I/O & Peripheral Pin RC7/RX1/DT1 (General)
33	RC2/CCP1/SEG13	I/O	Multiplexed I/O & Peripheral Pin RC2/CCP1/SEG13 (General)
34	RC3/SCK/SCL	I/O	Multiplexed I/O & Peripheral Pin RC3/SCK/SCL (SPI, I2C)
35	RC4/SDI/SDA	I/O	Multiplexed I/O & Peripheral Pin RC4/SDI/SDA (I2C)
36	RC5/SDO/SEG12	I/O	Multiplexed I/O & Peripheral Pin RC5/SDO/SEG12 (General)
37	RB7/KBI3/PGD	I/O	Multiplexed I/O & Peripheral Pin RB7/KBI3/PGD (General)
38	VDD	Power	Power Supply Input (VDD — 2.0V to 5.5V)
39	IO39	I/O	General Purpose Digital I/O Pin IO39
40	IO40	I/O	General Purpose Digital I/O Pin IO40
41	VSS	GND	Ground Reference Pin (VSS)
42	RB6/KBI2/PGC	I/O	Multiplexed I/O & Peripheral Pin RB6/KBI2/PGC (General)
43	RB5/KBI1	I/O	Multiplexed I/O & Peripheral Pin RB5/KBI1 (General)
44	RB4/KBI0/SEG11	I/O	Multiplexed I/O & Peripheral Pin RB4/KBI0/SEG11 (General)
45	RB3/INT3/SEG10	I/O	Multiplexed I/O & Peripheral Pin RB3/INT3/SEG10 (General)
46	RB2/INT2/SEG9	I/O	Multiplexed I/O & Peripheral Pin RB2/INT2/SEG9 (General)
47	RB1/INT1/SEG8	I/O	Multiplexed I/O & Peripheral Pin RB1/INT1/SEG8 (General)
48	RB0/INT0	I/O	Multiplexed I/O & Peripheral Pin RB0/INT0 (General)
49	IO49	I/O	General Purpose Digital I/O Pin IO49
50	IO50	I/O	General Purpose Digital I/O Pin IO50
51	RD5/SEG5	I/O	Multiplexed I/O & Peripheral Pin RD5/SEG5 (General)
52	RD4/SEG4	I/O	Multiplexed I/O & Peripheral Pin RD4/SEG4 (General)
53	RD3/SEG3	I/O	Multiplexed I/O & Peripheral Pin RD3/SEG3 (General)
54	RD2/SEG2	I/O	Multiplexed I/O & Peripheral Pin RD2/SEG2 (General)
55	RD1/SEG1	I/O	Multiplexed I/O & Peripheral Pin RD1/SEG1 (General)
56	VSS	GND	Ground Reference Pin (VSS)
57	VDD	Power	Power Supply Input (VDD — 2.0V to 5.5V)
58	RD0/SEG0	I/O	Multiplexed I/O & Peripheral Pin RD0/SEG0 (General)
59	RE7/CCP2(1)/SEG31	I/O	Multiplexed I/O & Peripheral Pin RE7/CCP2(1)/SEG31 (General)
60	RE6/COM3	I/O	Multiplexed I/O & Peripheral Pin RE6/COM3 (General)
61	RE5/COM2	I/O	Multiplexed I/O & Peripheral Pin RE5/COM2 (General)
62	RE4/COM1	I/O	Multiplexed I/O & Peripheral Pin RE4/COM1 (General)
63	COM0	I/O	Multiplexed I/O & Peripheral Pin COM0 (General)
64	LCDBIAS3	I/O	Multiplexed I/O & Peripheral Pin LCDBIAS3 (General)

PIN 1 LCDBIAS2

I/O

Multiplexed I/O & Peripheral Pin LCDBIAS2 (General)

Design note: Signal terminal LCDBIAS2 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: LCDBIAS2. Supported peripheral buses: General.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 16 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

PIC18LF6490-I/PT (TQFP-64(10x10)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

PIC18LF6490-I/PT (TQFP-64(10x10)) - 2. Standard Pinout (Top View)

True package pinout (64 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

PIC18LF6490-I/PT (TQFP-64(10x10)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

PIC18LF6490-I/PT (TQFP-64(10x10)) - 4. Package Dimensions (D×E×A)

TQFP-64(10x10) · 10.00×10.00mm · Pitch 0.50mmExpand ›

5. Recommended Land PatternLAND PATTERN

PIC18LF6490-I/PT (TQFP-64(10x10)) - 5. Recommended Land Pattern

IPC-7351B Footprint (64 Pads)Expand ›

6. Application SchematicSCHEMATIC

PIC18LF6490-I/PT (TQFP-64(10x10)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (16 figures · Page 1/2)

Showing 1–12 of 16 uncropped original figures for PIC18LF6490

P2 · p02_fig011777×1640px

PIC18LF6490-I/PT (TQFP-64(10x10)) — DS39629C-page ii © 2007 Microchip Technology Inc. | Trademarks | AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Micro

DS39629C-page ii © 2007 Microchip Technology Inc. | Trademarks | AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Micro

P2 · p02_fig02783×283px

PIC18LF6490-I/PT (TQFP-64(10x10)) — DS39629C-page ii © 2007 Microchip Technology Inc.

P152 · p152_fig011777×433px

FIGURE 14-2: CAPTURE MODE OPERATION BLOCK DIAGRAM

P152 · p152_fig021777×1009px

FIGURE 14-2: CAPTURE MODE OPERATION BLOCK DIAGRAM

P153 · p153_fig011778×262px

FIGURE 14-3: COMPARE MODE OPERATION BLOCK DIAGRAM

P153 · p153_fig021537×945px

FIGURE 14-3: COMPARE MODE OPERATION BLOCK DIAGRAM

P163 · p163_fig011777×938px

FIGURE 15-2: SPI MASTER/SLAVE CONNECTION

P166 · p166_fig011758×1059px

FIGURE 15-5: SPI MODE WAVEFORM (SLAVE MODE WITH CKE = 0) SS SCK (CKP = 0 SCK (CKP = 1 CKE = 0) Write to SSPBUF

P166 · p166_fig021777×1097px

FIGURE 15-6: SPI MODE WAVEFORM (SLAVE MODE WITH CKE = 1) SS SCK (CKP = 0 SCK (CKP = 1 CKE = 1) Write to SSPBUF

P166 · p166_fig01P166

Datasheet Page 166 (p166_fig01)

P391 · p391_fig01413×490px

28.1 Package Marking Information

P391 · p391_fig02414×490px

Example

Page 1 / 2 (16 extracted figures)

Technical Specifications & Part Details (PIC18LF6490-I/PT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:PIC18LF6490-I/PT (TQFP-64(10x10)) is a 64-pin standard electronic & interconnect component featuring a 10.00 × 10.00 × 1.20 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 2.0V to 5.5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C, ADC, PWM, RTC/CLK interfaces.

Operating Supply VoltageV_CC / V_DD

2.0V to 5.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C ~ +85°C (Industrial Grade)

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

32 kHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

10.00 × 10.00 × 1.20 mm (A1=0.10 mm)

Package family: TQFP (TQFP-64(10x10))

Pin Count & Lead PitchN / e

64 Pins | Pitch e = 0.50 mm (19.7 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

UART, SPI, I2C, ADC, PWM, RTC/CLK

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol64 auto-grouped pins

IPC-7351B Land Pattern64 pads · Pitch 0.50mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TQFP-64(10x10))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

10.00 × 10.00 mm

Height (A) & Pitch (e)IPC-7351B

A=1.20mm · e=0.50mm

Pad Size (W × L)Level B

0.30 × 1.25 mm

Pins / Total PadsTopology

64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit TQFP-64(10x10)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC18LF6490-I/PT (TQFP-64(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC18LF6490-I/PT (TQFP-64(10x10))?

Manufactured by MICROCHIP, the PIC18LF6490-I/PT is housed in a TQFP-64(10x10) package with 64 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.0V to 5.5V. Key pins include: 1 (LCDBIAS2: Multiplexed I/O & Peripheral Pin LCDBIAS2 (General)), 2 (LCDBIAS1: Multiplexed I/O & Peripheral Pin LCDBIAS1 (General)), 3 (RG0/SEG30: Multiplexed I/O & Peripheral Pin RG0/SEG30 (General)), 4 (RG1/TX2/CK2/SEG29: Multiplexed I/O & Peripheral Pin RG1/TX2/CK2/SEG29 (General)), 5 (RG2/RX2/DT2/SEG28: Multiplexed I/O & Peripheral Pin RG2/RX2/DT2/SEG28 (General)), 6 (RG3/SEG27: Multiplexed I/O & Peripheral Pin RG3/SEG27 (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC18LF6490-I/PT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC18LF6490-I/PT (TQFP-64(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC18LF6490-I/PT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC18LF6490-I/PT (MICROCHIP, TQFP-64(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & PIC18LF6490 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	LCDBIAS2	Digital_IO	Signal terminal LCDBIAS2 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: LCDBIAS2. Supported peripheral buses: General.
2	LCDBIAS1	Digital_IO	Signal terminal LCDBIAS1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: LCDBIAS1. Supported peripheral buses: General.
3	RG0/SEG30	Digital_IO	Signal terminal RG0/SEG30 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RG0/SEG30. Supported peripheral buses: General.
4	RG1/TX2/CK2/SEG29	Digital_IO	Signal terminal RG1/TX2/CK2/SEG29 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RG1/TX2/CK2/SEG29. Supported peripheral buses: General.
5	RG2/RX2/DT2/SEG28	Digital_IO	Signal terminal RG2/RX2/DT2/SEG28 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RG2/RX2/DT2/SEG28. Supported peripheral buses: General.
6	RG3/SEG27	Digital_IO	Signal terminal RG3/SEG27 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RG3/SEG27. Supported peripheral buses: General.
7	NC	No_Connect	No Connect (Leave Floating)
8	RG4/SEG26	Digital_IO	Signal terminal RG4/SEG26 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RG4/SEG26. Supported peripheral buses: General.
9	IO4	Digital_IO	GPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.0V to 5.5V domain (Max rating: 5.5V).
11	RF7/SS#/SEG25	RF_50Ohm	Signal terminal RF7/SS#/SEG25 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF7/SS#/SEG25. Supported peripheral buses: General.
12	RF6/AN11/SEG24	RF_50Ohm	Signal terminal RF6/AN11/SEG24 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF6/AN11/SEG24. Supported peripheral buses: General.
13	RF5/AN10/CVREF/SEG23	RF_50Ohm	Signal terminal RF5/AN10/CVREF/SEG23 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF5/AN10/CVREF/SEG23. Supported peripheral buses: General.
14	RF4/AN9/SEG22	RF_50Ohm	Signal terminal RF4/AN9/SEG22 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF4/AN9/SEG22. Supported peripheral buses: General.
15	RF3/AN8/SEG21	RF_50Ohm	Signal terminal RF3/AN8/SEG21 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF3/AN8/SEG21. Supported peripheral buses: General.
16	RF2/AN7/C1OUT/SEG20	RF_50Ohm	Signal terminal RF2/AN7/C1OUT/SEG20 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF2/AN7/C1OUT/SEG20. Supported peripheral buses: General.
17	RF1/AN6/C2OUT/SEG19	RF_50Ohm	Signal terminal RF1/AN6/C2OUT/SEG19 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF1/AN6/C2OUT/SEG19. Supported peripheral buses: General.
18	RF0/AN5/SEG18	RF_50Ohm	Signal terminal RF0/AN5/SEG18 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RF0/AN5/SEG18. Supported peripheral buses: General.
19	AVDD	Power_In	Primary positive power supply input (AVDD) operating in the 2.0V to 5.5V domain (Max rating: 5.5V).
20	AVSS	GND	0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks.
21	RA3/AN3/VREF+/SEG17	Analog	Signal terminal RA3/AN3/VREF+/SEG17 (Analog, 2.0V to 5.5V domain). Multiplexed alternate functions: RA3/AN3/VREF+/SEG17. Supported peripheral buses: General.
22	RA2/AN2/VREF-/SEG16	Analog	Signal terminal RA2/AN2/VREF-/SEG16 (Analog, 2.0V to 5.5V domain). Multiplexed alternate functions: RA2/AN2/VREF-/SEG16. Supported peripheral buses: General.
23	RA1/AN1	Digital_IO	Signal terminal RA1/AN1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RA1/AN1. Supported peripheral buses: General.
24	RA0/AN0	Digital_IO	Signal terminal RA0/AN0 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RA0/AN0. Supported peripheral buses: General.
25	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
26	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.0V to 5.5V domain (Max rating: 5.5V).
27	RA5/AN4/HLVDIN/SEG15	Digital_IO	Signal terminal RA5/AN4/HLVDIN/SEG15 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RA5/AN4/HLVDIN/SEG15. Supported peripheral buses: General.
28	RA4/T0CKI/SEG14	Digital_IO	Signal terminal RA4/T0CKI/SEG14 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RA4/T0CKI/SEG14. Supported peripheral buses: General.
29	RC1/T1OSI/CCP2(1)	Digital_IO	Signal terminal RC1/T1OSI/CCP2(1) (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC1/T1OSI/CCP2(1). Supported peripheral buses: General.
30	RC0/T1OSO/T13CKI	Digital_IO	Signal terminal RC0/T1OSO/T13CKI (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC0/T1OSO/T13CKI. Supported peripheral buses: General.
31	RC6/TX1/CK1	Digital_IO	Signal terminal RC6/TX1/CK1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC6/TX1/CK1. Supported peripheral buses: General.
32	RC7/RX1/DT1	Digital_IO	Signal terminal RC7/RX1/DT1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC7/RX1/DT1. Supported peripheral buses: General.
33	RC2/CCP1/SEG13	Digital_IO	Signal terminal RC2/CCP1/SEG13 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC2/CCP1/SEG13. Supported peripheral buses: General.
34	RC3/SCK/SCL	Digital_IO	Signal terminal RC3/SCK/SCL (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC3/SCK/SCL. Supported peripheral buses: SPI, I2C.
35	RC4/SDI/SDA	Digital_IO	Signal terminal RC4/SDI/SDA (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC4/SDI/SDA. Supported peripheral buses: I2C.
36	RC5/SDO/SEG12	Digital_IO	Signal terminal RC5/SDO/SEG12 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RC5/SDO/SEG12. Supported peripheral buses: General.
37	RB7/KBI3/PGD	Digital_IO	Signal terminal RB7/KBI3/PGD (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB7/KBI3/PGD. Supported peripheral buses: General.
38	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.0V to 5.5V domain (Max rating: 5.5V).
39	IO39	Digital_IO	General Purpose Digital I/O Pin IO39
40	IO40	Digital_IO	General Purpose Digital I/O Pin IO40
41	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
42	RB6/KBI2/PGC	Digital_IO	Signal terminal RB6/KBI2/PGC (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB6/KBI2/PGC. Supported peripheral buses: General.
43	RB5/KBI1	Digital_IO	Signal terminal RB5/KBI1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB5/KBI1. Supported peripheral buses: General.
44	RB4/KBI0/SEG11	Digital_IO	Signal terminal RB4/KBI0/SEG11 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB4/KBI0/SEG11. Supported peripheral buses: General.
45	RB3/INT3/SEG10	Digital_IO	Signal terminal RB3/INT3/SEG10 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB3/INT3/SEG10. Supported peripheral buses: General.
46	RB2/INT2/SEG9	Digital_IO	Signal terminal RB2/INT2/SEG9 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB2/INT2/SEG9. Supported peripheral buses: General.
47	RB1/INT1/SEG8	Digital_IO	Signal terminal RB1/INT1/SEG8 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB1/INT1/SEG8. Supported peripheral buses: General.
48	RB0/INT0	Digital_IO	Signal terminal RB0/INT0 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RB0/INT0. Supported peripheral buses: General.
49	IO49	Digital_IO	General Purpose Digital I/O Pin IO49
50	IO50	Digital_IO	General Purpose Digital I/O Pin IO50
51	RD5/SEG5	Digital_IO	Signal terminal RD5/SEG5 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RD5/SEG5. Supported peripheral buses: General.
52	RD4/SEG4	Digital_IO	Signal terminal RD4/SEG4 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RD4/SEG4. Supported peripheral buses: General.
53	RD3/SEG3	Digital_IO	Signal terminal RD3/SEG3 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RD3/SEG3. Supported peripheral buses: General.
54	RD2/SEG2	Digital_IO	Signal terminal RD2/SEG2 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RD2/SEG2. Supported peripheral buses: General.
55	RD1/SEG1	Digital_IO	Signal terminal RD1/SEG1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RD1/SEG1. Supported peripheral buses: General.
56	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
57	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.0V to 5.5V domain (Max rating: 5.5V).
58	RD0/SEG0	Digital_IO	Signal terminal RD0/SEG0 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RD0/SEG0. Supported peripheral buses: General.
59	RE7/CCP2(1)/SEG31	Digital_IO	Signal terminal RE7/CCP2(1)/SEG31 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RE7/CCP2(1)/SEG31. Supported peripheral buses: General.
60	RE6/COM3	Digital_IO	Signal terminal RE6/COM3 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RE6/COM3. Supported peripheral buses: General.
61	RE5/COM2	Digital_IO	Signal terminal RE5/COM2 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RE5/COM2. Supported peripheral buses: General.
62	RE4/COM1	Digital_IO	Signal terminal RE4/COM1 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: RE4/COM1. Supported peripheral buses: General.
63	COM0	Digital_IO	Signal terminal COM0 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: COM0. Supported peripheral buses: General.
64	LCDBIAS3	Digital_IO	Signal terminal LCDBIAS3 (I/O, 2.0V to 5.5V domain). Multiplexed alternate functions: LCDBIAS3. Supported peripheral buses: General.

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