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DSC1001AI2-012.0000 (SMD7050-4P) — Symbol, Footprint IPC-7351B & 3D STEP Model

DSC1001AI2-012.0000

MICROCHIPID: C1671628SMD7050-4P · 5 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · DSC1001AI2-012.0000 (SMD7050-4P)1STANDBY#2GND3OUT5EP4VDDGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.810.25.10-5.1-10.2mm
2. 2D FOOTPRINT
12345E=7.00mm · Pitch e=0.50mmD=5.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 5.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (5/5)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1STANDBY#I/OMultiplexed I/O & Peripheral Pin STANDBY# (General)
2GNDGNDGround Reference Pin (GND)
3OUTI/OMultiplexed I/O & Peripheral Pin OUT (RTC/CLK)
4VDDPowerPower Supply Input (VDD — 1.8 to 3.3 v)
5EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 STANDBY#
I/O
Multiplexed I/O & Peripheral Pin STANDBY# (General)
Design note: Standbyinput(Section41“StandbyFunction”) .
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 11 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: DSC1001AI2-012.0000 (MICROCHIP · SMD7050-4P)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
DSC1001AI2-012.0000 (SMD7050-4P) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
DSC1001AI2-012.0000 (SMD7050-4P) - 2. Standard Pinout (Top View)
True package pinout (5 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
DSC1001AI2-012.0000 (SMD7050-4P) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
DSC1001AI2-012.0000 (SMD7050-4P) - 4. Package Dimensions (D×E×A)
SMD7050-4P · 7.00×5.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
DSC1001AI2-012.0000 (SMD7050-4P) - 5. Recommended Land Pattern
IPC-7351B Footprint (5 Pads)Expand ›
6. Application SchematicSCHEMATIC
DSC1001AI2-012.0000 (SMD7050-4P) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (11 figures · Page 1/1)
Showing 1–11 of 11 uncropped original figures for DSC1001
P1 · p01_fig01377×200px
DSC1001AI2-012.0000 (SMD7050-4P) — 1.8V-3.3V Low-Power Precision CMOS Oscillators
1.8V-3.3V Low-Power Precision CMOS Oscillators
P1 · p01_fig02867×610px
DSC1001AI2-012.0000 (SMD7050-4P) — The DSC1003 and DSC1004 have the same functionality and performance as the DSC1001, but feature higher output drives of 25 pF and 40 pF, respectively. | Package Types | DSC1001/3/4 DSC1001 DSC1003 DSC1004 | CDFN/DFN | (Top View) | STANDBY#
The DSC1003 and DSC1004 have the same functionality and performance as the DSC1001, but feature higher output drives of 25 pF and 40 pF, respectively. | Package Types | DSC1001/3/4 DSC1001 DSC1003 DSC1004 | CDFN/DFN | (Top View) | STANDBY#
P2 · p02_fig011496×1168px
DSC1001AI2-012.0000 (SMD7050-4P) — DSC1001/3/4 DSC1001 DSC1003 DSC1004 | Block Diagram | PFD VCO | FRAC-N | PLL | OUTPUT VDD | GND | (PIN1) STANDBY# | PFD VCO | FRAC-N | PFD VCO | PLL | RESONATOR | VDD | GND | (PIN1)
DSC1001/3/4 DSC1001 DSC1003 DSC1004 | Block Diagram | PFD VCO | FRAC-N | PLL | OUTPUT VDD | GND | (PIN1) STANDBY# | PFD VCO | FRAC-N | PFD VCO | PLL | RESONATOR | VDD | GND | (PIN1)
P11 · p11_fig011777×881px
DSC1001AI2-012.0000 (SMD7050-4P) — FIGURE 6-1: Recommended Board Layout for DSC1001/3/4 DSC1001 DSC1003 DSC1004.
FIGURE 6-1: Recommended Board Layout for DSC1001/3/4 DSC1001 DSC1003 DSC1004.
P11 · p11_fig01P11
DSC1001AI2-012.0000 (SMD7050-4P) — Datasheet Page 11 (p11_fig01)
Datasheet Page 11 (p11_fig01)
P13 · p13_fig011777×880px
DSC1001AI2-012.0000 (SMD7050-4P) — DSC1001/3/4 DSC1001 DSC1003 DSC1004 | 8.0 PACKAGING INFORMATION | 8.1 Package Marking Information | Example 4-Lead CDFN/DFN* | XXXXXX | 0SSS DCPYYWW | 0400000 | 0603 DCP1121
DSC1001/3/4 DSC1001 DSC1003 DSC1004 | 8.0 PACKAGING INFORMATION | 8.1 Package Marking Information | Example 4-Lead CDFN/DFN* | XXXXXX | 0SSS DCPYYWW | 0400000 | 0603 DCP1121
P13 · p13_fig021359×869px
DSC1001AI2-012.0000 (SMD7050-4P) — ●, ▲, ▼Pin one index is identified by a dot, delta up, or delta down (triangle mark). | Underbar (_) and/or Overbar (⎯) symbol may not be to scale. | 3 e | 3 e
●, ▲, ▼Pin one index is identified by a dot, delta up, or delta down (triangle mark). | Underbar (_) and/or Overbar (⎯) symbol may not be to scale. | 3 e | 3 e
P13 · p13_fig01P13
DSC1001AI2-012.0000 (SMD7050-4P) — Datasheet Page 13 (p13_fig01)
Datasheet Page 13 (p13_fig01)
P14 · p14_fig011672×1744px
DSC1001AI2-012.0000 (SMD7050-4P) — 4-Lead DFN 7.0 mm x 5.0 mm Package Outline & Recommended Land Pattern
4-Lead DFN 7.0 mm x 5.0 mm Package Outline & Recommended Land Pattern
P14 · p14_fig01P14
DSC1001AI2-012.0000 (SMD7050-4P) — Datasheet Page 14 (p14_fig01)
Datasheet Page 14 (p14_fig01)
P15 · p15_fig011653×2009px
DSC1001AI2-012.0000 (SMD7050-4P) — 4-Lead CDFN 5.0 mm x 3.2 mm Package Outline & Recommended Land Pattern
4-Lead CDFN 5.0 mm x 3.2 mm Package Outline & Recommended Land Pattern

Technical Specifications & Part Details (DSC1001AI2-012.0000)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:DSC1001AI2-012.0000 (SMD7050-4P) is a 4-pin standard electronic & interconnect component featuring a 7.00 × 5.00 × 2.00 mm mechanical envelope (lead pitch e = 0.00 mm). Rated for 1.8 to 3.3 v supply operation across 40°C to 105°C with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8 to 3.3 v
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
40°C to 105°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
1 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 5.00 × 2.00 mm (A1=0.02 mm)
Package family: OTHER (SMD7050-4P)
Pin Count & Lead PitchN / e
4 Pins
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol5 auto-grouped pins
OK
IPC-7351B Land Pattern5 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 2.20×3.50mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SMD7050-4P)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 5.00 mm
Height (A) & Pitch (e)IPC-7351B
A=2.00mm · e=0.50mm
Pad Size (W × L)Level B
1.80 × 2.00 mm
Pins / Total PadsTopology
5P / 5Pad (CUSTOM_ARRAY)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SMD7050-4P
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — DSC1001AI2-012.0000 (SMD7050-4P)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of DSC1001AI2-012.0000 (SMD7050-4P)?

Manufactured by MICROCHIP, the DSC1001AI2-012.0000 is housed in a SMD7050-4P package with 5 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.8 to 3.3 v. Key pins include: 1 (STANDBY#: Multiplexed I/O & Peripheral Pin STANDBY# (General)), 2 (GND: Ground Reference Pin (GND)), 3 (OUT: Multiplexed I/O & Peripheral Pin OUT (RTC/CLK)), 4 (VDD: Power Supply Input (VDD — 1.8 to 3.3 v)), 5 (EP: Exposed Thermal & Ground Pad (EP)).

What are the IPC-7351B PCB Footprint dimensions for DSC1001AI2-012.0000?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), DSC1001AI2-012.0000 (SMD7050-4P) has a nominal body envelope of 5.00 × 7.00 mm, pitch e = 0.50 mm, and 5 copper pads plus a central exposed thermal pad (EPAD) of 2.20 × 3.50 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for DSC1001AI2-012.0000?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for DSC1001AI2-012.0000 (MICROCHIP, SMD7050-4P) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (5 pins) & DSC1001 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1STANDBY#Digital_IOSignal terminal STANDBY# (I/O, 1.8 to 3.3 v domain). Multiplexed alternate functions: STANDBY#. Supported peripheral buses: General.
2GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
3OUTDigital_IOSignal terminal OUT (I/O, 1.8 to 3.3 v domain). Multiplexed alternate functions: OUT. Supported peripheral buses: RTC/CLK.
4VDDPower_InPrimary positive power supply input (VDD) operating in the 1.8 to 3.3 v domain (Max rating: 3.3V).
5EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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