ATSAMA5D24C-CU (TFBGA-256) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of ATSAMA5D24C-CU (TFBGA-256)?

Manufactured by MICROCHIP, the ATSAMA5D24C-CU is housed in a TFBGA-256 package with 256 pins and a 0.40 mm lead pitch. Key pins include: A1 (PA1: Multiplexed I/O & Peripheral Pin PA1 (General)), A2 (PA2: Multiplexed I/O & Peripheral Pin PA2 (General)), A3 (PA3: Multiplexed I/O & Peripheral Pin PA3 (General)), A4 (PA4: Multiplexed I/O & Peripheral Pin PA4 (General)), A5 (PA5: Multiplexed I/O & Peripheral Pin PA5 (General)), A6 (PA6: Multiplexed I/O & Peripheral Pin PA6 (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for ATSAMA5D24C-CU?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATSAMA5D24C-CU (TFBGA-256) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.40 mm, and 256 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATSAMA5D24C-CU?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATSAMA5D24C-CU (MICROCHIP, TFBGA-256) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 8.00mm × 8.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (256/256)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
A1	PA1	I/O	Multiplexed I/O & Peripheral Pin PA1 (General)
A2	PA2	I/O	Multiplexed I/O & Peripheral Pin PA2 (General)
A3	PA3	I/O	Multiplexed I/O & Peripheral Pin PA3 (General)
A4	PA4	I/O	Multiplexed I/O & Peripheral Pin PA4 (General)
A5	PA5	I/O	Multiplexed I/O & Peripheral Pin PA5 (General)
A6	PA6	I/O	Multiplexed I/O & Peripheral Pin PA6 (General)
A7	PA7	I/O	Multiplexed I/O & Peripheral Pin PA7 (General)
A8	PA8	I/O	Multiplexed I/O & Peripheral Pin PA8 (General)
A9	PA9	I/O	Multiplexed I/O & Peripheral Pin PA9 (General)
A10	PA10	I/O	Multiplexed I/O & Peripheral Pin PA10 (General)
A11	PA11	I/O	Multiplexed I/O & Peripheral Pin PA11 (General)
A12	PA12	I/O	Multiplexed I/O & Peripheral Pin PA12 (General)
A13	PA13	I/O	Multiplexed I/O & Peripheral Pin PA13 (General)
A14	PA14	I/O	Multiplexed I/O & Peripheral Pin PA14 (General)
A15	PA15	I/O	Multiplexed I/O & Peripheral Pin PA15 (General)
A16	PA16	I/O	Multiplexed I/O & Peripheral Pin PA16 (General)
A17	PA17	I/O	Multiplexed I/O & Peripheral Pin PA17 (General)
A18	PA18	I/O	Multiplexed I/O & Peripheral Pin PA18 (General)
B1	PB1	I/O	Multiplexed I/O & Peripheral Pin PB1 (General)
B2	PB2	I/O	Multiplexed I/O & Peripheral Pin PB2 (General)
B3	PB3	I/O	Multiplexed I/O & Peripheral Pin PB3 (General)
B4	PB4	I/O	Multiplexed I/O & Peripheral Pin PB4 (General)
B5	PB5	I/O	Multiplexed I/O & Peripheral Pin PB5 (General)
B6	PB6	I/O	Multiplexed I/O & Peripheral Pin PB6 (General)
B7	PB7	I/O	Multiplexed I/O & Peripheral Pin PB7 (General)
B8	PB8	I/O	Multiplexed I/O & Peripheral Pin PB8 (General)
B9	PB9	I/O	Multiplexed I/O & Peripheral Pin PB9 (General)
B10	PB10	I/O	Multiplexed I/O & Peripheral Pin PB10 (General)
B11	PB11	I/O	Multiplexed I/O & Peripheral Pin PB11 (General)
B12	PB12	I/O	Multiplexed I/O & Peripheral Pin PB12 (General)
B13	PB13	I/O	Multiplexed I/O & Peripheral Pin PB13 (General)
B14	PB14	I/O	Multiplexed I/O & Peripheral Pin PB14 (General)
B15	PB15	I/O	Multiplexed I/O & Peripheral Pin PB15 (General)
B16	PB16	I/O	Multiplexed I/O & Peripheral Pin PB16 (General)
B17	PB17	I/O	Multiplexed I/O & Peripheral Pin PB17 (General)
B18	PB18	I/O	Multiplexed I/O & Peripheral Pin PB18 (General)
C1	PC1	I/O	Multiplexed I/O & Peripheral Pin PC1 (General)
C2	PC2	I/O	Multiplexed I/O & Peripheral Pin PC2 (General)
C17	PC17	I/O	Multiplexed I/O & Peripheral Pin PC17 (General)
C18	PC18	I/O	Multiplexed I/O & Peripheral Pin PC18 (General)
D1	PD1	I/O	Multiplexed I/O & Peripheral Pin PD1 (General)
D2	PD2	I/O	Multiplexed I/O & Peripheral Pin PD2 (General)
D4	PD4	I/O	Multiplexed I/O & Peripheral Pin PD4 (General)
D5	PD5	I/O	Multiplexed I/O & Peripheral Pin PD5 (General)
D6	PD6	I/O	Multiplexed I/O & Peripheral Pin PD6 (General)
D7	PD7	I/O	Multiplexed I/O & Peripheral Pin PD7 (General)
D8	PD8	I/O	Multiplexed I/O & Peripheral Pin PD8 (General)
D9	PD9	I/O	Multiplexed I/O & Peripheral Pin PD9 (General)
D10	PD10	I/O	Multiplexed I/O & Peripheral Pin PD10 (General)
D11	PD11	I/O	Multiplexed I/O & Peripheral Pin PD11 (General)
D12	PD12	I/O	Multiplexed I/O & Peripheral Pin PD12 (General)
D13	PD13	I/O	Multiplexed I/O & Peripheral Pin PD13 (General)
D14	PD14	I/O	Multiplexed I/O & Peripheral Pin PD14 (General)
D15	PD15	I/O	Multiplexed I/O & Peripheral Pin PD15 (General)
D17	PD17	I/O	Multiplexed I/O & Peripheral Pin PD17 (General)
D18	PD18	I/O	Multiplexed I/O & Peripheral Pin PD18 (General)
E1	PE1	I/O	Multiplexed I/O & Peripheral Pin PE1 (General)
E2	PE2	I/O	Multiplexed I/O & Peripheral Pin PE2 (General)
E4	PE4	I/O	Multiplexed I/O & Peripheral Pin PE4 (General)
E5	PE5	I/O	Multiplexed I/O & Peripheral Pin PE5 (General)
E7	PE7	I/O	Multiplexed I/O & Peripheral Pin PE7 (General)
E8	PE8	I/O	Multiplexed I/O & Peripheral Pin PE8 (General)
E9	PE9	I/O	Multiplexed I/O & Peripheral Pin PE9 (General)
E10	PE10	I/O	Multiplexed I/O & Peripheral Pin PE10 (General)
E11	PE11	I/O	Multiplexed I/O & Peripheral Pin PE11 (General)
E12	PE12	I/O	Multiplexed I/O & Peripheral Pin PE12 (General)
E14	PE14	I/O	Multiplexed I/O & Peripheral Pin PE14 (General)
E15	PE15	I/O	Multiplexed I/O & Peripheral Pin PE15 (General)
E17	PE17	I/O	Multiplexed I/O & Peripheral Pin PE17 (General)
E18	PE18	I/O	Multiplexed I/O & Peripheral Pin PE18 (General)
F1	PF1	I/O	Multiplexed I/O & Peripheral Pin PF1 (General)
F2	PF2	I/O	Multiplexed I/O & Peripheral Pin PF2 (General)
F4	PF4	I/O	Multiplexed I/O & Peripheral Pin PF4 (General)
F6	PF6	I/O	Multiplexed I/O & Peripheral Pin PF6 (General)
F8	PF8	I/O	Multiplexed I/O & Peripheral Pin PF8 (General)
F9	PF9	I/O	Multiplexed I/O & Peripheral Pin PF9 (General)
F10	PF10	I/O	Multiplexed I/O & Peripheral Pin PF10 (General)
F11	PF11	I/O	Multiplexed I/O & Peripheral Pin PF11 (General)
F13	PF13	I/O	Multiplexed I/O & Peripheral Pin PF13 (General)
F15	PF15	I/O	Multiplexed I/O & Peripheral Pin PF15 (General)
F17	PF17	I/O	Multiplexed I/O & Peripheral Pin PF17 (General)
F18	PF18	I/O	Multiplexed I/O & Peripheral Pin PF18 (General)
G1	PG1	I/O	Multiplexed I/O & Peripheral Pin PG1 (General)
G2	PG2	I/O	Multiplexed I/O & Peripheral Pin PG2 (General)
G4	PG4	I/O	Multiplexed I/O & Peripheral Pin PG4 (General)
G5	PG5	I/O	Multiplexed I/O & Peripheral Pin PG5 (General)
G7	PG7	I/O	Multiplexed I/O & Peripheral Pin PG7 (General)
G8	PG8	I/O	Multiplexed I/O & Peripheral Pin PG8 (General)
G9	PG9	I/O	Multiplexed I/O & Peripheral Pin PG9 (General)
G10	PG10	I/O	Multiplexed I/O & Peripheral Pin PG10 (General)
G11	PG11	I/O	Multiplexed I/O & Peripheral Pin PG11 (General)
G12	PG12	I/O	Multiplexed I/O & Peripheral Pin PG12 (General)
G14	PG14	I/O	Multiplexed I/O & Peripheral Pin PG14 (General)
G15	PG15	I/O	Multiplexed I/O & Peripheral Pin PG15 (General)
G17	PG17	I/O	Multiplexed I/O & Peripheral Pin PG17 (General)
G18	PG18	I/O	Multiplexed I/O & Peripheral Pin PG18 (General)
H1	PH1	I/O	Multiplexed I/O & Peripheral Pin PH1 (General)
H2	PH2	I/O	Multiplexed I/O & Peripheral Pin PH2 (General)
H4	PH4	I/O	Multiplexed I/O & Peripheral Pin PH4 (General)
H5	PH5	I/O	Multiplexed I/O & Peripheral Pin PH5 (General)
H6	PH6	I/O	Multiplexed I/O & Peripheral Pin PH6 (General)
H7	PH7	I/O	Multiplexed I/O & Peripheral Pin PH7 (General)
H8	PH8	I/O	Multiplexed I/O & Peripheral Pin PH8 (General)
H9	PH9	I/O	Multiplexed I/O & Peripheral Pin PH9 (General)
H10	PH10	I/O	Multiplexed I/O & Peripheral Pin PH10 (General)
H11	PH11	I/O	Multiplexed I/O & Peripheral Pin PH11 (General)
H12	PH12	I/O	Multiplexed I/O & Peripheral Pin PH12 (General)
H13	PH13	I/O	Multiplexed I/O & Peripheral Pin PH13 (General)
H14	PH14	I/O	Multiplexed I/O & Peripheral Pin PH14 (General)
H15	PH15	I/O	Multiplexed I/O & Peripheral Pin PH15 (General)
H17	PH17	I/O	Multiplexed I/O & Peripheral Pin PH17 (General)
H18	PH18	I/O	Multiplexed I/O & Peripheral Pin PH18 (General)
J1	PJ1	I/O	Multiplexed I/O & Peripheral Pin PJ1 (General)
J2	PJ2	I/O	Multiplexed I/O & Peripheral Pin PJ2 (General)
J4	PJ4	I/O	Multiplexed I/O & Peripheral Pin PJ4 (General)
J5	PJ5	I/O	Multiplexed I/O & Peripheral Pin PJ5 (General)
J6	PJ6	I/O	Multiplexed I/O & Peripheral Pin PJ6 (General)
J7	PJ7	I/O	Multiplexed I/O & Peripheral Pin PJ7 (General)
J8	PJ8	I/O	Multiplexed I/O & Peripheral Pin PJ8 (General)
J9	PJ9	I/O	Multiplexed I/O & Peripheral Pin PJ9 (General)
J10	PJ10	I/O	Multiplexed I/O & Peripheral Pin PJ10 (General)
J11	PJ11	I/O	Multiplexed I/O & Peripheral Pin PJ11 (General)
J12	PJ12	I/O	Multiplexed I/O & Peripheral Pin PJ12 (General)
J13	PJ13	I/O	Multiplexed I/O & Peripheral Pin PJ13 (General)
J14	PJ14	I/O	Multiplexed I/O & Peripheral Pin PJ14 (General)
J15	PJ15	I/O	Multiplexed I/O & Peripheral Pin PJ15 (General)
J17	PJ17	I/O	Multiplexed I/O & Peripheral Pin PJ17 (General)
J18	PJ18	I/O	Multiplexed I/O & Peripheral Pin PJ18 (General)
K1	PK1	I/O	Multiplexed I/O & Peripheral Pin PK1 (General)
K2	PK2	I/O	Multiplexed I/O & Peripheral Pin PK2 (General)
K4	PK4	I/O	Multiplexed I/O & Peripheral Pin PK4 (General)
K5	PK5	I/O	Multiplexed I/O & Peripheral Pin PK5 (General)
K6	PK6	I/O	Multiplexed I/O & Peripheral Pin PK6 (General)
K7	PK7	I/O	Multiplexed I/O & Peripheral Pin PK7 (General)
K8	PK8	I/O	Multiplexed I/O & Peripheral Pin PK8 (General)
K9	PK9	I/O	Multiplexed I/O & Peripheral Pin PK9 (General)
K10	PK10	I/O	Multiplexed I/O & Peripheral Pin PK10 (General)
K11	PK11	I/O	Multiplexed I/O & Peripheral Pin PK11 (General)
K12	PK12	I/O	Multiplexed I/O & Peripheral Pin PK12 (General)
K13	PK13	I/O	Multiplexed I/O & Peripheral Pin PK13 (General)
K14	PK14	I/O	Multiplexed I/O & Peripheral Pin PK14 (General)
K15	PK15	I/O	Multiplexed I/O & Peripheral Pin PK15 (General)
K17	PK17	I/O	Multiplexed I/O & Peripheral Pin PK17 (General)
K18	PK18	I/O	Multiplexed I/O & Peripheral Pin PK18 (General)
L1	PL1	I/O	Multiplexed I/O & Peripheral Pin PL1 (General)
L2	PL2	I/O	Multiplexed I/O & Peripheral Pin PL2 (General)
L4	PL4	I/O	Multiplexed I/O & Peripheral Pin PL4 (General)
L5	PL5	I/O	Multiplexed I/O & Peripheral Pin PL5 (General)
L6	PL6	I/O	Multiplexed I/O & Peripheral Pin PL6 (General)
L7	PL7	I/O	Multiplexed I/O & Peripheral Pin PL7 (General)
L8	PL8	I/O	Multiplexed I/O & Peripheral Pin PL8 (General)
L9	PL9	I/O	Multiplexed I/O & Peripheral Pin PL9 (General)
L10	PL10	I/O	Multiplexed I/O & Peripheral Pin PL10 (General)
L11	PL11	I/O	Multiplexed I/O & Peripheral Pin PL11 (General)
L12	PL12	I/O	Multiplexed I/O & Peripheral Pin PL12 (General)
L13	PL13	I/O	Multiplexed I/O & Peripheral Pin PL13 (General)
L14	PL14	I/O	Multiplexed I/O & Peripheral Pin PL14 (General)
L15	PL15	I/O	Multiplexed I/O & Peripheral Pin PL15 (General)
L17	PL17	I/O	Multiplexed I/O & Peripheral Pin PL17 (General)
L18	PL18	I/O	Multiplexed I/O & Peripheral Pin PL18 (General)
M1	PM1	I/O	Multiplexed I/O & Peripheral Pin PM1 (General)
M2	PM2	I/O	Multiplexed I/O & Peripheral Pin PM2 (General)
M4	PM4	I/O	Multiplexed I/O & Peripheral Pin PM4 (General)
M5	PM5	I/O	Multiplexed I/O & Peripheral Pin PM5 (General)
M7	PM7	I/O	Multiplexed I/O & Peripheral Pin PM7 (General)
M8	PM8	I/O	Multiplexed I/O & Peripheral Pin PM8 (General)
M9	PM9	I/O	Multiplexed I/O & Peripheral Pin PM9 (General)
M10	PM10	I/O	Multiplexed I/O & Peripheral Pin PM10 (General)
M11	PM11	I/O	Multiplexed I/O & Peripheral Pin PM11 (General)
M12	PM12	I/O	Multiplexed I/O & Peripheral Pin PM12 (General)
M14	PM14	I/O	Multiplexed I/O & Peripheral Pin PM14 (General)
M15	PM15	I/O	Multiplexed I/O & Peripheral Pin PM15 (General)
M17	PM17	I/O	Multiplexed I/O & Peripheral Pin PM17 (General)
M18	PM18	I/O	Multiplexed I/O & Peripheral Pin PM18 (General)
N1	PN1	I/O	Multiplexed I/O & Peripheral Pin PN1 (General)
N2	PN2	I/O	Multiplexed I/O & Peripheral Pin PN2 (General)
N4	PN4	I/O	Multiplexed I/O & Peripheral Pin PN4 (General)
N6	PN6	I/O	Multiplexed I/O & Peripheral Pin PN6 (General)
N8	PN8	I/O	Multiplexed I/O & Peripheral Pin PN8 (General)
N9	PN9	I/O	Multiplexed I/O & Peripheral Pin PN9 (General)
N10	PN10	I/O	Multiplexed I/O & Peripheral Pin PN10 (General)
N11	PN11	I/O	Multiplexed I/O & Peripheral Pin PN11 (General)
N13	PN13	I/O	Multiplexed I/O & Peripheral Pin PN13 (General)
N15	PN15	I/O	Multiplexed I/O & Peripheral Pin PN15 (General)
N17	PN17	I/O	Multiplexed I/O & Peripheral Pin PN17 (General)
N18	PN18	I/O	Multiplexed I/O & Peripheral Pin PN18 (General)
P1	PP1	I/O	Multiplexed I/O & Peripheral Pin PP1 (General)
P2	PP2	I/O	Multiplexed I/O & Peripheral Pin PP2 (General)
P4	PP4	I/O	Multiplexed I/O & Peripheral Pin PP4 (General)
P5	PP5	I/O	Multiplexed I/O & Peripheral Pin PP5 (General)
P7	PP7	I/O	Multiplexed I/O & Peripheral Pin PP7 (General)
P8	PP8	I/O	Multiplexed I/O & Peripheral Pin PP8 (General)
P9	PP9	I/O	Multiplexed I/O & Peripheral Pin PP9 (General)
P10	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
P11	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
P12	PP12	I/O	Multiplexed I/O & Peripheral Pin PP12 (General)
P14	PP14	I/O	Multiplexed I/O & Peripheral Pin PP14 (General)
P15	PP15	I/O	Multiplexed I/O & Peripheral Pin PP15 (General)
P17	PP17	I/O	Multiplexed I/O & Peripheral Pin PP17 (General)
P18	PP18	I/O	Multiplexed I/O & Peripheral Pin PP18 (General)
R1	PR1	I/O	Multiplexed I/O & Peripheral Pin PR1 (General)
R2	PR2	I/O	Multiplexed I/O & Peripheral Pin PR2 (General)
R4	PR4	I/O	Multiplexed I/O & Peripheral Pin PR4 (General)
R5	PR5	I/O	Multiplexed I/O & Peripheral Pin PR5 (General)
R6	PR6	I/O	Multiplexed I/O & Peripheral Pin PR6 (General)
R7	PR7	I/O	Multiplexed I/O & Peripheral Pin PR7 (General)
R8	PR8	I/O	Multiplexed I/O & Peripheral Pin PR8 (General)
R9	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
R10	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
R11	PR11	I/O	Multiplexed I/O & Peripheral Pin PR11 (General)
R12	PR12	I/O	Multiplexed I/O & Peripheral Pin PR12 (General)
R13	PR13	I/O	Multiplexed I/O & Peripheral Pin PR13 (General)
R14	PR14	I/O	Multiplexed I/O & Peripheral Pin PR14 (General)
R15	PR15	I/O	Multiplexed I/O & Peripheral Pin PR15 (General)
R17	PR17	I/O	Multiplexed I/O & Peripheral Pin PR17 (General)
R18	PR18	I/O	Multiplexed I/O & Peripheral Pin PR18 (General)
T1	PT1	I/O	Multiplexed I/O & Peripheral Pin PT1 (General)
T2	PT2	I/O	Multiplexed I/O & Peripheral Pin PT2 (General)
T17	PT17	I/O	Multiplexed I/O & Peripheral Pin PT17 (General)
T18	PT18	I/O	Multiplexed I/O & Peripheral Pin PT18 (General)
U1	PU1	I/O	Multiplexed I/O & Peripheral Pin PU1 (General)
U2	PU2	I/O	Multiplexed I/O & Peripheral Pin PU2 (General)
U3	PU3	I/O	Multiplexed I/O & Peripheral Pin PU3 (General)
U4	PU4	I/O	Multiplexed I/O & Peripheral Pin PU4 (General)
U5	PU5	I/O	Multiplexed I/O & Peripheral Pin PU5 (General)
U6	PU6	I/O	Multiplexed I/O & Peripheral Pin PU6 (General)
U7	PU7	I/O	Multiplexed I/O & Peripheral Pin PU7 (General)
U8	PU8	I/O	Multiplexed I/O & Peripheral Pin PU8 (General)
U9	PU9	I/O	Multiplexed I/O & Peripheral Pin PU9 (General)
U10	PU10	I/O	Multiplexed I/O & Peripheral Pin PU10 (General)
U11	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
U12	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
U13	PU13	I/O	Multiplexed I/O & Peripheral Pin PU13 (General)
U14	PU14	I/O	Multiplexed I/O & Peripheral Pin PU14 (General)
U15	PU15	I/O	Multiplexed I/O & Peripheral Pin PU15 (General)
U16	PU16	I/O	Multiplexed I/O & Peripheral Pin PU16 (General)
U17	PU17	I/O	Multiplexed I/O & Peripheral Pin PU17 (General)
U18	PU18	I/O	Multiplexed I/O & Peripheral Pin PU18 (General)
V1	PV1	I/O	Multiplexed I/O & Peripheral Pin PV1 (General)
V2	PV2	I/O	Multiplexed I/O & Peripheral Pin PV2 (General)
V3	PV3	I/O	Multiplexed I/O & Peripheral Pin PV3 (General)
V4	PV4	I/O	Multiplexed I/O & Peripheral Pin PV4 (General)
V5	PV5	I/O	Multiplexed I/O & Peripheral Pin PV5 (General)
V6	PV6	I/O	Multiplexed I/O & Peripheral Pin PV6 (General)
V7	PV7	I/O	Multiplexed I/O & Peripheral Pin PV7 (General)
V8	PV8	I/O	Multiplexed I/O & Peripheral Pin PV8 (General)
V9	PV9	I/O	Multiplexed I/O & Peripheral Pin PV9 (General)
V10	PV10	I/O	Multiplexed I/O & Peripheral Pin PV10 (General)
V11	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
V12	VDDSDMMC	Power	Power Supply Input (VDDSDMMC — 3.3V / 5.0V Standard Logic)
V13	PV13	I/O	Multiplexed I/O & Peripheral Pin PV13 (General)
V14	PV14	I/O	Multiplexed I/O & Peripheral Pin PV14 (General)
V15	PV15	I/O	Multiplexed I/O & Peripheral Pin PV15 (General)
V16	PV16	I/O	Multiplexed I/O & Peripheral Pin PV16 (General)
V17	PV17	I/O	Multiplexed I/O & Peripheral Pin PV17 (General)
V18	PV18	I/O	Multiplexed I/O & Peripheral Pin PV18 (General)

PIN A1 PA1

I/O

Multiplexed I/O & Peripheral Pin PA1 (General)

Design note: Signal terminal PA1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

ATSAMA5D24C-CU (TFBGA-256) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

ATSAMA5D24C-CU (TFBGA-256) - 2. Standard Pinout (Top View)

True package pinout (256 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

ATSAMA5D24C-CU (TFBGA-256) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

ATSAMA5D24C-CU (TFBGA-256) - 4. Package Dimensions (D×E×A)

TFBGA-256 · 8.00×8.00mm · Pitch 0.40mmExpand ›

5. Recommended Land PatternLAND PATTERN

ATSAMA5D24C-CU (TFBGA-256) - 5. Recommended Land Pattern

IPC-7351B Footprint (256 Pads)Expand ›

6. Application SchematicSCHEMATIC

ATSAMA5D24C-CU (TFBGA-256) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)

Showing 1–8 of 8 uncropped original figures for ATSAMA5D24C

P1 · p01_fig01456×280px

Ultra-Low-Power Arm® Cortex®-A5 Core-Based MPU, 500 MHz, Graphics Interface, Ethernet 10/100, CAN, USB, PCI 5.0 Pre-Certified

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Figure 40-2. Board Schematic

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Figure 41-2. Board Schematic to Interface UHP High-speed Host Controller

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Figure 42-13. Use Case 1: Stereo Class D Amplifier With External Differential Power Stage

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Complete Datasheet DS60001476H-page 2674

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ATSAMA5D24C-CU (TFBGA-256) — Table 67-2. Device and 289-ball LFBGA Package Weight | 445 mg | Table 67-3. Package Reference | JEDEC Drawing Reference NA | J-STD-609 Classification e8 | Table 67-4. 289-ball LFBGA Package Information | Ball Land 0.450 mm ±0.05 | Nominal B

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Notes:

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Contact Pitch

Technical Specifications & Part Details (ATSAMA5D24C-CU)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:ATSAMA5D24C-CU (TFBGA-256) is a 256-pin standard electronic & interconnect component featuring a 8.00 × 8.00 × 1.12 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C to 105°C with integrated USB, UART, SPI, I2C, CAN, ADC, PWM, JTAG / SWD interfaces.

Operating Supply VoltageV_CC / V_DD

1.8V ~ 5.5V (Theo Datasheet)

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to 105°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

500 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

8.00 × 8.00 × 1.12 mm (A1=0.25 mm)

Package family: BGA (TFBGA-256)

Pin Count & Lead PitchN / e

256 Pins | Pitch e = 0.40 mm (15.7 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

USB, UART, SPI, I2C, CAN, ADC, PWM, JTAG / SWD

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol256 auto-grouped pins

IPC-7351B Land Pattern256 pads · Pitch 0.40mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TFBGA-256)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

8.00 × 8.00 mm

Height (A) & Pitch (e)IPC-7351B

A=1.12mm · e=0.40mm

Pad Size (W × L)Level B

0.20 × 0.20 mm

Pins / Total PadsTopology

256P / 256Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit TFBGA-256	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ATSAMA5D24C-CU (TFBGA-256)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ATSAMA5D24C-CU (TFBGA-256)?

Manufactured by MICROCHIP, the ATSAMA5D24C-CU is housed in a TFBGA-256 package with 256 pins and a 0.40 mm lead pitch. Key pins include: A1 (PA1: Multiplexed I/O & Peripheral Pin PA1 (General)), A2 (PA2: Multiplexed I/O & Peripheral Pin PA2 (General)), A3 (PA3: Multiplexed I/O & Peripheral Pin PA3 (General)), A4 (PA4: Multiplexed I/O & Peripheral Pin PA4 (General)), A5 (PA5: Multiplexed I/O & Peripheral Pin PA5 (General)), A6 (PA6: Multiplexed I/O & Peripheral Pin PA6 (General)).

What are the IPC-7351B PCB Footprint dimensions for ATSAMA5D24C-CU?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATSAMA5D24C-CU (TFBGA-256) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.40 mm, and 256 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATSAMA5D24C-CU?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATSAMA5D24C-CU (MICROCHIP, TFBGA-256) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (256 pins) & ATSAMA5D24C Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
A1	PA1	Digital_IO	Signal terminal PA1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
A2	PA2	Digital_IO	Signal terminal PA2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
A3	PA3	Digital_IO	Signal terminal PA3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
A4	PA4	Digital_IO	Signal terminal PA4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
A5	PA5	Digital_IO	Signal terminal PA5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
A6	PA6	Digital_IO	Signal terminal PA6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
A7	PA7	Digital_IO	Signal terminal PA7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
A8	PA8	Digital_IO	Signal terminal PA8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
A9	PA9	Digital_IO	Signal terminal PA9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
A10	PA10	Digital_IO	Signal terminal PA10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
A11	PA11	Digital_IO	Signal terminal PA11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
A12	PA12	Digital_IO	Signal terminal PA12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
A13	PA13	Digital_IO	Signal terminal PA13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
A14	PA14	Digital_IO	Signal terminal PA14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
A15	PA15	Digital_IO	Signal terminal PA15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
A16	PA16	Digital_IO	Signal terminal PA16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA16. Supported peripheral buses: General.
A17	PA17	Digital_IO	Signal terminal PA17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA17. Supported peripheral buses: General.
A18	PA18	Digital_IO	Signal terminal PA18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA18. Supported peripheral buses: General.
B1	PB1	Digital_IO	Signal terminal PB1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
B2	PB2	Digital_IO	Signal terminal PB2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
B3	PB3	Digital_IO	Signal terminal PB3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
B4	PB4	Digital_IO	Signal terminal PB4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B5	PB5	Digital_IO	Signal terminal PB5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
B6	PB6	Digital_IO	Signal terminal PB6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
B7	PB7	Digital_IO	Signal terminal PB7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
B8	PB8	Digital_IO	Signal terminal PB8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B9	PB9	Digital_IO	Signal terminal PB9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
B10	PB10	Digital_IO	Signal terminal PB10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
B11	PB11	Digital_IO	Signal terminal PB11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
B12	PB12	Digital_IO	Signal terminal PB12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
B13	PB13	Digital_IO	Signal terminal PB13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
B14	PB14	Digital_IO	Signal terminal PB14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
B15	PB15	Digital_IO	Signal terminal PB15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
B16	PB16	Digital_IO	Signal terminal PB16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB16. Supported peripheral buses: General.
B17	PB17	Digital_IO	Signal terminal PB17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB17. Supported peripheral buses: General.
B18	PB18	Digital_IO	Signal terminal PB18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB18. Supported peripheral buses: General.
C1	PC1	Digital_IO	Signal terminal PC1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
C2	PC2	Digital_IO	Signal terminal PC2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
C17	PC17	Digital_IO	Signal terminal PC17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC17. Supported peripheral buses: General.
C18	PC18	Digital_IO	Signal terminal PC18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC18. Supported peripheral buses: General.
D1	PD1	Digital_IO	Signal terminal PD1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
D2	PD2	Digital_IO	Signal terminal PD2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
D4	PD4	Digital_IO	Signal terminal PD4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
D5	PD5	Digital_IO	Signal terminal PD5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
D6	PD6	Digital_IO	Signal terminal PD6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
D7	PD7	Digital_IO	Signal terminal PD7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
D8	PD8	Digital_IO	Signal terminal PD8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD8. Supported peripheral buses: General.
D9	PD9	Digital_IO	Signal terminal PD9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD9. Supported peripheral buses: General.
D10	PD10	Digital_IO	Signal terminal PD10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD10. Supported peripheral buses: General.
D11	PD11	Digital_IO	Signal terminal PD11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD11. Supported peripheral buses: General.
D12	PD12	Digital_IO	Signal terminal PD12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD12. Supported peripheral buses: General.
D13	PD13	Digital_IO	Signal terminal PD13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD13. Supported peripheral buses: General.
D14	PD14	Digital_IO	Signal terminal PD14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD14. Supported peripheral buses: General.
D15	PD15	Digital_IO	Signal terminal PD15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD15. Supported peripheral buses: General.
D17	PD17	Digital_IO	Signal terminal PD17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD17. Supported peripheral buses: General.
D18	PD18	Digital_IO	Signal terminal PD18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD18. Supported peripheral buses: General.
E1	PE1	Digital_IO	Signal terminal PE1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
E2	PE2	Digital_IO	Signal terminal PE2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
E4	PE4	Digital_IO	Signal terminal PE4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
E5	PE5	Digital_IO	Signal terminal PE5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
E7	PE7	Digital_IO	Signal terminal PE7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
E8	PE8	Digital_IO	Signal terminal PE8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
E9	PE9	Digital_IO	Signal terminal PE9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General.
E10	PE10	Digital_IO	Signal terminal PE10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.

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