AT93C86A-10SU-2.7 (SOIC-8) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of AT93C86A-10SU-2.7 (SOIC-8)?

Manufactured by MICROCHIP, the AT93C86A-10SU-2.7 is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 1.8V to 5.5V. Key pins include: 1 (CS: Multiplexed I/O & Peripheral Pin CS (General)), 2 (SK: Multiplexed I/O & Peripheral Pin SK (General)), 3 (DI: Multiplexed I/O & Peripheral Pin DI (General)), 4 (DO: Multiplexed I/O & Peripheral Pin DO (General)), 5 (GND: Ground Reference Pin (GND)), 6 (ORG: Multiplexed I/O & Peripheral Pin ORG (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for AT93C86A-10SU-2.7?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AT93C86A-10SU-2.7 (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for AT93C86A-10SU-2.7?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AT93C86A-10SU-2.7 (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 3.90mm × 4.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (8/8)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	CS	I/O	Multiplexed I/O & Peripheral Pin CS (General)
2	SK	I/O	Multiplexed I/O & Peripheral Pin SK (General)
3	DI	I/O	Multiplexed I/O & Peripheral Pin DI (General)
4	DO	I/O	Multiplexed I/O & Peripheral Pin DO (General)
5	GND	GND	Ground Reference Pin (GND)
6	ORG	I/O	Multiplexed I/O & Peripheral Pin ORG (General)
7	NC	I/O	Multiplexed I/O & Peripheral Pin NC (General)
8	VCC	Power	Power Supply Input (VCC — 1.8V to 5.5V)

PIN 1 CS

I/O

Multiplexed I/O & Peripheral Pin CS (General)

Design note: ChipSelect

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 7 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

AT93C86A-10SU-2.7 (SOIC-8) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

AT93C86A-10SU-2.7 (SOIC-8) - 2. Standard Pinout (Top View)

True package pinout (8 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

AT93C86A-10SU-2.7 (SOIC-8) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

AT93C86A-10SU-2.7 (SOIC-8) - 4. Package Dimensions (D×E×A)

SOIC-8 · 3.90×4.90mm · Pitch 1.27mmExpand ›

5. Recommended Land PatternLAND PATTERN

AT93C86A-10SU-2.7 (SOIC-8) - 5. Recommended Land Pattern

IPC-7351B Footprint (8 Pads)Expand ›

6. Application SchematicSCHEMATIC

AT93C86A-10SU-2.7 (SOIC-8) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (7 figures · Page 1/1)

Showing 1–7 of 7 uncropped original figures for AT93C86A

P1 · p01_fig01456×280px

Three-Wire Serial EEPROM 16-Kbit (2,048 x 8 or 1,024 x 16)

P17 · p17_fig011910×2122px

6. Packaging Information

P17 · p17_fig01P17

Datasheet Page 17 (p17_fig01)

P19 · p19_fig011293×1480px

protrusions shall not exceed 0.15mm per side. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or

P20 · p20_fig01984×903px

RECOMMENDED LAND PATTERN

P25 · p25_fig011056×1134px

MILLIMETERS

P25 · p25_fig01P25

Datasheet Page 25 (p25_fig01)

Technical Specifications & Part Details (AT93C86A-10SU-2.7)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:AT93C86A-10SU-2.7 (SOIC-8) is a 8-pin standard electronic & interconnect component featuring a 4.90 × 3.90 × 1.75 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 1.8V to 5.5V supply operation across -40°C to +85°C with integrated Standard I/O / Passive interfaces.

Operating Supply VoltageV_CC / V_DD

1.8V to 5.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to +85°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

2 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

4.90 × 3.90 × 1.75 mm (A1=0.15 mm)

Package family: SOIC (SOIC-8)

Pin Count & Lead PitchN / e

8 Pins | Pitch e = 1.27 mm (50.0 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

Standard I/O / Passive

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol8 auto-grouped pins

IPC-7351B Land Pattern8 pads · Pitch 1.27mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOIC-8)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

4.90 × 3.90 mm

Height (A) & Pitch (e)IPC-7351B

A=1.75mm · e=1.27mm

Pad Size (W × L)Level B

0.60 × 1.55 mm

Pins / Total PadsTopology

8P / 8Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit SOIC-8	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — AT93C86A-10SU-2.7 (SOIC-8)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of AT93C86A-10SU-2.7 (SOIC-8)?

Manufactured by MICROCHIP, the AT93C86A-10SU-2.7 is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 1.8V to 5.5V. Key pins include: 1 (CS: Multiplexed I/O & Peripheral Pin CS (General)), 2 (SK: Multiplexed I/O & Peripheral Pin SK (General)), 3 (DI: Multiplexed I/O & Peripheral Pin DI (General)), 4 (DO: Multiplexed I/O & Peripheral Pin DO (General)), 5 (GND: Ground Reference Pin (GND)), 6 (ORG: Multiplexed I/O & Peripheral Pin ORG (General)).

What are the IPC-7351B PCB Footprint dimensions for AT93C86A-10SU-2.7?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AT93C86A-10SU-2.7 (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for AT93C86A-10SU-2.7?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AT93C86A-10SU-2.7 (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (8 pins) & AT93C86A Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	CS	Digital_IO	Signal terminal CS (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: CS. Supported peripheral buses: General.
2	SK	Digital_IO	Signal terminal SK (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: SK. Supported peripheral buses: General.
3	DI	Digital_IO	Signal terminal DI (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: DI. Supported peripheral buses: General.
4	DO	Digital_IO	Signal terminal DO (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: DO. Supported peripheral buses: General.
5	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
6	ORG	Digital_IO	Signal terminal ORG (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: ORG. Supported peripheral buses: General.
7	NC	NC	Signal terminal NC (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
8	VCC	Power_In	Primary positive power supply input (VCC) operating in the 1.8V to 5.5V domain (Max rating: 5.5V).

4D Studio: AT93C86A-10SU-2.7 Permalink: /part/C1349835 MICROCHIP SOIC-8 All Packages All Manufacturers