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STM32F446ZEJ6 (UFBGA-144) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F446ZEJ6

STUFBGA-144 · 144 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F446ZEJ6 (UFBGA-144)A1PC13A2PE3A3PE2A4PE1A5PE0A6PB4(NJTRST)A7PB3(JTDO/TRAA8PD6A9PD7A10PA15(JTDI)A11PA14(JTCKSWCA12PA13(JTMS SWB1PC14 - OSC32B2PE4B3PE5B4PE6B5PB9B6PB5B7PG15B8PG12B9PD5B10PC11B11PC10B12PA12C1IOC1C2VBATC3PF0C4PF1C5PB8C6PB6C7PG14C8PG11C9PD4C10PC12C11VDDUSBC12PA11D1PH0OSC IN(PHD2VSSD3VDDD4PF2D5BOOT0D6PB7D7PG13D8PG10D9PD3D10PD1D11PA10D12PA9E1PH1 - OSC OUE2PF3E3PF4E4PF5E5PDR_ONE6VSSE7VSSE8PG9E9PD2E10PD0E11PC9E12PA8F1NRSTF2PF7F3PF6F4VDDF5VDDF6VDDF7VDDF8VDDF9VDDF10VDDF11PC8F12PC7M12PB13M11PB12M10PB11M9PB10M8PE15M7PE7M6PF14M5PF11M4PB1M3PA7M2PA3M1VDDAL12PB15L11PB14L10PD12L9PD8L8PE14L7PE8L6PF15L5PF12L4PB0L3PA6L2PA2L1VREF+K12PD15K11PD14K10PD13K9PD9K8PE13K7PE9K6PG0K5PF13K4PC5K3PA5K2PA1K1VREF -J12PG2J11PG3J10PG4J9PD10J8PE12J7PE10J6PG1J5PB2BOOT1 - (J4PC4J3PA4J2PA0 WKUP(PA0J1VSSAH12PG5H11PG6H10PG7H9PD11H8PE11H7VCAP_1H6VSSH5BYPASS_REGH4PC3H3PC2H2PC1H1PC0G12PC6G11PG8G10VSSG9VCAP_2G8VSSG7VDDG6VDDG5VDDG4VSSG3PF8G2PF9G1PF10Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.896.591.486.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4-91.4-96.5mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1A2B2C2D2E2F2G2H2J2K2L2M2A3B3C3D3E3F3G3H3J3K3L3M3A4B4C4D4E4F4G4H4J4K4L4M4A5B5C5D5E5F5G5H5J5K5L5M5A6B6C6D6E6F6G6H6J6K6L6M6A7B7C7D7E7F7G7H7J7K7L7M7A8B8C8D8E8F8G8H8J8K8L8M8A9B9C9D9E9F9G9H9J9K9L9M9A10B10C10D10E10F10G10H10J10K10L10M10A11B11C11D11E11F11G11H11J11K11L11M11A12B12C12D12E12F12G12H12J12K12L12M12E=10.00mm · Pitch e=0.80mmD=10.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (144/144)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
A2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
A3PE2I/OMultiplexed I/O & Peripheral Pin PE2 (SPI)
A4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
A5PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
A6PB4(NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTRST) (SPI, I2C, SWD/JTAG)
A7PB3(JTDO/TRACES WO)I/OMultiplexed I/O & Peripheral Pin PB3(JTDO/TRACES WO) (SPI, PWM, SWD/JTAG)
A8PD6I/OMultiplexed I/O & Peripheral Pin PD6 (SPI)
A9PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART)
A10PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (UART, SPI, SWD/JTAG)
A11PA14(JTCKSWCLK) -I/OMultiplexed I/O & Peripheral Pin PA14(JTCKSWCLK) - (SWD/JTAG)
A12PA13(JTMS SWDIO) -I/OMultiplexed I/O & Peripheral Pin PA13(JTMS SWDIO) - (SWD/JTAG)
B1PC14 - OSC32 IN(PC14)_I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32 IN(PC14)_ (RTC/CLK)
B2PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI)
B3PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
B4PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI)
B5PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, PWM)
B6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, PWM, CAN)
B7PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART)
B8PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI)
B9PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
B10PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
B11PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
B12PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
C1IOC1I/OGeneral Purpose Digital I/O Pin IOC1
C2VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C3PF0I/OMultiplexed I/O & Peripheral Pin PF0 (I2C)
C4PF1I/OMultiplexed I/O & Peripheral Pin PF1 (I2C)
C5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (I2C, PWM)
C6PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C, PWM, CAN)
C7PG14I/OMultiplexed I/O & Peripheral Pin PG14 (UART, SPI)
C8PG11I/OMultiplexed I/O & Peripheral Pin PG11 (SPI)
C9PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART)
C10PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI, I2C)
C11VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
C12PA11I/OMultiplexed I/O & Peripheral Pin PA11 (PWM, CAN)
D1PH0OSC IN(PH0) -_I/OMultiplexed I/O & Peripheral Pin PH0OSC IN(PH0) -_ (RTC/CLK)
D2VSSGNDGround Reference Pin (VSS)
D3VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D4PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
D5BOOT0IInput-Only Pin BOOT0 (General)
D6PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, PWM)
D7PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, SPI)
D8PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
D9PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
D10PD1I/OMultiplexed I/O & Peripheral Pin PD1 (SPI, CAN)
D11PA10I/OMultiplexed I/O & Peripheral Pin PA10 (PWM)
D12PA9I/OMultiplexed I/O & Peripheral Pin PA9 (SPI, PWM)
E1PH1 - OSC OUT(PH1)_I/OMultiplexed I/O & Peripheral Pin PH1 - OSC OUT(PH1)_ (RTC/CLK)
E2PF3I/OMultiplexed I/O & Peripheral Pin PF3 (ADC)
E3PF4I/OMultiplexed I/O & Peripheral Pin PF4 (ADC)
E4PF5I/OMultiplexed I/O & Peripheral Pin PF5 (ADC)
E5PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
E6VSSGNDGround Reference Pin (VSS)
E7VSSGNDGround Reference Pin (VSS)
E8PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART)
E9PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
E10PD0I/OMultiplexed I/O & Peripheral Pin PD0 (SPI, CAN)
E11PC9I/OMultiplexed I/O & Peripheral Pin PC9 (PWM, RTC/CLK)
E12PA8I/OMultiplexed I/O & Peripheral Pin PA8 (I2C, RTC/CLK)
F1NRSTISystem Enable & Hardware Reset (NRST)
F2PF7I/OMultiplexed I/O & Peripheral Pin PF7 (ADC)
F3PF6I/OMultiplexed I/O & Peripheral Pin PF6 (ADC)
F4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F11PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, PWM)
F12PC7I/OMultiplexed I/O & Peripheral Pin PC7 (UART, SPI, I2C, PWM)
G1PF10I/OMultiplexed I/O & Peripheral Pin PF10 (ADC)
G2PF9I/OMultiplexed I/O & Peripheral Pin PF9 (ADC)
G3PF8I/OMultiplexed I/O & Peripheral Pin PF8 (SPI, ADC)
G4VSSGNDGround Reference Pin (VSS)
G5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G8VSSGNDGround Reference Pin (VSS)
G9VCAP_2I/OMultiplexed I/O & Peripheral Pin VCAP_2 (General)
G10VSSGNDGround Reference Pin (VSS)
G11PG8I/OMultiplexed I/O & Peripheral Pin PG8 (UART)
G12PC6I/OMultiplexed I/O & Peripheral Pin PC6 (I2C, PWM)
H1PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
H2PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC)
H3PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
H4PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
H5BYPASS_REGI/OMultiplexed I/O & Peripheral Pin BYPASS_REG (General)
H6VSSGNDGround Reference Pin (VSS)
H7VCAP_1I/OMultiplexed I/O & Peripheral Pin VCAP_1 (General)
H8PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
H9PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C)
H10PG7I/OMultiplexed I/O & Peripheral Pin PG7 (UART)
H11PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
H12PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
J1VSSAGNDGround Reference Pin (VSSA)
J2PA0 WKUP(PA0) -I/OMultiplexed I/O & Peripheral Pin PA0 WKUP(PA0) - (UART, ADC, PWM)
J3PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
J4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (ADC)
J5PB2BOOT1 - (PB2)I/OMultiplexed I/O & Peripheral Pin PB2BOOT1 - (PB2) (SPI)
J6PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
J7PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
J8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
J9PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART)
J10PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
J11PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
J12PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
K1VREF -AnalogMultiplexed I/O & Peripheral Pin VREF - (General)
K2PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
K3PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
K4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
K5PF13I/OMultiplexed I/O & Peripheral Pin PF13 (I2C)
K6PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
K7PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
K8PE13I/OMultiplexed I/O & Peripheral Pin PE13 (PWM)
K9PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
K10PD13I/OMultiplexed I/O & Peripheral Pin PD13 (SPI, I2C, PWM)
K11PD14I/OMultiplexed I/O & Peripheral Pin PD14 (SPI, I2C, PWM)
K12PD15I/OMultiplexed I/O & Peripheral Pin PD15 (I2C, PWM)
L1VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
L2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (SPI, ADC, PWM)
L3PA6I/OMultiplexed I/O & Peripheral Pin PA6 (ADC)
L4PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC, PWM)
L5PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
L6PF15I/OMultiplexed I/O & Peripheral Pin PF15 (I2C)
L7PE8I/OMultiplexed I/O & Peripheral Pin PE8 (PWM)
L8PE14I/OMultiplexed I/O & Peripheral Pin PE14 (PWM)
L9PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
L10PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C, PWM)
L11PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
L12PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, PWM, RTC/CLK)
M1VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
M2PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
M3PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
M4PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
M5PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
M6PF14I/OMultiplexed I/O & Peripheral Pin PF14 (I2C)
M7PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
M8PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
M9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM)
M10PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, PWM)
M11PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI)
M12PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
PIN A1 PC13
I/O
Multiplexed I/O & Peripheral Pin PC13 (General)
Design note: Alt: EVENTOUT | Add: TAMP 1/WKUP1_
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 30 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F446ZEJ6 (ST · UFBGA-144)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F446ZEJ6 (UFBGA-144) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F446ZEJ6 (UFBGA-144) - 2. Standard Pinout (Top View)
True package pinout (144 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F446ZEJ6 (UFBGA-144) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F446ZEJ6 (UFBGA-144) - 4. Package Dimensions (D×E×A)
UFBGA-144 · 10.00×10.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F446ZEJ6 (UFBGA-144) - 5. Recommended Land Pattern
IPC-7351B Footprint (144 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F446ZEJ6 (UFBGA-144) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (30 figures · Page 1/3)
Showing 1–12 of 30 uncropped original figures for STM32F446
P1 · p01_fig02EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — January 2021 DS10693 Rev 10 1/198
January 2021 DS10693 Rev 10 1/198
P43 · p43_fig01EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 14. STM32F446xC/xE UFBGA144 ballout
Figure 14. STM32F446xC/xE UFBGA144 ballout
P143 · p143_fig02EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 47. Power supply and reference decoupling (VREF+ not connected to VDDA)
Figure 47. Power supply and reference decoupling (VREF+ not connected to VDDA)
P182 · p182_fig01EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 76. UFBGA144 outline
Figure 76. UFBGA144 outline
P183 · p183_fig01EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 77. UFBGA144 recommended footprint
Figure 77. UFBGA144 recommended footprint
P183 · p183_fig02EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 77. UFBGA144 recommended footprint
Figure 77. UFBGA144 recommended footprint
P185 · p185_fig01EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 79. UFBGA144 outline
Figure 79. UFBGA144 outline
P186 · p186_fig01EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 80. UFBGA144 recommended footprint
Figure 80. UFBGA144 recommended footprint
P186 · p186_fig02EXACT PACKAGE
STM32F446ZEJ6 (UFBGA-144) — Figure 80. UFBGA144 recommended footprint
Figure 80. UFBGA144 recommended footprint
P1 · p01_fig01881×442px
STM32F446ZEJ6 (UFBGA-144) — Arm® Cortex®-M4 32-bit MCU+FPU, 225 DMIPS, up to 512 KB Flash/128+4 KB RAM, USB OTG HS/FS, seventeen TIMs, three ADCs and twenty communication interfaces | Datasheet - production data | LQFP64 (10 × 10 mm) LQFP100 (14 × 14 mm) LQFP144 (20 x
Arm® Cortex®-M4 32-bit MCU+FPU, 225 DMIPS, up to 512 KB Flash/128+4 KB RAM, USB OTG HS/FS, seventeen TIMs, three ADCs and twenty communication interfaces | Datasheet - production data | LQFP64 (10 × 10 mm) LQFP100 (14 × 14 mm) LQFP144 (20 x
P71 · p71_fig011751×1419px
STM32F446ZEJ6 (UFBGA-144) — Figure 18. Power supply scheme VBAT
Figure 18. Power supply scheme VBAT
P143 · p143_fig011546×603px
STM32F446ZEJ6 (UFBGA-144) — Figure 46. Typical connection diagram using the ADC
Figure 46. Typical connection diagram using the ADC
Page 1 / 3 (30 extracted figures)

Technical Specifications & Part Details (STM32F446ZEJ6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F446ZEJ6 (UFBGA-144) is a 144-pin embedded microcontroller unit (mcu) featuring a 10.00 × 10.00 × 0.58 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.7 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, CAN, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.7 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
180 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
113 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 0.58 mm (A1=0.20 mm)
Package family: BGA (UFBGA-144)
Pin Count & Lead PitchN / e
144 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, CAN, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0, PB2BOOT1 - (PB2)): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol144 auto-grouped pins
OK
IPC-7351B Land Pattern144 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32F446 (18)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (UFBGA-144)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.58mm · e=0.80mm
Pad Size (W × L)Level B
0.32 × 0.32 mm
Pins / Total PadsTopology
144P / 144Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-144
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F446ZEJ6 (UFBGA-144)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F446ZEJ6 (UFBGA-144)?

Manufactured by ST, the STM32F446ZEJ6 is housed in a UFBGA-144 package with 144 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (PC13: Multiplexed I/O & Peripheral Pin PC13 (General)), A2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), A3 (PE2: Multiplexed I/O & Peripheral Pin PE2 (SPI)), A4 (PE1: Multiplexed I/O & Peripheral Pin PE1 (General)), A5 (PE0: Multiplexed I/O & Peripheral Pin PE0 (General)), A6 (PB4(NJTRST): Multiplexed I/O & Peripheral Pin PB4(NJTRST) (SPI, I2C, SWD/JTAG)).

What are the IPC-7351B PCB Footprint dimensions for STM32F446ZEJ6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F446ZEJ6 (UFBGA-144) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.80 mm, and 144 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F446ZEJ6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F446ZEJ6 (ST, UFBGA-144) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (144 pins) & STM32F446 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
A2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
A3PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: SPI.
A4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
A5PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
A6PB4(NJTRST)Digital_IOSignal terminal PB4(NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO, SPI2_NSS. Supported peripheral buses: SPI, I2C, SWD/JTAG.
A7PB3(JTDO/TRACES WO)Digital_IOSignal terminal PB3(JTDO/TRACES WO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: SPI, PWM, SWD/JTAG.
A8PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: SPI.
A9PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: UART.
A10PA15(JTDI)Digital_IOSignal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, SWD/JTAG.
A11PA14(JTCKSWCLK) -Digital_IOSignal terminal PA14(JTCKSWCLK) - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14(JTCKSWCLK) -. Supported peripheral buses: SWD/JTAG.
A12PA13(JTMS SWDIO) -Digital_IOSignal terminal PA13(JTMS SWDIO) - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13(JTMS SWDIO) -. Supported peripheral buses: SWD/JTAG.
B1PC14 - OSC32 IN(PC14)_Digital_IOSignal terminal PC14 - OSC32 IN(PC14)_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32 IN(PC14)_. Supported peripheral buses: RTC/CLK.
B2PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
B3PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO_SAI1SCKA. Supported peripheral buses: SPI.
B4PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI_SAI1SDA. Supported peripheral buses: SPI.
B5PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, PWM.
B6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, PWM, CAN.
B7PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: UART.
B8PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: UART, SPI.
B9PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
B10PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISOUSART3RX. Supported peripheral buses: UART, SPI.
B11PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
B12PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
C1IOC1Digital_IOGeneral Purpose Digital I/O Pin IOC1
C2VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C3PF0Digital_IOSignal terminal PF0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: I2C.
C4PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: I2C.
C5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: I2C, PWM.
C6PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: I2C, PWM, CAN.
C7PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: UART, SPI.
C8PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCKSPDIFRXIN0. Supported peripheral buses: SPI.
C9PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: UART.
C10PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C.
C11VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C12PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: PWM, CAN.
D1PH0OSC IN(PH0) -_Digital_IOSignal terminal PH0OSC IN(PH0) -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0OSC IN(PH0) -_. Supported peripheral buses: RTC/CLK.
D2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D3VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D4PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: I2C.
D5BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
D6PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, PWM.
D7PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: UART, SPI.
D8PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
D9PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI.
D10PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, CAN.
D11PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: PWM.
D12PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, PWM.
E1PH1 - OSC OUT(PH1)_Digital_IOSignal terminal PH1 - OSC OUT(PH1)_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1 - OSC OUT(PH1)_. Supported peripheral buses: RTC/CLK.
E2PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: ADC.
E3PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: ADC.
E4PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: ADC.
E5PDR_ONDigital_IOSignal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General.
E6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E8PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: UART.
E9PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
E10PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO, SPI3_MOSI. Supported peripheral buses: SPI, CAN.
E11PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: PWM, RTC/CLK.
E12PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: I2C, RTC/CLK.
F1NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
F2PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: ADC.
F3PF6Digital_IOSignal terminal PF6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF6. Supported peripheral buses: ADC.
F4VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
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