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PIC16F15376T-I/ML (QFN-44-EP(8x8)) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC16F15376T-I/ML

MICROCHIPQFN-44-EP(8x8) · 45 Pins · Pitch 0.50mmDISCREPANCY REVIEW REQUIRED5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC16F15376T-I/ML (QFN-44-EP(8x8))1RC72RD43RD54RD65RD76VSS7VDD8NC9RB010RB111RB212RB313NC14RB415RB516ICSPCLK/RB617ICSPDAT/RB718VPP/MCLR#/RE19RA020RA121RA222RA323RA445EP44RC643RC542RC441RD340RD239RD138RD037RC336RC235RC134RC033RA632RA731NC30VSS29NC28VDD27RE226RE125RE024RA5Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.835.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445E=8.00mm · Pitch e=0.50mmD=8.00mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 8.00mm × 8.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (45/45)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1RC7I/OMultiplexed I/O & Peripheral Pin RC7 (General)
2RD4I/OMultiplexed I/O & Peripheral Pin RD4 (General)
3RD5I/OMultiplexed I/O & Peripheral Pin RD5 (General)
4RD6I/OMultiplexed I/O & Peripheral Pin RD6 (General)
5RD7I/OMultiplexed I/O & Peripheral Pin RD7 (General)
6VSSGNDGround Reference Pin (VSS)
7VDDPowerPower Supply Input (VDD — 1.8V to 3.6V)
8NCI/OMultiplexed I/O & Peripheral Pin NC (General)
9RB0I/OMultiplexed I/O & Peripheral Pin RB0 (General)
10RB1I/OMultiplexed I/O & Peripheral Pin RB1 (General)
11RB2I/OMultiplexed I/O & Peripheral Pin RB2 (General)
12RB3I/OMultiplexed I/O & Peripheral Pin RB3 (General)
13NCI/OMultiplexed I/O & Peripheral Pin NC (General)
14RB4I/OMultiplexed I/O & Peripheral Pin RB4 (General)
15RB5I/OMultiplexed I/O & Peripheral Pin RB5 (General)
16ICSPCLK/RB6I/OMultiplexed I/O & Peripheral Pin ICSPCLK/RB6 (General)
17ICSPDAT/RB7I/OMultiplexed I/O & Peripheral Pin ICSPDAT/RB7 (General)
18VPP/MCLR#/RE3I/OMultiplexed I/O & Peripheral Pin VPP/MCLR#/RE3 (General)
19RA0I/OMultiplexed I/O & Peripheral Pin RA0 (General)
20RA1I/OMultiplexed I/O & Peripheral Pin RA1 (General)
21RA2I/OMultiplexed I/O & Peripheral Pin RA2 (General)
22RA3I/OMultiplexed I/O & Peripheral Pin RA3 (General)
23RA4I/OMultiplexed I/O & Peripheral Pin RA4 (General)
24RA5I/OMultiplexed I/O & Peripheral Pin RA5 (General)
25RE0I/OMultiplexed I/O & Peripheral Pin RE0 (General)
26RE1I/OMultiplexed I/O & Peripheral Pin RE1 (General)
27RE2I/OMultiplexed I/O & Peripheral Pin RE2 (General)
28VDDPowerPower Supply Input (VDD — 1.8V to 3.6V)
29NCI/OMultiplexed I/O & Peripheral Pin NC (General)
30VSSGNDGround Reference Pin (VSS)
31NCI/OMultiplexed I/O & Peripheral Pin NC (General)
32RA7I/OMultiplexed I/O & Peripheral Pin RA7 (General)
33RA6I/OMultiplexed I/O & Peripheral Pin RA6 (General)
34RC0I/OMultiplexed I/O & Peripheral Pin RC0 (General)
35RC1I/OMultiplexed I/O & Peripheral Pin RC1 (General)
36RC2I/OMultiplexed I/O & Peripheral Pin RC2 (General)
37RC3I/OMultiplexed I/O & Peripheral Pin RC3 (General)
38RD0I/OMultiplexed I/O & Peripheral Pin RD0 (General)
39RD1I/OMultiplexed I/O & Peripheral Pin RD1 (General)
40RD2I/OMultiplexed I/O & Peripheral Pin RD2 (General)
41RD3I/OMultiplexed I/O & Peripheral Pin RD3 (General)
42RC4I/OMultiplexed I/O & Peripheral Pin RC4 (General)
43RC5I/OMultiplexed I/O & Peripheral Pin RC5 (General)
44RC6I/OMultiplexed I/O & Peripheral Pin RC6 (General)
45EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 RC7
I/O
Multiplexed I/O & Peripheral Pin RC7 (General)
Design note: Signal terminal RC7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC7. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
1. Realistic 3D PackageREPRESENTATIVE
PIC16F15376T-I/ML (QFN-44-EP(8x8)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC16F15376T-I/ML (QFN-44-EP(8x8)) - 2. Standard Pinout (Top View)
True package pinout (45 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC16F15376T-I/ML (QFN-44-EP(8x8)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC16F15376T-I/ML (QFN-44-EP(8x8)) - 4. Package Dimensions (D×E×A)
QFN-44-EP(8x8) · 8.00×8.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC16F15376T-I/ML (QFN-44-EP(8x8)) - 5. Recommended Land Pattern
IPC-7351B Footprint (45 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC16F15376T-I/ML (QFN-44-EP(8x8)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for PIC16F15376T / PIC16F15356T
P43 · p43_fig011777×1126px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — FIGURE 2-1: RECOMMENDED MINIMUM CONNECTIONS
FIGURE 2-1: RECOMMENDED MINIMUM CONNECTIONS
P168 · p168_fig011784×798px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) —  2016-2021 Microchip Technology Inc. DS40001866C-page 168
 2016-2021 Microchip Technology Inc. DS40001866C-page 168
P360 · p360_fig01867×407px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — FIGURE 28-3: CCP PWM OUTPUT SIGNAL
FIGURE 28-3: CCP PWM OUTPUT SIGNAL
P427 · p427_fig01867×566px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — FIGURE 32-11: I2C HOST/ CLIENT CONNECTION
FIGURE 32-11: I2C HOST/ CLIENT CONNECTION
P501 · p501_fig01890×737px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — FIGURE 35-2: PICkit™ PROGRAMMER STYLE CONNECTOR INTERFACE
FIGURE 35-2: PICkit™ PROGRAMMER STYLE CONNECTOR INTERFACE
P501 · p501_fig021068×718px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — FIGURE 35-3: TYPICAL CONNECTION FOR ICSP™ PROGRAMMING
FIGURE 35-3: TYPICAL CONNECTION FOR ICSP™ PROGRAMMING
P501 · p501_fig02P501
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — Datasheet Page 501 (p501_fig02)
Datasheet Page 501 (p501_fig02)
P588 · p588_fig011287×1128px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — Units Dimension Limits
Units Dimension Limits
P590 · p590_fig01944×954px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — MILLIMETERS MIN NOM
MILLIMETERS MIN NOM
P590 · p590_fig01P590
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — Datasheet Page 590 (p590_fig01)
Datasheet Page 590 (p590_fig01)
P591 · p591_fig011268×1145px
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — MILLIMETERS
MILLIMETERS
P591 · p591_fig01P591
PIC16F15376T-I/ML (QFN-44-EP(8x8)) — Datasheet Page 591 (p591_fig01)
Datasheet Page 591 (p591_fig01)
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (PIC16F15376T-I/ML)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC16F15376T-I/ML (QFN-44-EP(8x8)) is a 44-pin standard electronic & interconnect component featuring a 8.00 × 8.00 × 1.00 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V to 3.6V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, ADC, DAC, PWM interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
32 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
8.00 × 8.00 × 1.00 mm (A1=0.03 mm)
Package family: QFN (QFN-44-EP(8x8))
Pin Count & Lead PitchN / e
44 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, DAC, PWM
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol45 auto-grouped pins
OK
IPC-7351B Land Pattern45 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 6.45×6.45mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — PIC16F15376T / PIC16F15356T (2)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (QFN-44-EP(8x8))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
8.00 × 8.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.00mm · e=0.50mm
Pad Size (W × L)Level B
0.35 × 0.85 mm
Pins / Total PadsTopology
45P / 45Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
QFN-44-EP(8x8)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC16F15376T-I/ML (QFN-44-EP(8x8))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC16F15376T-I/ML (QFN-44-EP(8x8))?

Manufactured by MICROCHIP, the PIC16F15376T-I/ML is housed in a QFN-44-EP(8x8) package with 45 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.8V to 3.6V. Key pins include: 1 (RC7: Multiplexed I/O & Peripheral Pin RC7 (General)), 2 (RD4: Multiplexed I/O & Peripheral Pin RD4 (General)), 3 (RD5: Multiplexed I/O & Peripheral Pin RD5 (General)), 4 (RD6: Multiplexed I/O & Peripheral Pin RD6 (General)), 5 (RD7: Multiplexed I/O & Peripheral Pin RD7 (General)), 6 (VSS: Ground Reference Pin (VSS)).

What are the IPC-7351B PCB Footprint dimensions for PIC16F15376T-I/ML?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC16F15376T-I/ML (QFN-44-EP(8x8)) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.50 mm, and 45 copper pads plus a central exposed thermal pad (EPAD) of 6.45 × 6.45 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC16F15376T-I/ML?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC16F15376T-I/ML (MICROCHIP, QFN-44-EP(8x8)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (45 pins) & PIC16F15376T / PIC16F15356T Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1RC7Digital_IOSignal terminal RC7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC7. Supported peripheral buses: General.
2RD4Digital_IOSignal terminal RD4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD4. Supported peripheral buses: General.
3RD5Digital_IOSignal terminal RD5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD5. Supported peripheral buses: General.
4RD6Digital_IOSignal terminal RD6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD6. Supported peripheral buses: General.
5RD7Digital_IOSignal terminal RD7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD7. Supported peripheral buses: General.
6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
7VDDPower_InPrimary positive power supply input (VDD) operating in the 1.8V to 3.6V domain (Max rating: 3.6V).
8NCNCSignal terminal NC (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
9RB0Digital_IOSignal terminal RB0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB0. Supported peripheral buses: General.
10RB1Digital_IOSignal terminal RB1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB1. Supported peripheral buses: General.
11RB2Digital_IOSignal terminal RB2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB2. Supported peripheral buses: General.
12RB3Digital_IOSignal terminal RB3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB3. Supported peripheral buses: General.
13NCNCSignal terminal NC (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
14RB4Digital_IOSignal terminal RB4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB4. Supported peripheral buses: General.
15RB5Digital_IOSignal terminal RB5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB5. Supported peripheral buses: General.
16ICSPCLK/RB6Digital_IOSignal terminal ICSPCLK/RB6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: ICSPCLK/RB6. Supported peripheral buses: General.
17ICSPDAT/RB7Digital_IOSignal terminal ICSPDAT/RB7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: ICSPDAT/RB7. Supported peripheral buses: General.
18VPP/MCLR#/RE3Digital_IOSignal terminal VPP/MCLR#/RE3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: VPP/MCLR#/RE3. Supported peripheral buses: General.
19RA0Digital_IOSignal terminal RA0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA0. Supported peripheral buses: General.
20RA1Digital_IOSignal terminal RA1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA1. Supported peripheral buses: General.
21RA2Digital_IOSignal terminal RA2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA2. Supported peripheral buses: General.
22RA3Digital_IOSignal terminal RA3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA3. Supported peripheral buses: General.
23RA4Digital_IOSignal terminal RA4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA4. Supported peripheral buses: General.
24RA5Digital_IOSignal terminal RA5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA5. Supported peripheral buses: General.
25RE0Digital_IOSignal terminal RE0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE0. Supported peripheral buses: General.
26RE1Digital_IOSignal terminal RE1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE1. Supported peripheral buses: General.
27RE2Digital_IOSignal terminal RE2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE2. Supported peripheral buses: General.
28VDDPower_InPrimary positive power supply input (VDD) operating in the 1.8V to 3.6V domain (Max rating: 3.6V).
29NCNCSignal terminal NC (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
30VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
31NCNCSignal terminal NC (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
32RA7Digital_IOSignal terminal RA7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA7. Supported peripheral buses: General.
33RA6Digital_IOSignal terminal RA6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA6. Supported peripheral buses: General.
34RC0Digital_IOSignal terminal RC0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC0. Supported peripheral buses: General.
35RC1Digital_IOSignal terminal RC1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC1. Supported peripheral buses: General.
36RC2Digital_IOSignal terminal RC2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC2. Supported peripheral buses: General.
37RC3Digital_IOSignal terminal RC3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC3. Supported peripheral buses: General.
38RD0Digital_IOSignal terminal RD0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD0. Supported peripheral buses: General.
39RD1Digital_IOSignal terminal RD1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD1. Supported peripheral buses: General.
40RD2Digital_IOSignal terminal RD2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD2. Supported peripheral buses: General.
41RD3Digital_IOSignal terminal RD3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD3. Supported peripheral buses: General.
42RC4Digital_IOSignal terminal RC4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC4. Supported peripheral buses: General.
43RC5Digital_IOSignal terminal RC5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC5. Supported peripheral buses: General.
44RC6Digital_IOSignal terminal RC6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC6. Supported peripheral buses: General.
45EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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