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STM32G071G8U6 (UFQFPN-28(4x4)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G071G8U6

STID: C724080UFQFPN-28(4x4) · 28 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G071G8U6 (UFQFPN-28(4x4))1PC14 - OSC322IO23VDD/VDDA4VSS/VSSA5PF2 NRST -6PA07PA18PA29PA310PA411PA512PA613PA714PB028PB827PB726PB625PB524PB423PB322PA1521PA14BOOT0 -20PA1319PA12 [PA10]18PA11 [PA9]17PC616PA815PB1Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.822.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
23456910111213161718192023242526271415222112887E=4.00mm · Pitch e=0.50mmD=4.00mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 4.00mm × 4.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
2IO2I/OGeneral Purpose Digital I/O Pin IO2
3VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
4VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
5PF2 NRST -I/OMultiplexed I/O & Peripheral Pin PF2 NRST - (RTC/CLK)
6PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, PWM)
7PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, PWM)
8PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI)
9PA3I/OMultiplexed I/O & Peripheral Pin PA3 (SPI, PWM)
10PA4I/OMultiplexed I/O & Peripheral Pin PA4 (SPI, ADC, RTC/CLK)
11PA5I/OMultiplexed I/O & Peripheral Pin PA5 (UART, SPI, ADC, PWM)
12PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, PWM)
13PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
14PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC, PWM)
15PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, PWM)
16PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, PWM, RTC/CLK)
17PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
18PA11 [PA9]I/OMultiplexed I/O & Peripheral Pin PA11 [PA9] (UART, SPI)
19PA12 [PA10]I/OMultiplexed I/O & Peripheral Pin PA12 [PA10] (UART, SPI, I2C)
20PA13I/OMultiplexed I/O & Peripheral Pin PA13 (SWD/JTAG)
21PA14BOOT0 -I/OMultiplexed I/O & Peripheral Pin PA14BOOT0 - (UART, SWD/JTAG)
22PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM)
23PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, PWM)
24PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI, PWM)
25PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, PWM)
26PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART)
27PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART)
28PB8I/OMultiplexed I/O & Peripheral Pin PB8 (SPI)
PIN 1 PC14 - OSC32_IN (PC14)
I/O
Multiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
Design note: Alt: TIM1_BKIN2 | Add: OSC32_INOSCIN ,_
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 19 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G071G8U6 (ST · UFQFPN-28(4x4))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G071G8U6 (UFQFPN-28(4x4)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G071G8U6 (UFQFPN-28(4x4)) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G071G8U6 (UFQFPN-28(4x4)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G071G8U6 (UFQFPN-28(4x4)) - 4. Package Dimensions (D×E×A)
UFQFPN-28(4x4) · 4.00×4.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G071G8U6 (UFQFPN-28(4x4)) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G071G8U6 (UFQFPN-28(4x4)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (19 figures · Page 1/2)
Showing 1–12 of 19 uncropped original figures for STM32G071
P1 · p01_fig01EXACT PACKAGE
STM32G071G8U6 (UFQFPN-28(4x4)) — Arm® Cortex®-M0+ 32-bit MCU, up to 128 KB Flash, 36 KB RAM,
Arm® Cortex®-M0+ 32-bit MCU, up to 128 KB Flash, 36 KB RAM,
P1 · p01_fig02EXACT PACKAGE
STM32G071G8U6 (UFQFPN-28(4x4)) — 5 × 5 mm
5 × 5 mm
P40 · p40_fig01EXACT PACKAGE
STM32G071G8U6 (UFQFPN-28(4x4)) — Figure 9. STM32G071GxU UFQFPN28 pinout
Figure 9. STM32G071GxU UFQFPN28 pinout
P41 · p41_fig01EXACT PACKAGE
STM32G071G8U6 (UFQFPN-28(4x4)) — DS12232 Rev 3 41/133
DS12232 Rev 3 41/133
P124 · p124_fig01EXACT PACKAGE
STM32G071G8U6 (UFQFPN-28(4x4)) — Figure 50. UFQFPN28 package outline
Figure 50. UFQFPN28 package outline
P125 · p125_fig01EXACT PACKAGE
STM32G071G8U6 (UFQFPN-28(4x4)) — Figure 51. Recommended footprint for UFQFPN28 package
Figure 51. Recommended footprint for UFQFPN28 package
P125 · p125_fig02EXACT PACKAGE
STM32G071G8U6 (UFQFPN-28(4x4)) — Figure 52. UFQFPN28 package marking example
Figure 52. UFQFPN28 package marking example
P1 · p01_fig02P1
STM32G071G8U6 (UFQFPN-28(4x4)) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P40 · p40_fig021546×813px
STM32G071G8U6 (UFQFPN-28(4x4)) — Figure 10. STM32G071Ex WLCSP25 pinout
Figure 10. STM32G071Ex WLCSP25 pinout
P40 · p40_fig01P40
STM32G071G8U6 (UFQFPN-28(4x4)) — Datasheet Page 40 (p40_fig01)
Datasheet Page 40 (p40_fig01)
P53 · p53_fig011548×1316px
STM32G071G8U6 (UFQFPN-28(4x4)) — Figure 13. Power supply scheme
Figure 13. Power supply scheme
P53 · p53_fig021875×783px
STM32G071G8U6 (UFQFPN-28(4x4)) — Figure 14. Current consumption measurement scheme
Figure 14. Current consumption measurement scheme
Page 1 / 2 (19 extracted figures)

Technical Specifications & Part Details (STM32G071G8U6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G071G8U6 (UFQFPN-28(4x4)) is a 28-pin embedded microcontroller unit (mcu) featuring a 4.00 × 4.00 × 0.55 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.62 V - 3.6 V supply operation across -40°C to 85°C with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.62 V - 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
64 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
24 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
4.00 × 4.00 × 0.55 mm (A1=0.05 mm)
Package family: QFN (UFQFPN-28(4x4))
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PA14BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFQFPN-28(4x4))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
4.00 × 4.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 0.70 mm
Pins / Total PadsTopology
28P / 28Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFQFPN-28(4x4)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G071G8U6 (UFQFPN-28(4x4))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G071G8U6 (UFQFPN-28(4x4))?

Manufactured by ST, the STM32G071G8U6 is housed in a UFQFPN-28(4x4) package with 28 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.62 V - 3.6 V. Key pins include: 1 (PC14 - OSC32_IN (PC14): Multiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)), 2 (IO2: General Purpose Digital I/O Pin IO2), 3 (VDD/VDDA: Power Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))), 4 (VSS/VSSA: Ground Reference Pin (VSS/VSSA)), 5 (PF2 NRST -: Multiplexed I/O & Peripheral Pin PF2 NRST - (RTC/CLK)), 6 (PA0: Multiplexed I/O & Peripheral Pin PA0 (UART, SPI, PWM)).

What are the IPC-7351B PCB Footprint dimensions for STM32G071G8U6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G071G8U6 (UFQFPN-28(4x4)) has a nominal body envelope of 4.00 × 4.00 mm, pitch e = 0.50 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G071G8U6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G071G8U6 (ST, UFQFPN-28(4x4)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & STM32G071 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
2IO2Digital_IOGeneral Purpose Digital I/O Pin IO2
3VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
4VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
5PF2 NRST -Digital_IOSignal terminal PF2 NRST - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2 NRST -. Supported peripheral buses: RTC/CLK.
6PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKUSART2CTS. Supported peripheral buses: UART, SPI, PWM.
7PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, PWM.
8PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI.
9PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOUSART2RX. Supported peripheral buses: SPI, PWM.
10PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI2_MOSITIM14CH1. Supported peripheral buses: SPI, ADC, RTC/CLK.
11PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, ADC, PWM.
12PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC, PWM.
13PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
14PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, PWM.
15PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, PWM.
16PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, PWM, RTC/CLK.
17PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM.
18PA11 [PA9]Digital_IOSignal terminal PA11 [PA9] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI.
19PA12 [PA10]Digital_IOSignal terminal PA12 [PA10] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI, I2C.
20PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: SWD/JTAG.
21PA14BOOT0 -Digital_IOSignal terminal PA14BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14BOOT0 -. Supported peripheral buses: UART, SWD/JTAG.
22PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, PWM.
23PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, PWM.
24PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, PWM.
25PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, PWM.
26PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART.
27PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART.
28PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
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