Mechanical Dimensions & Land Pattern (TFBGA-144)
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit TFBGA-144 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — PIC32MZ1024EFE144-I/JWX (TFBGA-144)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of PIC32MZ1024EFE144-I/JWX (TFBGA-144)?
Manufactured by MICROCHIP, the PIC32MZ1024EFE144-I/JWX is housed in a TFBGA-144 package with 144 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.1V to 3.6V. Key pins include: A1 (PGED1: Multiplexed I/O & Peripheral Pin PGED1 (General)), A2 (PGEC1: Multiplexed I/O & Peripheral Pin PGEC1 (General)), A3 (AERXD0: Multiplexed I/O & Peripheral Pin AERXD0 (General)), A4 (AERXD1: Multiplexed I/O & Peripheral Pin AERXD1 (General)), A5 (RE8: Multiplexed I/O & Peripheral Pin RE8 (General)), A6 (EBIA2: Multiplexed I/O & Peripheral Pin EBIA2 (General)).
What are the IPC-7351B PCB Footprint dimensions for PIC32MZ1024EFE144-I/JWX?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC32MZ1024EFE144-I/JWX (TFBGA-144) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 144 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC32MZ1024EFE144-I/JWX?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC32MZ1024EFE144-I/JWX (MICROCHIP, TFBGA-144) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (144 pins) & PIC32MZ0512E / PIC32MZ1024E / PIC32MZ2048E Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | PGED1 | Digital_IO | Signal terminal PGED1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: PGED1. Supported peripheral buses: General. |
| A2 | PGEC1 | Digital_IO | Signal terminal PGEC1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: PGEC1. Supported peripheral buses: General. |
| A3 | AERXD0 | Digital_IO | Signal terminal AERXD0 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AERXD0. Supported peripheral buses: General. |
| A4 | AERXD1 | Digital_IO | Signal terminal AERXD1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AERXD1. Supported peripheral buses: General. |
| A5 | RE8 | Digital_IO | Signal terminal RE8 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RE8. Supported peripheral buses: General. |
| A6 | EBIA2 | Digital_IO | Signal terminal EBIA2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA2. Supported peripheral buses: General. |
| A7 | AN21 | Digital_IO | Signal terminal AN21 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AN21. Supported peripheral buses: General. |
| A8 | EBIBS1 | Digital_IO | Signal terminal EBIBS1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIBS1. Supported peripheral buses: General. |
| A9 | AERXERR | Digital_IO | Signal terminal AERXERR (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AERXERR. Supported peripheral buses: General. |
| A10 | EBIA6 | Digital_IO | Signal terminal EBIA6 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA6. Supported peripheral buses: General. |
| A11 | EBID5 | Digital_IO | Signal terminal EBID5 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID5. Supported peripheral buses: General. |
| A12 | RG15 | Digital_IO | Signal terminal RG15 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RG15. Supported peripheral buses: General. |
| A13 | EBID4 | Digital_IO | Signal terminal EBID4 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID4. Supported peripheral buses: General. |
| B1 | PGEC2 | Digital_IO | Signal terminal PGEC2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: PGEC2. Supported peripheral buses: General. |
| B2 | C2INA | Digital_IO | Signal terminal C2INA (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: C2INA. Supported peripheral buses: General. |
| B3 | EBIA0 | Digital_IO | Signal terminal EBIA0 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA0. Supported peripheral buses: General. |
| B4 | EREFCLK | Digital_IO | Signal terminal EREFCLK (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EREFCLK. Supported peripheral buses: General. |
| B5 | RE9 | Digital_IO | Signal terminal RE9 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RE9. Supported peripheral buses: General. |
| B6 | MCLR | Digital_IO | Signal terminal MCLR (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: MCLR. Supported peripheral buses: General. |
| B7 | RG6 | Digital_IO | Signal terminal RG6 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RG6. Supported peripheral buses: General. |
| B8 | EBIA12 | Digital_IO | Signal terminal EBIA12 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA12. Supported peripheral buses: General. |
| B9 | ETXD1 | Digital_IO | Signal terminal ETXD1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: ETXD1. Supported peripheral buses: General. |
| B10 | EBID7 | Digital_IO | Signal terminal EBID7 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID7. Supported peripheral buses: General. |
| B11 | EBID6 | Digital_IO | Signal terminal EBID6 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID6. Supported peripheral buses: General. |
| B12 | EBIA5 | Digital_IO | Signal terminal EBIA5 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA5. Supported peripheral buses: General. |
| B13 | EBID3 | Digital_IO | Signal terminal EBID3 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID3. Supported peripheral buses: General. |
| C1 | PGED2 | Digital_IO | Signal terminal PGED2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: PGED2. Supported peripheral buses: General. |
| C2 | VREF- | Analog | Signal terminal VREF- (Analog, 2.1V to 3.6V domain). Multiplexed alternate functions: VREF-. Supported peripheral buses: General. |
| C3 | EBIA11 | Digital_IO | Signal terminal EBIA11 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA11. Supported peripheral buses: General. |
| C4 | EBIA13 | Digital_IO | Signal terminal EBIA13 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA13. Supported peripheral buses: General. |
| C5 | AECRSDV | Digital_IO | Signal terminal AECRSDV (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AECRSDV. Supported peripheral buses: General. |
| C6 | EBIA16 | Digital_IO | Signal terminal EBIA16 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA16. Supported peripheral buses: General. |
| C7 | RG7 | Digital_IO | Signal terminal RG7 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RG7. Supported peripheral buses: General. |
| C8 | EBIWE | Digital_IO | Signal terminal EBIWE (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIWE. Supported peripheral buses: General. |
| C9 | ETXD0 | Digital_IO | Signal terminal ETXD0 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: ETXD0. Supported peripheral buses: General. |
| C10 | EBID1 | Digital_IO | Signal terminal EBID1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID1. Supported peripheral buses: General. |
| C11 | TRD1 | Digital_IO | Signal terminal TRD1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: TRD1. Supported peripheral buses: General. |
| C12 | TRD0 | Digital_IO | Signal terminal TRD0 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: TRD0. Supported peripheral buses: General. |
| C13 | EBID2 | Digital_IO | Signal terminal EBID2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID2. Supported peripheral buses: General. |
| D1 | AVDD | Power_In | Primary positive power supply input (AVDD) operating in the 2.1V to 3.6V domain (Max rating: 3.6V). |
| D2 | VREF+ | Analog | Signal terminal VREF+ (Analog, 2.1V to 3.6V domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General. |
| D3 | AVSS | GND | 0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D4 | AEREFCLK | Digital_IO | Signal terminal AEREFCLK (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AEREFCLK. Supported peripheral buses: General. |
| D5 | TMS | Digital_IO | Signal terminal TMS (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: TMS. Supported peripheral buses: SWD/JTAG. |
| D6 | C1INC | Digital_IO | Signal terminal C1INC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: C1INC. Supported peripheral buses: General. |
| D7 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D8 | EBIOE | Digital_IO | Signal terminal EBIOE (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIOE. Supported peripheral buses: General. |
| D9 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D10 | EBID0 | Digital_IO | Signal terminal EBID0 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBID0. Supported peripheral buses: General. |
| D11 | EBICS3 | Digital_IO | Signal terminal EBICS3 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBICS3. Supported peripheral buses: General. |
| D12 | TRD2 | Digital_IO | Signal terminal TRD2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: TRD2. Supported peripheral buses: General. |
| D13 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 2.1V to 3.6V domain (Max rating: 3.6V). |
| E1 | ETXD2 | Digital_IO | Signal terminal ETXD2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: ETXD2. Supported peripheral buses: General. |
| E2 | ETXD3 | Digital_IO | Signal terminal ETXD3 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: ETXD3. Supported peripheral buses: General. |
| E3 | EBIRP | Digital_IO | Signal terminal EBIRP (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIRP. Supported peripheral buses: General. |
| E4 | AVSS | GND | 0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| E10 | EBICS2 | Digital_IO | Signal terminal EBICS2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBICS2. Supported peripheral buses: General. |
| E11 | EBICS1 | Digital_IO | Signal terminal EBICS1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBICS1. Supported peripheral buses: General. |
| E12 | EBICS0 | Digital_IO | Signal terminal EBICS0 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBICS0. Supported peripheral buses: General. |
| E13 | TRD3 | Digital_IO | Signal terminal TRD3 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: TRD3. Supported peripheral buses: General. |
| F1 | RB10 | Digital_IO | Signal terminal RB10 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RB10. Supported peripheral buses: General. |
| F2 | EBIA7 | Digital_IO | Signal terminal EBIA7 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: EBIA7. Supported peripheral buses: General. |
| F3 | AETXERR | Digital_IO | Signal terminal AETXERR (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AETXERR. Supported peripheral buses: General. |
| F4 | AETXD2 | Digital_IO | Signal terminal AETXD2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: AETXD2. Supported peripheral buses: General. |












