PIC16C56AT-20/SS (SSOP-20-5.2mm) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC16C56AT-20/SS

MICROCHIPSSOP-20-5.2mm · 20 Pins · Pitch 0.65mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC16C56AT-20/SS (SSOP-20-5.2mm)1RA22RA33T0CKI4#MCLR/VPP5VSS6VSS7RB08RB19RB210RB320RA119RA018OSC1/CLKIN17OSC2/CLKOUT16VDD15VDD14RB713RB612RB511RB4Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.817.812.77.62.5-2.5-7.6-12.7-17.8mm
2. 2D FOOTPRINT
1234567891011121314151617181920E=5.30mm · Pitch e=0.65mmD=7.20mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 5.30mm × 7.20mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (20/20)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1RA2I/OMultiplexed I/O & Peripheral Pin RA2 (General)
2RA3I/OMultiplexed I/O & Peripheral Pin RA3 (General)
3T0CKII/OMultiplexed I/O & Peripheral Pin T0CKI (General)
4#MCLR/VPPI/OMultiplexed I/O & Peripheral Pin #MCLR/VPP (General)
5VSSGNDGround Reference Pin (VSS)
6VSSGNDGround Reference Pin (VSS)
7RB0I/OMultiplexed I/O & Peripheral Pin RB0 (General)
8RB1I/OMultiplexed I/O & Peripheral Pin RB1 (General)
9RB2I/OMultiplexed I/O & Peripheral Pin RB2 (General)
10RB3I/OMultiplexed I/O & Peripheral Pin RB3 (General)
11RB4I/OMultiplexed I/O & Peripheral Pin RB4 (General)
12RB5I/OMultiplexed I/O & Peripheral Pin RB5 (General)
13RB6I/OMultiplexed I/O & Peripheral Pin RB6 (General)
14RB7I/OMultiplexed I/O & Peripheral Pin RB7 (General)
15VDDPowerPower Supply Input (VDD — 2.0V to 6.25V)
16VDDPowerPower Supply Input (VDD — 2.0V to 6.25V)
17OSC2/CLKOUTI/OMultiplexed I/O & Peripheral Pin OSC2/CLKOUT (RTC/CLK)
18OSC1/CLKINI/OMultiplexed I/O & Peripheral Pin OSC1/CLKIN (RTC/CLK)
19RA0I/OMultiplexed I/O & Peripheral Pin RA0 (General)
20RA1I/OMultiplexed I/O & Peripheral Pin RA1 (General)
PIN 1 RA2
I/O
Multiplexed I/O & Peripheral Pin RA2 (General)
Design note: Signal terminal RA2 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RA2. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
1. Realistic 3D PackageREPRESENTATIVE
PIC16C56AT-20/SS (SSOP-20-5.2mm) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC16C56AT-20/SS (SSOP-20-5.2mm) - 2. Standard Pinout (Top View)
True package pinout (20 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC16C56AT-20/SS (SSOP-20-5.2mm) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC16C56AT-20/SS (SSOP-20-5.2mm) - 4. Package Dimensions (D×E×A)
SSOP-20-5.2mm · 5.30×7.20mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC16C56AT-20/SS (SSOP-20-5.2mm) - 5. Recommended Land Pattern
IPC-7351B Footprint (20 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC16C56AT-20/SS (SSOP-20-5.2mm) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for PIC16C56A / PIC16C56AT
P2 · p02_fig01P2
PIC16C56AT-20/SS (SSOP-20-5.2mm) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P37 · p37_fig011514×523px
PIC16C56AT-20/SS (SSOP-20-5.2mm) — FIGURE 8-1: TIMER0 BLOCK DIAGRAM
FIGURE 8-1: TIMER0 BLOCK DIAGRAM
P37 · p37_fig02794×489px
PIC16C56AT-20/SS (SSOP-20-5.2mm) — FIGURE 8-2: ELECTRICAL STRUCTURE OF T0CKI PIN
FIGURE 8-2: ELECTRICAL STRUCTURE OF T0CKI PIN
P176 · p176_fig011441×1806px
PIC16C56AT-20/SS (SSOP-20-5.2mm) — Foot Angle  0 4 8 0 4 8 | 15 12 0 15 12 0  Mold Draft Angle Bottom | 15 12 0 15 12 0  Mold Draft Angle Top | 0.51 0.42 0.36 .020 .017 .014 B Lead Width | 0.30 0.27 0.23 .012 .011 .009 c Lead Thickness | 1.27 0.84 0.41 .050 .033 .016 L Fo
Foot Angle  0 4 8 0 4 8 | 15 12 0 15 12 0  Mold Draft Angle Bottom | 15 12 0 15 12 0  Mold Draft Angle Top | 0.51 0.42 0.36 .020 .017 .014 B Lead Width | 0.30 0.27 0.23 .012 .011 .009 c Lead Thickness | 1.27 0.84 0.41 .050 .033 .016 L Fo
P176 · p176_fig01P176
PIC16C56AT-20/SS (SSOP-20-5.2mm) — Datasheet Page 176 (p176_fig01)
Datasheet Page 176 (p176_fig01)
P2 · p02_fig01All Packages in PDF
PIC16C56AT-20/SS (SSOP-20-5.2mm) — PIC16C5X | Pin Diagrams | Device Differences | Device Voltage | Range | Oscillator | Selection (Program) | Oscillator | Process Technology | (Microns) | ROM Equivalent | MCLR | Filter | PDIP, SOIC, Windowed CERDIP | PIC16CR54 | PIC16C58 PIC
PIC16C5X | Pin Diagrams | Device Differences | Device Voltage | Range | Oscillator | Selection (Program) | Oscillator | Process Technology | (Microns) | ROM Equivalent | MCLR | Filter | PDIP, SOIC, Windowed CERDIP | PIC16CR54 | PIC16C58 PIC
P2 · p02_fig02All Packages in PDF
PIC16C56AT-20/SS (SSOP-20-5.2mm) — Process Technology
Process Technology
P171 · p171_fig01All Packages in PDF
PIC16C56AT-20/SS (SSOP-20-5.2mm) —  1997-2013 Microchip Technology Inc. Preliminary DS30453E-page 171 | PIC16C5X | 21.0 PACKAGING INFORMATION | 21.1 Package Marketing Information | XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX | YYWWNNN | 18-Lead PDIP | 28-Lead Skinny PDIP (.300") |
 1997-2013 Microchip Technology Inc. Preliminary DS30453E-page 171 | PIC16C5X | 21.0 PACKAGING INFORMATION | 21.1 Package Marketing Information | XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX | YYWWNNN | 18-Lead PDIP | 28-Lead Skinny PDIP (.300") |

Technical Specifications & Part Details (PIC16C56AT-20/SS)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC16C56AT-20/SS (SSOP-20-5.2mm) is a 20-pin standard electronic & interconnect component featuring a 7.20 × 5.30 × 2.00 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 2.0V to 6.25V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
2.0V to 6.25V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
40 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.20 × 5.30 × 2.00 mm (A1=0.15 mm)
Package family: TSSOP (SSOP-20-5.2mm)
Pin Count & Lead PitchN / e
20 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol20 auto-grouped pins
OK
IPC-7351B Land Pattern20 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SSOP-20-5.2mm)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.20 × 5.30 mm
Height (A) & Pitch (e)IPC-7351B
A=2.00mm · e=0.65mm
Pad Size (W × L)Level B
0.42 × 1.60 mm
Pins / Total PadsTopology
20P / 20Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SSOP-20-5.2mm
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC16C56AT-20/SS (SSOP-20-5.2mm)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC16C56AT-20/SS (SSOP-20-5.2mm)?

Manufactured by MICROCHIP, the PIC16C56AT-20/SS is housed in a SSOP-20-5.2mm package with 20 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 2.0V to 6.25V. Key pins include: 1 (RA2: Multiplexed I/O & Peripheral Pin RA2 (General)), 2 (RA3: Multiplexed I/O & Peripheral Pin RA3 (General)), 3 (T0CKI: Multiplexed I/O & Peripheral Pin T0CKI (General)), 4 (#MCLR/VPP: Multiplexed I/O & Peripheral Pin #MCLR/VPP (General)), 5 (VSS: Ground Reference Pin (VSS)), 6 (VSS: Ground Reference Pin (VSS)).

What are the IPC-7351B PCB Footprint dimensions for PIC16C56AT-20/SS?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC16C56AT-20/SS (SSOP-20-5.2mm) has a nominal body envelope of 5.30 × 7.20 mm, pitch e = 0.65 mm, and 20 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC16C56AT-20/SS?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC16C56AT-20/SS (MICROCHIP, SSOP-20-5.2mm) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (20 pins) & PIC16C56A / PIC16C56AT Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1RA2Digital_IOSignal terminal RA2 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RA2. Supported peripheral buses: General.
2RA3Digital_IOSignal terminal RA3 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RA3. Supported peripheral buses: General.
3T0CKIDigital_IOSignal terminal T0CKI (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: T0CKI. Supported peripheral buses: General.
4#MCLR/VPPDigital_IOSignal terminal #MCLR/VPP (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: #MCLR/VPP. Supported peripheral buses: General.
5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
7RB0Digital_IOSignal terminal RB0 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB0. Supported peripheral buses: General.
8RB1Digital_IOSignal terminal RB1 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB1. Supported peripheral buses: General.
9RB2Digital_IOSignal terminal RB2 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB2. Supported peripheral buses: General.
10RB3Digital_IOSignal terminal RB3 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB3. Supported peripheral buses: General.
11RB4Digital_IOSignal terminal RB4 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB4. Supported peripheral buses: General.
12RB5Digital_IOSignal terminal RB5 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB5. Supported peripheral buses: General.
13RB6Digital_IOSignal terminal RB6 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB6. Supported peripheral buses: General.
14RB7Digital_IOSignal terminal RB7 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RB7. Supported peripheral buses: General.
15VDDPower_InPrimary positive power supply input (VDD) operating in the 2.0V to 6.25V domain (Max rating: 6.25V).
16VDDPower_InPrimary positive power supply input (VDD) operating in the 2.0V to 6.25V domain (Max rating: 6.25V).
17OSC2/CLKOUTDigital_IOSignal terminal OSC2/CLKOUT (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: OSC2/CLKOUT. Supported peripheral buses: RTC/CLK.
18OSC1/CLKINDigital_IOSignal terminal OSC1/CLKIN (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: OSC1/CLKIN. Supported peripheral buses: RTC/CLK.
19RA0Digital_IOSignal terminal RA0 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RA0. Supported peripheral buses: General.
20RA1Digital_IOSignal terminal RA1 (I/O, 2.0V to 6.25V domain). Multiplexed alternate functions: RA1. Supported peripheral buses: General.