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ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — Symbol, Footprint IPC-7351B & 3D STEP Model

ESP32-C5-WROOM-1U-N16R8-V1.2

ESPRESSIFID: C54951857SMD,21.2x18mm · 32 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm)1GND23V33EN4IO25IO36IO07IO18IO69IO710IO811IO912IO1013IO1314IO1415IO2816IO532GND314 ANT230GND29EPAD28GND27IO2626IO2525TX024RX023IO2422NC21IO2320NC19NC/IO1518IO2717IO4Grid Pitch = 2.54mm (IEEE-315)-20.3-15.2-10.2-5.105.110.215.220.325.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728292929292929292929303132E=18.00mm · Pitch e=1.27mmD=21.20mm-15-13-11-9-7-5-3-1135791113151715131197531-1-3-5-7-9-11-13-15mm
3. 3D CAD MODEL
Package Body: 18.00mm × 21.20mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (32/32)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1GNDGNDGround Reference Pin (GND)
23V3PowerPower Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
3ENISystem Enable & Hardware Reset (EN)
4IO2I/OMultiplexed I/O & Peripheral Pin IO2 (UART, SPI, I2C, ADC, SWD/JTAG)
5IO3I/OMultiplexed I/O & Peripheral Pin IO3 (UART, I2C, ADC, SWD/JTAG)
6IO0I/OMultiplexed I/O & Peripheral Pin IO0 (UART, RTC/CLK)
7IO1I/OMultiplexed I/O & Peripheral Pin IO1 (UART, ADC, RTC/CLK)
8IO6I/OMultiplexed I/O & Peripheral Pin IO6 (SPI, ADC)
9IO7I/OMultiplexed I/O & Peripheral Pin IO7 (SPI)
10IO8I/OMultiplexed I/O & Peripheral Pin IO8 (General)
11IO9I/OMultiplexed I/O & Peripheral Pin IO9 (General)
12IO10I/OMultiplexed I/O & Peripheral Pin IO10 (SPI)
13IO13I/OMultiplexed I/O & Peripheral Pin IO13 (USB)
14IO14I/OMultiplexed I/O & Peripheral Pin IO14 (USB)
15IO28I/OMultiplexed I/O & Peripheral Pin IO28 (General)
16IO5I/OMultiplexed I/O & Peripheral Pin IO5 (UART, SPI, ADC, SWD/JTAG)
17IO4I/OMultiplexed I/O & Peripheral Pin IO4 (UART, SPI, ADC, SWD/JTAG)
18IO27I/OMultiplexed I/O & Peripheral Pin IO27 (General)
19NC/IO15I/OMultiplexed I/O & Peripheral Pin NC/IO15 (SPI)
20NCI/OMultiplexed I/O & Peripheral Pin NC (General)
21IO23I/OMultiplexed I/O & Peripheral Pin IO23 (General)
22NCI/OMultiplexed I/O & Peripheral Pin NC (General)
23IO24I/OMultiplexed I/O & Peripheral Pin IO24 (General)
24RX0I/OMultiplexed I/O & Peripheral Pin RX0 (UART)
25TX0I/OMultiplexed I/O & Peripheral Pin TX0 (UART)
26IO25I/OMultiplexed I/O & Peripheral Pin IO25 (General)
27IO26I/OMultiplexed I/O & Peripheral Pin IO26 (General)
28GNDGNDGround Reference Pin (GND)
29EPADGNDExposed Thermal & Ground Pad (EPAD)
30GNDGNDGround Reference Pin (GND)
314 ANT2I/OMultiplexed I/O & Peripheral Pin 4 ANT2 (General)
32GNDGNDGround Reference Pin (GND)
PIN 1 GND
GND
Ground Reference Pin (GND)
Design note: 接地
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ESP32-C5-WROOM-1U-N16R8-V1.2 (ESPRESSIF · SMD,21.2x18mm)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) - 2. Standard Pinout (Top View)
True package pinout (32 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) - 4. Package Dimensions (D×E×A)
SMD,21.2x18mm · 18.00×21.20mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) - 5. Recommended Land Pattern
IPC-7351B Footprint (40 Pads)Expand ›
6. Application SchematicSCHEMATIC
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for ESP32-C5-WROOM
P1 · p01_fig01EXACT PACKAGE
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — ESP32-C5-WROOM-1 ESP32-C5-WROOM-1U
ESP32-C5-WROOM-1 ESP32-C5-WROOM-1U
P1 · p01_fig02EXACT PACKAGE
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — ESP32-C5-WROOM-1 ESP32-C5-WROOM-1U
ESP32-C5-WROOM-1 ESP32-C5-WROOM-1U
P13 · p13_fig01EXACT PACKAGE
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — ESP32-C5-WROOM-1 模组共有29 个管脚，ESP32-C5-WROOM-1U 模组共有32 个管脚，具体描述参见表3-1
ESP32-C5-WROOM-1 模组共有29 个管脚，ESP32-C5-WROOM-1U 模组共有32 个管脚，具体描述参见表3-1
P50 · p50_fig01EXACT PACKAGE
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — 图9-2. ESP32-C5-WROOM-1U 外围设计原理图
图9-2. ESP32-C5-WROOM-1U 外围设计原理图
P51 · p51_fig03EXACT PACKAGE
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — 图10-2. ESP32-C5-WROOM-1U 模组尺寸
图10-2. ESP32-C5-WROOM-1U 模组尺寸
P55 · p55_fig01EXACT PACKAGE
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — 图11-2. ESP32-C5-WROOM-1U 推荐PCB 封装图形
图11-2. ESP32-C5-WROOM-1U 推荐PCB 封装图形
P1 · p01_fig03336×313px
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — 5) ESPRESSIF
5) ESPRESSIF
P1 · p01_fig01P1
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P4 · p04_fig011926×1288px
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — 图1-1. ESP32-C5 模组型号命名规则
图1-1. ESP32-C5 模组型号命名规则
P48 · p48_fig011244×1834px
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — SPICS1_IO15
SPICS1_IO15
P50 · p50_fig01P50
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — Datasheet Page 50 (p50_fig01)
Datasheet Page 50 (p50_fig01)
P55 · p55_fig01P55
ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) — Datasheet Page 55 (p55_fig01)
Datasheet Page 55 (p55_fig01)
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (ESP32-C5-WROOM-1U-N16R8-V1.2)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) is a 32-pin wireless wi-fi / bluetooth le soc module featuring a 21.20 × 18.00 × 3.30 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 3.0 ~ 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Wi-Fi, Bluetooth / BLE, USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
3.0 ~ 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
5 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_TX(peak) ≈ 310 mA @ 3.3V | Deep-Sleep ≈ 10 µA | I_GPIO(max) = 40 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
21.20 × 18.00 × 3.30 mm (A1=0.00 mm)
Package family: CASTELLATED_MODULE (SMD,21.2x18mm)
Pin Count & Lead PitchN / e
32 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Wi-Fi, Bluetooth / BLE, USB, UART, SPI, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (IO0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol32 auto-grouped pins
OK
IPC-7351B Land Pattern40 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteEPAD 4.70×4.70mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SMD,21.2x18mm)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
21.20 × 18.00 mm
Height (A) & Pitch (e)IPC-7351B
A=3.30mm · e=1.27mm
Pad Size (W × L)Level B
0.90 × 1.50 mm
Pins / Total PadsTopology
32P / 40Pad (CASTELLATED_MODULE)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
C1, C2
BOM
22µF (or 10µF) X5R + 100nF X7R
0805 + 0402
3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA.
R_en + C_en
BOM
R = 10kΩ to 3V3 + C = 1µF to GND
0402 / 0603
Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot.
R_boot + SW1
BOM
10kΩ Pull-up + BOOT button
0402 + SMD
Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download.
D_esd
BOM
USBLC6-2SC6 / LESD5D5.0CT1G
SOT-23-6 / SOD-523
ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20.
ESP32-S3-MINI-1-N8 / 1U-N4R2
Espressif
100% Drop-inSame 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping.

Technical Frequently Asked Questions (FAQ) — ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm)?

Manufactured by ESPRESSIF, the ESP32-C5-WROOM-1U-N16R8-V1.2 is housed in a SMD,21.2x18mm package with 32 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 3.0 ~ 3.6 V. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (3V3: Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 3 (EN: System Enable & Hardware Reset (EN)), 4 (IO2: Multiplexed I/O & Peripheral Pin IO2 (UART, SPI, I2C, ADC, SWD/JTAG)), 5 (IO3: Multiplexed I/O & Peripheral Pin IO3 (UART, I2C, ADC, SWD/JTAG)), 6 (IO0: Multiplexed I/O & Peripheral Pin IO0 (UART, RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for ESP32-C5-WROOM-1U-N16R8-V1.2?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-C5-WROOM-1U-N16R8-V1.2 (SMD,21.2x18mm) has a nominal body envelope of 18.00 × 21.20 mm, pitch e = 1.27 mm, and 40 copper pads plus a central exposed thermal pad (EPAD) of 4.70 × 4.70 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-C5-WROOM-1U-N16R8-V1.2?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-C5-WROOM-1U-N16R8-V1.2 (ESPRESSIF, SMD,21.2x18mm) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (32 pins) & ESP32-C5-WROOM Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
23V3Power_InPrimary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
3ENDigital_IOChip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.
4IO2Digital_IOSignal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTMS, GPIO2, I2C_SDA, ADC1_CH1, FSPIQ. Supported peripheral buses: UART, SPI, I2C, ADC, SWD/JTAG.
5IO3Digital_IOSignal terminal IO3 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDI, GPIO3, I2C_SCL, ADC1_CH2. Supported peripheral buses: UART, I2C, ADC, SWD/JTAG.
6IO0Digital_IOSignal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO0. Supported peripheral buses: UART, RTC/CLK.
7IO1Digital_IOSignal terminal IO1 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO1, ADC1_CH0. Supported peripheral buses: UART, ADC, RTC/CLK.
8IO6Digital_IOSignal terminal IO6 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO6, ADC1_CH5, FSPICLK. Supported peripheral buses: SPI, ADC.
9IO7Digital_IOSignal terminal IO7 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO7, FSPID. Supported peripheral buses: SPI.
10IO8Digital_IOSignal terminal IO8 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO8. Supported peripheral buses: General.
11IO9Digital_IOSignal terminal IO9 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO9. Supported peripheral buses: General.
12IO10Digital_IOSignal terminal IO10 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO10, FSPICS0. Supported peripheral buses: SPI.
13IO13Digital_IOSignal terminal IO13 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO13. Supported peripheral buses: USB.
14IO14Digital_IOSignal terminal IO14 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO14. Supported peripheral buses: USB.
15IO28Digital_IOSignal terminal IO28 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO28. Supported peripheral buses: General.
16IO5Digital_IOSignal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDO, GPIO5, ADC1_CH4, FSPIWP. Supported peripheral buses: UART, SPI, ADC, SWD/JTAG.
17IO4Digital_IOSignal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTCK, GPIO4, ADC1_CH3, FSPIHD. Supported peripheral buses: UART, SPI, ADC, SWD/JTAG.
18IO27Digital_IOSignal terminal IO27 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO27. Supported peripheral buses: General.
19NC/IO15Digital_IOSignal terminal NC/IO15 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPICS1, GPIO15. Supported peripheral buses: SPI.
20NCNCSignal terminal NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
21IO23Digital_IOSignal terminal IO23 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO23. Supported peripheral buses: General.
22NCNCSignal terminal NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
23IO24Digital_IOSignal terminal IO24 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO24. Supported peripheral buses: General.
24RX0Digital_IOSignal terminal RX0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0RXD, GPIO12. Supported peripheral buses: UART.
25TX0Digital_IOSignal terminal TX0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0TXD, GPIO11. Supported peripheral buses: UART.
26IO25Digital_IOSignal terminal IO25 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO25. Supported peripheral buses: General.
27IO26Digital_IOSignal terminal IO26 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO26. Supported peripheral buses: General.
28GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
29EPADGNDBottom exposed die attach pad (EPAD) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
30GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
314 ANT2RF_50OhmSignal terminal 4 ANT2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: 4 ANT2. Supported peripheral buses: General.
32GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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