Mechanical Dimensions & Land Pattern (LQFP-176_L24.0-W24.0-P0.50-BL)
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit LQFP-176_L24.0-W24.0-P0.50-BL | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — C481706 (LQFP-176_L24.0-W24.0-P0.50-BL)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of C481706 (LQFP-176_L24.0-W24.0-P0.50-BL)?
Manufactured by Semiconductor, the C481706 is housed in a LQFP-176_L24.0-W24.0-P0.50-BL package with 176 pins and a 0.50 mm lead pitch. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (GND: Ground Reference Pin (GND)), 3 (NCS0: Multiplexed I/O & Peripheral Pin NCS0 (General)), 4 (NCS1: Multiplexed I/O & Peripheral Pin NCS1 (General)), 5 (NCS2: Multiplexed I/O & Peripheral Pin NCS2 (General)), 6 (NCS3: Multiplexed I/O & Peripheral Pin NCS3 (General)).
What are the IPC-7351B PCB Footprint dimensions for C481706?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), C481706 (LQFP-176_L24.0-W24.0-P0.50-BL) has a nominal body envelope of 24.00 × 24.00 mm, pitch e = 0.50 mm, and 176 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for C481706?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for C481706 (Semiconductor, LQFP-176_L24.0-W24.0-P0.50-BL) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (176 pins) & C481706 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 2 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 3 | NCS0 | Digital_IO | Signal terminal NCS0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NCS0. Supported peripheral buses: General. |
| 4 | NCS1 | Digital_IO | Signal terminal NCS1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NCS1. Supported peripheral buses: General. |
| 5 | NCS2 | Digital_IO | Signal terminal NCS2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NCS2. Supported peripheral buses: General. |
| 6 | NCS3 | Digital_IO | Signal terminal NCS3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NCS3. Supported peripheral buses: General. |
| 7 | NLB/A0 | Digital_IO | Signal terminal NLB/A0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NLB/A0. Supported peripheral buses: General. |
| 8 | A1 | Digital_IO | Signal terminal A1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A1. Supported peripheral buses: General. |
| 9 | A2 | Digital_IO | Signal terminal A2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A2. Supported peripheral buses: General. |
| 10 | A3 | Digital_IO | Signal terminal A3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A3. Supported peripheral buses: General. |
| 11 | A4 | Digital_IO | Signal terminal A4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A4. Supported peripheral buses: General. |
| 12 | A5 | Digital_IO | Signal terminal A5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A5. Supported peripheral buses: General. |
| 13 | A6 | Digital_IO | Signal terminal A6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A6. Supported peripheral buses: General. |
| 14 | A7 | Digital_IO | Signal terminal A7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A7. Supported peripheral buses: General. |
| 15 | VDDIO | Power_In | Primary positive power supply input (VDDIO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 16 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 17 | A8 | Digital_IO | Signal terminal A8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A8. Supported peripheral buses: General. |
| 18 | A9 | Digital_IO | Signal terminal A9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A9. Supported peripheral buses: General. |
| 19 | A10 | Digital_IO | Signal terminal A10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A10. Supported peripheral buses: General. |
| 20 | A11 | Digital_IO | Signal terminal A11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A11. Supported peripheral buses: General. |
| 21 | A12 | Digital_IO | Signal terminal A12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A12. Supported peripheral buses: General. |
| 22 | A13 | Digital_IO | Signal terminal A13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A13. Supported peripheral buses: General. |
| 23 | A14 | Digital_IO | Signal terminal A14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A14. Supported peripheral buses: General. |
| 24 | A15 | Digital_IO | Signal terminal A15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A15. Supported peripheral buses: General. |
| 25 | A16 | Digital_IO | Signal terminal A16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A16. Supported peripheral buses: General. |
| 26 | A17 | Digital_IO | Signal terminal A17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A17. Supported peripheral buses: General. |
| 27 | A18 | Digital_IO | Signal terminal A18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A18. Supported peripheral buses: General. |
| 28 | A19 | Digital_IO | Signal terminal A19 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A19. Supported peripheral buses: General. |
| 29 | VDDIO | Power_In | Primary positive power supply input (VDDIO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 30 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 31 | A20 | Digital_IO | Signal terminal A20 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A20. Supported peripheral buses: General. |
| 32 | A21 | Digital_IO | Signal terminal A21 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A21. Supported peripheral buses: General. |
| 33 | A22 | Digital_IO | Signal terminal A22 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A22. Supported peripheral buses: General. |
| 34 | A23 | Digital_IO | Signal terminal A23 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A23. Supported peripheral buses: General. |
| 35 | D0 | Digital_IO | Signal terminal D0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D0. Supported peripheral buses: General. |
| 36 | D1 | Digital_IO | Signal terminal D1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D1. Supported peripheral buses: General. |
| 37 | D2 | Digital_IO | Signal terminal D2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D2. Supported peripheral buses: General. |
| 38 | D3 | Digital_IO | Signal terminal D3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D3. Supported peripheral buses: General. |
| 39 | D4 | Digital_IO | Signal terminal D4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D4. Supported peripheral buses: General. |
| 40 | D5 | Digital_IO | Signal terminal D5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D5. Supported peripheral buses: General. |
| 41 | D6 | Digital_IO | Signal terminal D6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D6. Supported peripheral buses: General. |
| 42 | D7 | Digital_IO | Signal terminal D7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D7. Supported peripheral buses: General. |
| 43 | VDDCORE | Power_In | Primary positive power supply input (VDDCORE) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 44 | VDDIO | Power_In | Primary positive power supply input (VDDIO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 45 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 46 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 47 | D8 | Digital_IO | Signal terminal D8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D8. Supported peripheral buses: General. |
| 48 | D9 | Digital_IO | Signal terminal D9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D9. Supported peripheral buses: General. |
| 49 | D10 | Digital_IO | Signal terminal D10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D10. Supported peripheral buses: General. |
| 50 | D11 | Digital_IO | Signal terminal D11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D11. Supported peripheral buses: General. |
| 51 | D12 | Digital_IO | Signal terminal D12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D12. Supported peripheral buses: General. |
| 52 | D13 | Digital_IO | Signal terminal D13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D13. Supported peripheral buses: General. |
| 53 | D14 | Digital_IO | Signal terminal D14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D14. Supported peripheral buses: General. |
| 54 | D15 | Digital_IO | Signal terminal D15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D15. Supported peripheral buses: General. |
| 55 | PB19/TCLK0 | Digital_IO | Signal terminal PB19/TCLK0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB19/TCLK0. Supported peripheral buses: General. |
| 56 | PB20/TIOA0 | Digital_IO | Signal terminal PB20/TIOA0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB20/TIOA0. Supported peripheral buses: General. |
| 57 | PB21/TIOB0 | Digital_IO | Signal terminal PB21/TIOB0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB21/TIOB0. Supported peripheral buses: General. |
| 58 | PB22/TCLK1 | Digital_IO | Signal terminal PB22/TCLK1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB22/TCLK1. Supported peripheral buses: General. |
| 59 | VDDIO | Power_In | Primary positive power supply input (VDDIO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 60 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 61 | PB23/TIOA1 | Digital_IO | Signal terminal PB23/TIOA1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB23/TIOA1. Supported peripheral buses: General. |
| 62 | PB24/TIOB1 | Digital_IO | Signal terminal PB24/TIOB1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB24/TIOB1. Supported peripheral buses: General. |
| 63 | PB25/TCLK2 | Digital_IO | Signal terminal PB25/TCLK2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB25/TCLK2. Supported peripheral buses: General. |
| 64 | PB26/TIOA2 | Digital_IO | Signal terminal PB26/TIOA2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB26/TIOA2. Supported peripheral buses: General. |
