STM32H7S7I8K6 (UFBGA-176(10x10)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of STM32H7S7I8K6 (UFBGA-176(10x10))?

Manufactured by ST, the STM32H7S7I8K6 is housed in a UFBGA-176(10x10) package with 201 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A3 (PB5: Multiplexed I/O & Peripheral Pin PB5 (General)), A4 (PF3: Multiplexed I/O & Peripheral Pin PF3 (General)), A5 (PF1: Multiplexed I/O & Peripheral Pin PF1 (General)), A6 (PD7: Multiplexed I/O & Peripheral Pin PD7 (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for STM32H7S7I8K6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H7S7I8K6 (UFBGA-176(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.65 mm, and 201 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H7S7I8K6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H7S7I8K6 (ST, UFBGA-176(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 10.00mm × 10.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (201/201)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
A1	VSS	GND	Ground Reference Pin (VSS)
A2	PB6	I/O	Multiplexed I/O & Peripheral Pin PB6 (General)
A3	PB5	I/O	Multiplexed I/O & Peripheral Pin PB5 (General)
A4	PF3	I/O	Multiplexed I/O & Peripheral Pin PF3 (General)
A5	PF1	I/O	Multiplexed I/O & Peripheral Pin PF1 (General)
A6	PD7	I/O	Multiplexed I/O & Peripheral Pin PD7 (General)
A7	PD5	I/O	Multiplexed I/O & Peripheral Pin PD5 (General)
A8	PM12	I/O	Multiplexed I/O & Peripheral Pin PM12 (General)
A9	PM14	I/O	Multiplexed I/O & Peripheral Pin PM14 (General)
A10	PM6	I/O	Multiplexed I/O & Peripheral Pin PM6 (General)
A11	PM8	I/O	Multiplexed I/O & Peripheral Pin PM8 (General)
A12	PM3	I/O	Multiplexed I/O & Peripheral Pin PM3 (General)
A13	PD4	I/O	Multiplexed I/O & Peripheral Pin PD4 (General)
A14	PE15	I/O	Multiplexed I/O & Peripheral Pin PE15 (General)
A15	VSS	GND	Ground Reference Pin (VSS)
B1	PB8	I/O	Multiplexed I/O & Peripheral Pin PB8 (General)
B2	PE1	I/O	Multiplexed I/O & Peripheral Pin PE1 (General)
B3	PE2	I/O	Multiplexed I/O & Peripheral Pin PE2 (General)
B4	PB3	I/O	Multiplexed I/O & Peripheral Pin PB3 (General)
B5	PF4	I/O	Multiplexed I/O & Peripheral Pin PF4 (General)
B6	PF0	I/O	Multiplexed I/O & Peripheral Pin PF0 (General)
B7	PD6	I/O	Multiplexed I/O & Peripheral Pin PD6 (General)
B8	PM11	I/O	Multiplexed I/O & Peripheral Pin PM11 (General)
B9	PM9	I/O	Multiplexed I/O & Peripheral Pin PM9 (General)
B10	PM5	I/O	Multiplexed I/O & Peripheral Pin PM5 (General)
B11	VDD50USB	Power	Power Supply Input (VDD50USB — 3.3V VDD (Max 4.0V))
B12	PM1	I/O	Multiplexed I/O & Peripheral Pin PM1 (General)
B13	PG0	I/O	Multiplexed I/O & Peripheral Pin PG0 (General)
B14	PE13	I/O	Multiplexed I/O & Peripheral Pin PE13 (General)
B15	PE11	I/O	Multiplexed I/O & Peripheral Pin PE11 (General)
C1	VBAT	Power	Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C2	PB9	I/O	Multiplexed I/O & Peripheral Pin PB9 (UART, SPI, I2C)
C3	PB7	I/O	Multiplexed I/O & Peripheral Pin PB7 (General)
C4	PE0	I/O	Multiplexed I/O & Peripheral Pin PE0 (General)
C5	PB4	I/O	Multiplexed I/O & Peripheral Pin PB4 (General)
C6	PF2	I/O	Multiplexed I/O & Peripheral Pin PF2 (General)
C7	BOOT0	I	Input-Only Pin BOOT0 (General)
C8	PM13	I/O	Multiplexed I/O & Peripheral Pin PM13 (General)
C9	DVDD	Power	Power Supply Input (DVDD — 3.3V VDD (Max 4.0V))
C10	VSSUSB	GND	Ground Reference Pin (VSSUSB)
C11	PM2	I/O	Multiplexed I/O & Peripheral Pin PM2 (General)
C12	PM0	I/O	Multiplexed I/O & Peripheral Pin PM0 (General)
C13	PE14	I/O	Multiplexed I/O & Peripheral Pin PE14 (General)
C14	PE12	I/O	Multiplexed I/O & Peripheral Pin PE12 (General)
C15	PD1	I/O	Multiplexed I/O & Peripheral Pin PD1 (General)
D1	IOD1	I/O	General Purpose Digital I/O Pin IOD1
D2	VSS	GND	Ground Reference Pin (VSS)
D3	PC13	I/O	Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
D4	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
D5	VSS	GND	Ground Reference Pin (VSS)
D6	VSS	GND	Ground Reference Pin (VSS)
D7	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
D8	VSS	GND	Ground Reference Pin (VSS)
D9	VDD33USB	Power	Power Supply Input (VDD33USB — 3.3V VDD (Max 4.0V))
D10	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
D11	VSS	GND	Ground Reference Pin (VSS)
D12	PD3	I/O	Multiplexed I/O & Peripheral Pin PD3 (General)
D13	PD2	I/O	Multiplexed I/O & Peripheral Pin PD2 (General)
D14	PD0	I/O	Multiplexed I/O & Peripheral Pin PD0 (General)
D15	PC12	I/O	Multiplexed I/O & Peripheral Pin PC12 (General)
E1	VSS	GND	Ground Reference Pin (VSS)
E2	IOE2	I/O	General Purpose Digital I/O Pin IOE2
E3	VSS	GND	Ground Reference Pin (VSS)
E4	VSS	GND	Ground Reference Pin (VSS)
E12	VSS	GND	Ground Reference Pin (VSS)
E13	PC11	I/O	Multiplexed I/O & Peripheral Pin PC11 (General)
E14	PC10	I/O	Multiplexed I/O & Peripheral Pin PC10 (General)
E15	PA15	I/O	Multiplexed I/O & Peripheral Pin PA15 (General)
F1	PE5	I/O	Multiplexed I/O & Peripheral Pin PE5 (SPI)
F2	PE3	I/O	Multiplexed I/O & Peripheral Pin PE3 (General)
F3	PE4	I/O	Multiplexed I/O & Peripheral Pin PE4 (SPI)
F4	VSS	GND	Ground Reference Pin (VSS)
F6	VCAP4	I/O	Multiplexed I/O & Peripheral Pin VCAP4 (General)
F7	VSS	GND	Ground Reference Pin (VSS)
F8	VSS	GND	Ground Reference Pin (VSS)
F9	VSS	GND	Ground Reference Pin (VSS)
F10	VSS	GND	Ground Reference Pin (VSS)
F12	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
F13	PA14	I/O	Multiplexed I/O & Peripheral Pin PA14 (General)
F14	PA12	I/O	Multiplexed I/O & Peripheral Pin PA12 (UART, SPI)
F15	PA13(JTMS/ SWDIO)	I/O	Multiplexed I/O & Peripheral Pin PA13(JTMS/ SWDIO) (SWD/JTAG)
G1	VSSSMPS	GND	Ground Reference Pin (VSSSMPS)
G2	VLXSMPS	I/O	Multiplexed I/O & Peripheral Pin VLXSMPS (General)
G3	PE6	I/O	Multiplexed I/O & Peripheral Pin PE6 (General)
G4	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
G6	VSS	GND	Ground Reference Pin (VSS)
G7	VDDLDO	Power	Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
G8	VSS	GND	Ground Reference Pin (VSS)
G9	VDDLDO	Power	Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
G10	VCAP3	I/O	Multiplexed I/O & Peripheral Pin VCAP3 (General)
G12	VSS	GND	Ground Reference Pin (VSS)
G13	PA10	I/O	Multiplexed I/O & Peripheral Pin PA10 (PWM)
G14	PA8	I/O	Multiplexed I/O & Peripheral Pin PA8 (I2C, RTC/CLK)
G15	PA11	I/O	Multiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
H1	VFBSMPS	I/O	Multiplexed I/O & Peripheral Pin VFBSMPS (General)
H2	VDDSMPS	Power	Power Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
H3	PF5	I/O	Multiplexed I/O & Peripheral Pin PF5 (General)
H4	VSS	GND	Ground Reference Pin (VSS)
H6	VSS	GND	Ground Reference Pin (VSS)
H7	VSS	GND	Ground Reference Pin (VSS)
H8	VDDLDO	Power	Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
H9	VSS	GND	Ground Reference Pin (VSS)
H10	VSS	GND	Ground Reference Pin (VSS)
H12	VSS	GND	Ground Reference Pin (VSS)
H13	VSS	GND	Ground Reference Pin (VSS)
H14	PC9	I/O	Multiplexed I/O & Peripheral Pin PC9 (UART, I2C, RTC/CLK)
H15	PA9	I/O	Multiplexed I/O & Peripheral Pin PA9 (SPI, I2C, PWM)
J1	PF6	I/O	Multiplexed I/O & Peripheral Pin PF6 (General)
J2	PF8	I/O	Multiplexed I/O & Peripheral Pin PF8 (UART, SPI)
J3	PF7	I/O	Multiplexed I/O & Peripheral Pin PF7 (General)
J4	VSS	GND	Ground Reference Pin (VSS)
J6	VSS	GND	Ground Reference Pin (VSS)
J7	VDDLDO	Power	Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
J8	VSS	GND	Ground Reference Pin (VSS)
J9	VDDLDO	Power	Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
J10	VSS	GND	Ground Reference Pin (VSS)
J12	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
J13	PC6	I/O	Multiplexed I/O & Peripheral Pin PC6 (PWM)
J14	PC7	I/O	Multiplexed I/O & Peripheral Pin PC7 (PWM)
J15	PC8	I/O	Multiplexed I/O & Peripheral Pin PC8 (UART, I2C)
K1	PF10	I/O	Multiplexed I/O & Peripheral Pin PF10 (General)
K2	PF9	I/O	Multiplexed I/O & Peripheral Pin PF9 (General)
K3	VSS	GND	Ground Reference Pin (VSS)
K4	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
K6	VSS	GND	Ground Reference Pin (VSS)
K7	VCAP1	I/O	Multiplexed I/O & Peripheral Pin VCAP1 (General)
K8	VSS	GND	Ground Reference Pin (VSS)
K9	VDDXSPI1	Power	Power Supply Input (VDDXSPI1 — 3.3V VDD (Max 4.0V))
K10	VCAP2	I/O	Multiplexed I/O & Peripheral Pin VCAP2 (General)
K12	VSS	GND	Ground Reference Pin (VSS)
K13	PD14	I/O	Multiplexed I/O & Peripheral Pin PD14 (UART)
K14	PD15	I/O	Multiplexed I/O & Peripheral Pin PD15 (UART, PWM)
K15	PB15	I/O	Multiplexed I/O & Peripheral Pin PB15 (UART, SPI, RTC/CLK)
L1	VSS	GND	Ground Reference Pin (VSS)
L2	PH0 - OSC IN(PH_ 0)	I/O	Multiplexed I/O & Peripheral Pin PH0 - OSC IN(PH_ 0) (RTC/CLK)
L3	VSS	GND	Ground Reference Pin (VSS)
L4	VSSA	GND	Ground Reference Pin (VSSA)
L12	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
L13	PB12	I/O	Multiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
L14	PB14	I/O	Multiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
L15	PB13	I/O	Multiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
M1	PH1 - OSC OUT(_ PH1)	I/O	Multiplexed I/O & Peripheral Pin PH1 - OSC OUT(_ PH1) (RTC/CLK)
M2	NRST	I	System Enable & Hardware Reset (NRST)
M3	VREFP	Analog	Multiplexed I/O & Peripheral Pin VREFP (General)
M4	VDDA	Power	Power Supply Input (VDDA — 3.3V VDD (Max 4.0V))
M5	PA4	I/O	Multiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC)
M6	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
M7	PG6	I/O	Multiplexed I/O & Peripheral Pin PG6 (General)
M8	VDDXSPI1	Power	Power Supply Input (VDDXSPI1 — 3.3V VDD (Max 4.0V))
M9	VSS	GND	Ground Reference Pin (VSS)
M10	VDDXSPI1	Power	Power Supply Input (VDDXSPI1 — 3.3V VDD (Max 4.0V))
M11	VSS	GND	Ground Reference Pin (VSS)
M12	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
M13	PD12	I/O	Multiplexed I/O & Peripheral Pin PD12 (UART)
M14	PB10	I/O	Multiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
M15	PB11	I/O	Multiplexed I/O & Peripheral Pin PB11 (I2C, PWM)
N1	PC0	I/O	Multiplexed I/O & Peripheral Pin PC0 (ADC)
N2	PC3	I/O	Multiplexed I/O & Peripheral Pin PC3 (SPI, ADC, PWM)
N3	VREFM	Analog	Multiplexed I/O & Peripheral Pin VREFM (General)
N4	PA3	I/O	Multiplexed I/O & Peripheral Pin PA3 (UART, SPI, ADC, PWM)
N5	PA7	I/O	Multiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
N6	PG4	I/O	Multiplexed I/O & Peripheral Pin PG4 (UART)
N7	PG7	I/O	Multiplexed I/O & Peripheral Pin PG7 (General)
N8	PE9	I/O	Multiplexed I/O & Peripheral Pin PE9 (UART, PWM)
N9	PE10	I/O	Multiplexed I/O & Peripheral Pin PE10 (PWM)
N10	VSS	GND	Ground Reference Pin (VSS)
N11	PP5	I/O	Multiplexed I/O & Peripheral Pin PP5 (General)
N12	PD8	I/O	Multiplexed I/O & Peripheral Pin PD8 (UART)
N13	PD10	I/O	Multiplexed I/O & Peripheral Pin PD10 (SPI, PWM)
N14	PD11	I/O	Multiplexed I/O & Peripheral Pin PD11 (UART)
N15	PD13	I/O	Multiplexed I/O & Peripheral Pin PD13 (SPI)
P1	PC1	I/O	Multiplexed I/O & Peripheral Pin PC1 (SPI, ADC)
P2	PC2	I/O	Multiplexed I/O & Peripheral Pin PC2 (SPI, ADC, PWM)
P3	PA1	I/O	Multiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
P4	PA5	I/O	Multiplexed I/O & Peripheral Pin PA5 (SPI, ADC)
P5	PC4	I/O	Multiplexed I/O & Peripheral Pin PC4 (UART, ADC)
P6	PG5	I/O	Multiplexed I/O & Peripheral Pin PG5 (UART)
P7	PG8	I/O	Multiplexed I/O & Peripheral Pin PG8 (SPI)
P8	PE7	I/O	Multiplexed I/O & Peripheral Pin PE7 (General)
P9	PO1	I/O	Multiplexed I/O & Peripheral Pin PO1 (General)
P10	PP2	I/O	Multiplexed I/O & Peripheral Pin PP2 (General)
P11	PO5	I/O	Multiplexed I/O & Peripheral Pin PO5 (General)
P12	PP6	I/O	Multiplexed I/O & Peripheral Pin PP6 (General)
P13	PP7	I/O	Multiplexed I/O & Peripheral Pin PP7 (General)
P14	PO0	I/O	Multiplexed I/O & Peripheral Pin PO0 (General)
P15	PD9	I/O	Multiplexed I/O & Peripheral Pin PD9 (UART)
R1	VSS	GND	Ground Reference Pin (VSS)
R2	PA0	I/O	Multiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC, PWM)
R3	PA2	I/O	Multiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
R4	PA6	I/O	Multiplexed I/O & Peripheral Pin PA6 (SPI, ADC, PWM)
R5	PC5	I/O	Multiplexed I/O & Peripheral Pin PC5 (UART, ADC)
R6	PB1	I/O	Multiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
R7	PF11	I/O	Multiplexed I/O & Peripheral Pin PF11 (SPI, ADC)
R8	PE8	I/O	Multiplexed I/O & Peripheral Pin PE8 (PWM)
R9	PP4	I/O	Multiplexed I/O & Peripheral Pin PP4 (General)
R10	PP3	I/O	Multiplexed I/O & Peripheral Pin PP3 (General)
R11	PO4	I/O	Multiplexed I/O & Peripheral Pin PO4 (General)
R12	PP0	I/O	Multiplexed I/O & Peripheral Pin PP0 (General)
R13	PO2	I/O	Multiplexed I/O & Peripheral Pin PO2 (General)
R14	PP1	I/O	Multiplexed I/O & Peripheral Pin PP1 (General)
R15	VSS	GND	Ground Reference Pin (VSS)

PIN A1 VSS

GND

Ground Reference Pin (VSS)

Design note: 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.

IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

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PDF VIEWEROfficial Datasheet Document: STM32H7S7I8K6 (ST · UFBGA-176(10x10))

Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below

1. Realistic 3D PackageREPRESENTATIVE

STM32H7S7I8K6 (UFBGA-176(10x10)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

STM32H7S7I8K6 (UFBGA-176(10x10)) - 2. Standard Pinout (Top View)

True package pinout (201 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

STM32H7S7I8K6 (UFBGA-176(10x10)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

STM32H7S7I8K6 (UFBGA-176(10x10)) - 4. Package Dimensions (D×E×A)

UFBGA-176(10x10) · 10.00×10.00mm · Pitch 0.65mmExpand ›

5. Recommended Land PatternLAND PATTERN

STM32H7S7I8K6 (UFBGA-176(10x10)) - 5. Recommended Land Pattern

IPC-7351B Footprint (201 Pads)Expand ›

6. Application SchematicSCHEMATIC

STM32H7S7I8K6 (UFBGA-176(10x10)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)

Showing 1–9 of 9 uncropped original figures for STM32H7S7L8H / STM32H7S3I8T / STM32H7S3Z8T

P81 · p81_fig01EXACT PACKAGE

Figure 11. UFBGA176 SMPS pinout(a)

P1 · p01_fig01881×841px

• 64 Kbytes of user flash memory that can be used for user code and/or external memory configuration.

P76 · p76_fig011751×1342px

Figure 6. TFBGA100 SMPS pinout(a)

P153 · p153_fig011619×2259px

Figure 23. Power supply scheme

P195 · p195_fig011546×500px

Figure 35. Typical application with an 8 MHz crystal

P196 · p196_fig011546×516px

Figure 36. Typical application with a 32.768 kHz crystal

P295 · p295_fig011546×1290px

Figure 84. TFBGA100 - Recommended footprint

P301 · p301_fig011546×1295px

Figure 88. UFBGA144 - Recommended footprint

P314 · p314_fig011546×1305px

Figure 97. UFBGA(176+25) - Recommended footprint

Technical Specifications & Part Details (STM32H7S7I8K6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Embedded Microcontroller Unit (MCU)

Detailed Overview:STM32H7S7I8K6 (UFBGA-176(10x10)) is a 176-pin embedded microcontroller unit (mcu) featuring a 10.00 × 10.00 × 0.60 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, SDIO, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.

Operating Supply VoltageV_CC / V_DD

1.71 V to 3.6 V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C ~ +85°C (Industrial Grade)

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

600 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

75 5V-tolerant (FT) pins detected

Package Envelope (D × E × A)D × E × A

10.00 × 10.00 × 0.60 mm (A1=0.20 mm)

Package family: BGA (UFBGA-176(10x10))

Pin Count & Lead PitchN / e

176 Pins | Pitch e = 0.65 mm (25.6 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

USB, UART, SPI, I2C, I2S, ADC, SDIO, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol201 auto-grouped pins

IPC-7351B Land Pattern201 pads · Pitch 0.65mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-176(10x10))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

10.00 × 10.00 mm

Height (A) & Pitch (e)IPC-7351B

A=0.60mm · e=0.65mm

Pad Size (W × L)Level B

0.25 × 0.25 mm

Pins / Total PadsTopology

201P / 201Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit UFBGA-176(10x10)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H7S7I8K6 (UFBGA-176(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H7S7I8K6 (UFBGA-176(10x10))?

Manufactured by ST, the STM32H7S7I8K6 is housed in a UFBGA-176(10x10) package with 201 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A3 (PB5: Multiplexed I/O & Peripheral Pin PB5 (General)), A4 (PF3: Multiplexed I/O & Peripheral Pin PF3 (General)), A5 (PF1: Multiplexed I/O & Peripheral Pin PF1 (General)), A6 (PD7: Multiplexed I/O & Peripheral Pin PD7 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32H7S7I8K6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H7S7I8K6 (UFBGA-176(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.65 mm, and 201 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H7S7I8K6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H7S7I8K6 (ST, UFBGA-176(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (201 pins) & STM32H7S7L8H / STM32H7S3I8T / STM32H7S3Z8T Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
A1	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A2	PB6	Digital_IO	Signal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
A3	PB5	Digital_IO	Signal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
A4	PF3	Digital_IO	Signal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
A5	PF1	Digital_IO	Signal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
A6	PD7	Digital_IO	Signal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
A7	PD5	Digital_IO	Signal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
A8	PM12	Digital_IO	Signal terminal PM12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM12. Supported peripheral buses: General.
A9	PM14	Digital_IO	Signal terminal PM14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM14. Supported peripheral buses: General.
A10	PM6	Digital_IO	Signal terminal PM6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM6. Supported peripheral buses: General.
A11	PM8	Digital_IO	Signal terminal PM8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM8. Supported peripheral buses: General.
A12	PM3	Digital_IO	Signal terminal PM3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM3. Supported peripheral buses: General.
A13	PD4	Digital_IO	Signal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
A14	PE15	Digital_IO	Signal terminal PE15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
A15	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B1	PB8	Digital_IO	Signal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B2	PE1	Digital_IO	Signal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
B3	PE2	Digital_IO	Signal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
B4	PB3	Digital_IO	Signal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
B5	PF4	Digital_IO	Signal terminal PF4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
B6	PF0	Digital_IO	Signal terminal PF0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: General.
B7	PD6	Digital_IO	Signal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
B8	PM11	Digital_IO	Signal terminal PM11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM11. Supported peripheral buses: General.
B9	PM9	Digital_IO	Signal terminal PM9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM9. Supported peripheral buses: General.
B10	PM5	Digital_IO	Signal terminal PM5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM5. Supported peripheral buses: General.
B11	VDD50USB	Power_In	Primary positive power supply input (VDD50USB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B12	PM1	Digital_IO	Signal terminal PM1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM1. Supported peripheral buses: General.
B13	PG0	Digital_IO	Signal terminal PG0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
B14	PE13	Digital_IO	Signal terminal PE13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
B15	PE11	Digital_IO	Signal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
C1	VBAT	Power_In	Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C2	PB9	Digital_IO	Signal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI2_NSS. Supported peripheral buses: UART, SPI, I2C.
C3	PB7	Digital_IO	Signal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
C4	PE0	Digital_IO	Signal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
C5	PB4	Digital_IO	Signal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
C6	PF2	Digital_IO	Signal terminal PF2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
C7	BOOT0	Digital_IO	Signal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
C8	PM13	Digital_IO	Signal terminal PM13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM13. Supported peripheral buses: General.
C9	DVDD	Power_In	Primary positive power supply input (DVDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C10	VSSUSB	GND	0V electrical ground return terminal (VSSUSB) for internal core logic, I/O drivers, and analog sub-blocks.
C11	PM2	Digital_IO	Signal terminal PM2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM2. Supported peripheral buses: General.
C12	PM0	Digital_IO	Signal terminal PM0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM0. Supported peripheral buses: General.
C13	PE14	Digital_IO	Signal terminal PE14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
C14	PE12	Digital_IO	Signal terminal PE12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
C15	PD1	Digital_IO	Signal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
D1	IOD1	Digital_IO	General Purpose Digital I/O Pin IOD1
D2	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D3	PC13	Digital_IO	Signal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
D4	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D5	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D6	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D7	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D8	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D9	VDD33USB	Power_In	Primary positive power supply input (VDD33USB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D10	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D11	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D12	PD3	Digital_IO	Signal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
D13	PD2	Digital_IO	Signal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
D14	PD0	Digital_IO	Signal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
D15	PC12	Digital_IO	Signal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
E1	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E2	IOE2	Digital_IO	General Purpose Digital I/O Pin IOE2
E3	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E4	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.

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