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STM32U083MCT6 (LQFP-80(12x12)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32U083MCT6

STID: C22445366LQFP-80(12x12) · 80 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32U083MCT6 (LQFP-80(12x12))1VSS2VDD3VBAT4PC135PC14-OSC32IN6PC15-OSC32OU7PF0-OSCIN8PF1-OSCOUT9PF2-NRST10PC011PC112PC213PC314VSSA/VREF-15VREF+16VDDA17PA018PA119PA220PA321VSS22VDD23PA424PA525PA626PA727PC428PC529PB030PB131PB232PE733PE834PE935PB1036PB1137VSS38VDD39PB1240PB1380PB979PB878PF3-BOOT0 (B77PB776PB675PB574PB473PB372PD671PD570PD469PD368PD267PD166PD065PC1264PC1163PC1062PA1561PA14(SWCLK)60VDDUSB59VSS58PA13(SWDIO)57PA12[PA10]56PA11[PA9]55PA1054PA953PA852PC951PC850PC749PC648PD1347PD1246PD1145PD1044PD943PD842PB1541PB14Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.855.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980E=12.00mm · Pitch e=0.50mmD=12.00mm-11-9-7-5-3-113579111197531-1-3-5-7-9-11mm
3. 3D CAD MODEL
Package Body: 12.00mm × 12.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (80/80)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VSSGNDGround Reference Pin (VSS)
2VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
3VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
4PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
5PC14-OSC32INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32IN (RTC/CLK)
6PC15-OSC32OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32OUT (RTC/CLK)
7PF0-OSCINI/OMultiplexed I/O & Peripheral Pin PF0-OSCIN (RTC/CLK)
8PF1-OSCOUTI/OMultiplexed I/O & Peripheral Pin PF1-OSCOUT (RTC/CLK)
9PF2-NRSTI/OMultiplexed I/O & Peripheral Pin PF2-NRST (RTC/CLK)
10PC0I/OMultiplexed I/O & Peripheral Pin PC0 (I2C, ADC)
11PC1I/OMultiplexed I/O & Peripheral Pin PC1 (I2C, ADC)
12PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC, RTC/CLK)
13PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
14VSSA/VREF-GNDGround Reference Pin (VSSA/VREF-)
15VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
16VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
17PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC)
18PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, ADC)
19PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART)
20PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC)
21VSSGNDGround Reference Pin (VSS)
22VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
23PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC)
24PA5I/OMultiplexed I/O & Peripheral Pin PA5 (UART, SPI, ADC)
25PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, I2C, ADC)
26PA7I/OMultiplexed I/O & Peripheral Pin PA7 (I2C, ADC)
27PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART)
28PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART)
29PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC)
30PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART)
31PB2I/OMultiplexed I/O & Peripheral Pin PB2 (RTC/CLK)
32PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
33PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
34PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
35PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, I2C)
36PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C)
37VSSGNDGround Reference Pin (VSS)
38VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
39PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI)
40PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C)
41PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C)
42PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, RTC/CLK)
43PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
44PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
45PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART)
46PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART)
47PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C)
48PD13I/OMultiplexed I/O & Peripheral Pin PD13 (I2C)
49PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
50PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
51PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
52PC9I/OMultiplexed I/O & Peripheral Pin PC9 (USB)
53PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, RTC/CLK)
54PA9I/OMultiplexed I/O & Peripheral Pin PA9 (I2C, RTC/CLK)
55PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, I2C, RTC/CLK)
56PA11[PA9]I/OMultiplexed I/O & Peripheral Pin PA11[PA9] (USB, SPI)
57PA12[PA10]I/OMultiplexed I/O & Peripheral Pin PA12[PA10] (USB, SPI)
58PA13(SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(SWDIO) (USB, SWD/JTAG)
59VSSGNDGround Reference Pin (VSS)
60VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
61PA14(SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14(SWCLK) (SWD/JTAG)
62PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI)
63PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
64PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
65PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
66PD0I/OMultiplexed I/O & Peripheral Pin PD0 (SPI)
67PD1I/OMultiplexed I/O & Peripheral Pin PD1 (SPI)
68PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
69PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
70PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, SPI)
71PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
72PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART)
73PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, I2C)
74PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI, I2C)
75PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI)
76PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C)
77PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
78PF3-BOOT0 (BOOT0)I/OMultiplexed I/O & Peripheral Pin PF3-BOOT0 (BOOT0) (General)
79PB8I/OMultiplexed I/O & Peripheral Pin PB8 (I2C)
80PB9I/OMultiplexed I/O & Peripheral Pin PB9 (UART, I2C)
PIN 1 VSS
GND
Ground Reference Pin (VSS)
Design note: 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32U083MCT6 (ST · LQFP-80(12x12))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32U083MCT6 (LQFP-80(12x12)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32U083MCT6 (LQFP-80(12x12)) - 2. Standard Pinout (Top View)
True package pinout (80 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32U083MCT6 (LQFP-80(12x12)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32U083MCT6 (LQFP-80(12x12)) - 4. Package Dimensions (D×E×A)
LQFP-80(12x12) · 12.00×12.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32U083MCT6 (LQFP-80(12x12)) - 5. Recommended Land Pattern
IPC-7351B Footprint (80 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32U083MCT6 (LQFP-80(12x12)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for STM32U083
P1 · p01_fig01EXACT PACKAGE
STM32U083MCT6 (LQFP-80(12x12)) — Kbyte SRAM, USB, LCD, AES
Kbyte SRAM, USB, LCD, AES
P30 · p30_fig01EXACT PACKAGE
STM32U083MCT6 (LQFP-80(12x12)) — Figure 9. LQFP80 pinout
Figure 9. LQFP80 pinout
P128 · p128_fig01EXACT PACKAGE
STM32U083MCT6 (LQFP-80(12x12)) — Figure 47. LQFP80 - Outline(15.)
Figure 47. LQFP80 - Outline(15.)
P130 · p130_fig01EXACT PACKAGE
STM32U083MCT6 (LQFP-80(12x12)) — Figure 48. LQFP80 - Footprint example
Figure 48. LQFP80 - Footprint example
P1 · p01_fig02897×522px
STM32U083MCT6 (LQFP-80(12x12)) — • 1-Kbyte instruction cache allowing 0-wait-state execution from flash memory
• 1-Kbyte instruction cache allowing 0-wait-state execution from flash memory
P1 · p01_fig02P1
STM32U083MCT6 (LQFP-80(12x12)) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P30 · p30_fig021065×680px
STM32U083MCT6 (LQFP-80(12x12)) — Figure 10. UFBGA81 ballout
Figure 10. UFBGA81 ballout
P30 · p30_fig01P30
STM32U083MCT6 (LQFP-80(12x12)) — Datasheet Page 30 (p30_fig01)
Datasheet Page 30 (p30_fig01)
P42 · p42_fig011278×1130px
STM32U083MCT6 (LQFP-80(12x12)) — Figure 13. Power supply scheme
Figure 13. Power supply scheme
P72 · p72_fig011432×512px
STM32U083MCT6 (LQFP-80(12x12)) — Figure 18. Typical application with an 8 MHz crystal
Figure 18. Typical application with an 8 MHz crystal
P93 · p93_fig01908×757px
STM32U083MCT6 (LQFP-80(12x12)) — Figure 26. ADC accuracy characteristics
Figure 26. ADC accuracy characteristics
P93 · p93_fig021603×614px
STM32U083MCT6 (LQFP-80(12x12)) — Figure 27. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch
Figure 27. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (STM32U083MCT6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32U083MCT6 (LQFP-80(12x12)) is a 80-pin embedded microcontroller unit (mcu) featuring a 12.00 × 12.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
56 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
65 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
12.00 × 12.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-80(12x12))
Pin Count & Lead PitchN / e
80 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PF3-BOOT0 (BOOT0)): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol80 auto-grouped pins
OK
IPC-7351B Land Pattern80 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-80(12x12))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
12.00 × 12.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.28 × 1.25 mm
Pins / Total PadsTopology
80P / 80Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-80(12x12)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32U083MCT6 (LQFP-80(12x12))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32U083MCT6 (LQFP-80(12x12))?

Manufactured by ST, the STM32U083MCT6 is housed in a LQFP-80(12x12) package with 80 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (VSS: Ground Reference Pin (VSS)), 2 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), 3 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 4 (PC13: Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK)), 5 (PC14-OSC32IN: Multiplexed I/O & Peripheral Pin PC14-OSC32IN (RTC/CLK)), 6 (PC15-OSC32OUT: Multiplexed I/O & Peripheral Pin PC15-OSC32OUT (RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32U083MCT6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32U083MCT6 (LQFP-80(12x12)) has a nominal body envelope of 12.00 × 12.00 mm, pitch e = 0.50 mm, and 80 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32U083MCT6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32U083MCT6 (ST, LQFP-80(12x12)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (80 pins) & STM32U083 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
2VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
3VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
4PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
5PC14-OSC32INDigital_IOSignal terminal PC14-OSC32IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14-OSC32IN. Supported peripheral buses: RTC/CLK.
6PC15-OSC32OUTDigital_IOSignal terminal PC15-OSC32OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15-OSC32OUT. Supported peripheral buses: RTC/CLK.
7PF0-OSCINDigital_IOSignal terminal PF0-OSCIN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0-OSCIN. Supported peripheral buses: RTC/CLK.
8PF1-OSCOUTDigital_IOSignal terminal PF1-OSCOUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1-OSCOUT. Supported peripheral buses: RTC/CLK.
9PF2-NRSTDigital_IOSignal terminal PF2-NRST (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2-NRST. Supported peripheral buses: RTC/CLK.
10PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SCL. Supported peripheral buses: I2C, ADC.
11PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: I2C, ADC.
12PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, ADC, RTC/CLK.
13PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: SPI, ADC.
14VSSA/VREF-GND0V electrical ground return terminal (VSSA/VREF-) for internal core logic, I/O drivers, and analog sub-blocks.
15VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
16VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
17PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC.
18PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK_SPI2SCKUSART2. Supported peripheral buses: UART, SPI, ADC.
19PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART.
20PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC.
21VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
22VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
23PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC.
24PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK_USART3TXLPUART3. Supported peripheral buses: UART, SPI, ADC.
25PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: UART, I2C, ADC.
26PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: I2C, ADC.
27PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART.
28PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART.
29PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: UART, SPI, ADC.
30PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART.
31PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: RTC/CLK.
32PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
33PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
34PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General.
35PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: UART, I2C.
36PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SDA. Supported peripheral buses: UART, I2C.
37VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
38VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
39PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS_USART3CKLPUART1. Supported peripheral buses: UART, SPI.
40PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: UART, SPI, I2C.
41PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: UART, SPI, I2C.
42PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: SPI, RTC/CLK.
43PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: UART.
44PD9Digital_IOSignal terminal PD9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD9. Supported peripheral buses: UART.
45PD10Digital_IOSignal terminal PD10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD10. Supported peripheral buses: UART.
46PD11Digital_IOSignal terminal PD11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD11. Supported peripheral buses: UART.
47PD12Digital_IOSignal terminal PD12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SCL. Supported peripheral buses: UART, I2C.
48PD13Digital_IOSignal terminal PD13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SDA. Supported peripheral buses: I2C.
49PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
50PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
51PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
52PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: USB.
53PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, RTC/CLK.
54PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL, I2C2_SCL. Supported peripheral buses: I2C, RTC/CLK.
55PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART, I2C, RTC/CLK.
56PA11[PA9]Digital_IOSignal terminal PA11[PA9] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO_SPI2MISOUSART1, USB_DM. Supported peripheral buses: USB, SPI.
57PA12[PA10]Digital_IOSignal terminal PA12[PA10] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI_SPI2MOSIUSART1, USB_DP. Supported peripheral buses: USB, SPI.
58PA13(SWDIO)Digital_IOSignal terminal PA13(SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13(SWDIO). Supported peripheral buses: USB, SWD/JTAG.
59VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
60VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
61PA14(SWCLK)Digital_IOSignal terminal PA14(SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14(SWCLK). Supported peripheral buses: SWD/JTAG.
62PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_NSS. Supported peripheral buses: UART, SPI.
63PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK_USART3TXUSART4TX. Supported peripheral buses: UART, SPI.
64PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO_USART3RXUSART4RX. Supported peripheral buses: UART, SPI.
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