STM32H563IIK3Q (UFBGA-201(10x10)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32H563IIK3Q

STID: C22382281UFBGA-201(10x10) · 201 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32H563IIK3Q (UFBGA-201(10x10))A1PI7A2PI5A3VCAPA4PB9A5BOOT0A6PB5A7PG15A8PG13A9PG10A10PD7A11PD5A12PD3A13PD1A14PI3A15PI1B1VBATB2PE3B3PI4B4PE1B5PB8B6PB6B7PB3B8PG12B9PG9B10PD6B11PD4B12PD0B13PA14B14PI2B15PH13C1VSSC2PE6C3PE4C4PI6C5PE0C6PB7C7PB4C8PG13C9PG11C10PD2C11PC12C12PC11C13PA15C14PH15C15PA12D1PC15-OSC32_OD2PC14-OSC32_ID3PE5D4PE2D5VDDD6VSSD7VDDIO2D8VDDD9VSSD10VDDD11VSSD12PC10D13PH14D14VSSD15PA11E1PI9E2PI8E3PC13E4VDDE12VDDE13PA13E14PA10E15PA9F1PF1F2PF0F3PI11F4PI10F6VSSF7VSSF8VSSF9VSSF10VSSF12VDD33USBF13PC9F14PC8F15PA8G1PF4G2PF3G3PF2G4VSSG6VSSG7VSSG8VSSG9VSSG10VSSG12VSSG13PC7G14PC6G15PG8H1PF6H2PF8H3PF5H4VDDH6VSSH7VSSH8VSSR15PB13R14VCAPR13VDDSMPSR12VLXSMPSR11PE12R10PE10R9PE7R8PG0R7PF14R6PF11R5PB0R4PA7R3PA5R2PH2R1PH4P15PH11P14PH7P13PH6P12VSSSMPSP11PE13P10PE11P9PE8P8PG1P7PF13P6PB2P5PA6P4PC5P3PH3P2PA0P1PH5N15PB14N14PH10N13PH8N12PB11N11PE15N10PE14N9PE9N8PF15N7PF12N6PB1N5PA3N4PC4N3PC3N2VREF-N1VREF+M15PD8M14PB15M13PH12M12PH9M11VDDM10PB10M9VSSM8VDDM7VSSM6VDDM5PA4M4VSSM3PA2M2VSSAM1VDDAL15PD13L14PD11L13PD9L12PB12L4VDDL3PA1L2PC1L1PC0K15PG2K14PD12K13PD14K12PD10K10VSSK9VSSK8VSSK7VSSK6VSSK4PC2K3NRSTK2PF7K1VSSJ15PG4J14PG6J13PD15J12VDDJ10VSSJ9VSSJ8VSSJ7VSSJ6VSSJ4PF10J3PF9J2PH1-OSC_OUTJ1PH0-OSC_INH15PG5H14PG3H13PG7H12VSSH10VSSH9VSSGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8134.6129.5124.5119.4114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3-119.4-124.5-129.5-134.6mm
2. 2D FOOTPRINT
A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15E1E2E3E4E12E13E14E15F1F2F3F4F6F7F8F9F10F12F13F14F15G1G2G3G4G6G7G8G9G10G12G13G14G15H1H2H3H4H6H7H8H9H10H12H13H14H15J1J2J3J4J6J7J8J9J10J12J13J14J15K1K2K3K4K6K7K8K9K10K12K13K14K15L1L2L3L4L12L13L14L15M1M2M3M4M5M6M7M8M9M10M11M12M13M14M15N1N2N3N4N5N6N7N8N9N10N11N12N13N14N15P1P2P3P4P5P6P7P8P9P10P11P12P13P14P15R1R2R3R4R5R6R7R8R9R10R11R12R13R14R15E=10.00mm · Pitch e=0.65mmD=10.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (201/201)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PI7I/OMultiplexed I/O & Peripheral Pin PI7 (General)
A2PI5I/OMultiplexed I/O & Peripheral Pin PI5 (General)
A3VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
A4PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
A5BOOT0IInput-Only Pin BOOT0 (General)
A6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
A7PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
A8PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
A9PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
A10PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
A11PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
A12PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
A13PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
A14PI3I/OMultiplexed I/O & Peripheral Pin PI3 (General)
A15PI1I/OMultiplexed I/O & Peripheral Pin PI1 (General)
B1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
B2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
B3PI4I/OMultiplexed I/O & Peripheral Pin PI4 (General)
B4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
B5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
B6PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
B7PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
B8PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
B9PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
B10PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
B11PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
B12PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
B13PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
B14PI2I/OMultiplexed I/O & Peripheral Pin PI2 (General)
B15PH13I/OMultiplexed I/O & Peripheral Pin PH13 (General)
C1VSSGNDGround Reference Pin (VSS)
C2PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
C3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
C4PI6I/OMultiplexed I/O & Peripheral Pin PI6 (General)
C5PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
C6PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
C7PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
C8PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
C9PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
C10PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
C11PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
C12PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
C13PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
C14PH15I/OMultiplexed I/O & Peripheral Pin PH15 (General)
C15PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
D1PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
D2PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
D3PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
D4PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
D5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D6VSSGNDGround Reference Pin (VSS)
D7VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
D8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D9VSSGNDGround Reference Pin (VSS)
D10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D11VSSGNDGround Reference Pin (VSS)
D12PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
D13PH14I/OMultiplexed I/O & Peripheral Pin PH14 (General)
D14VSSGNDGround Reference Pin (VSS)
D15PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
E1PI9I/OMultiplexed I/O & Peripheral Pin PI9 (General)
E2PI8I/OMultiplexed I/O & Peripheral Pin PI8 (General)
E3PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
E4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E12VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E13PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
E14PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
E15PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
F1PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
F2PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
F3PI11I/OMultiplexed I/O & Peripheral Pin PI11 (General)
F4PI10I/OMultiplexed I/O & Peripheral Pin PI10 (General)
F6VSSGNDGround Reference Pin (VSS)
F7VSSGNDGround Reference Pin (VSS)
F8VSSGNDGround Reference Pin (VSS)
F9VSSGNDGround Reference Pin (VSS)
F10VSSGNDGround Reference Pin (VSS)
F12VDD33USBPowerPower Supply Input (VDD33USB — 3.3V VDD (Max 4.0V))
F13PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
F14PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
F15PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
G1PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
G2PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
G3PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
G4VSSGNDGround Reference Pin (VSS)
G6VSSGNDGround Reference Pin (VSS)
G7VSSGNDGround Reference Pin (VSS)
G8VSSGNDGround Reference Pin (VSS)
G9VSSGNDGround Reference Pin (VSS)
G10VSSGNDGround Reference Pin (VSS)
G12VSSGNDGround Reference Pin (VSS)
G13PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
G14PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
G15PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
H1PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
H2PF8I/OMultiplexed I/O & Peripheral Pin PF8 (General)
H3PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
H4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H6VSSGNDGround Reference Pin (VSS)
H7VSSGNDGround Reference Pin (VSS)
H8VSSGNDGround Reference Pin (VSS)
H9VSSGNDGround Reference Pin (VSS)
H10VSSGNDGround Reference Pin (VSS)
H12VSSGNDGround Reference Pin (VSS)
H13PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
H14PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
H15PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
J1PH0-OSC_INI/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK)
J2PH1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK)
J3PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
J4PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
J6VSSGNDGround Reference Pin (VSS)
J7VSSGNDGround Reference Pin (VSS)
J8VSSGNDGround Reference Pin (VSS)
J9VSSGNDGround Reference Pin (VSS)
J10VSSGNDGround Reference Pin (VSS)
J12VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J13PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
J14PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
J15PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
K1VSSGNDGround Reference Pin (VSS)
K2PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
K3NRSTISystem Enable & Hardware Reset (NRST)
K4PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
K6VSSGNDGround Reference Pin (VSS)
K7VSSGNDGround Reference Pin (VSS)
K8VSSGNDGround Reference Pin (VSS)
K9VSSGNDGround Reference Pin (VSS)
K10VSSGNDGround Reference Pin (VSS)
K12PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
K13PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
K14PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
K15PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
L1PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
L2PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
L3PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
L4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L12PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
L13PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
L14PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
L15PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
M1VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
M2VSSAGNDGround Reference Pin (VSSA)
M3PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
M4VSSGNDGround Reference Pin (VSS)
M5PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
M6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M7VSSGNDGround Reference Pin (VSS)
M8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M9VSSGNDGround Reference Pin (VSS)
M10PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
M11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M12PH9I/OMultiplexed I/O & Peripheral Pin PH9 (General)
M13PH12I/OMultiplexed I/O & Peripheral Pin PH12 (General)
M14PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
M15PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
N1VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
N2VREF-AnalogMultiplexed I/O & Peripheral Pin VREF- (General)
N3PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
N4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
N5PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
N6PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
N7PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
N8PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
N9PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
N10PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
N11PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
N12PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
N13PH8I/OMultiplexed I/O & Peripheral Pin PH8 (General)
N14PH10I/OMultiplexed I/O & Peripheral Pin PH10 (General)
N15PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
P1PH5I/OMultiplexed I/O & Peripheral Pin PH5 (General)
P2PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
P3PH3I/OMultiplexed I/O & Peripheral Pin PH3 (General)
P4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
P5PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
P6PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
P7PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
P8PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
P9PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
P10PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
P11PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
P12VSSSMPSGNDGround Reference Pin (VSSSMPS)
P13PH6I/OMultiplexed I/O & Peripheral Pin PH6 (General)
P14PH7I/OMultiplexed I/O & Peripheral Pin PH7 (General)
P15PH11I/OMultiplexed I/O & Peripheral Pin PH11 (General)
R1PH4I/OMultiplexed I/O & Peripheral Pin PH4 (General)
R2PH2I/OMultiplexed I/O & Peripheral Pin PH2 (General)
R3PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
R4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
R5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
R6PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
R7PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
R8PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
R9PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
R10PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
R11PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
R12VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
R13VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
R14VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
R15PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
PIN A1 PI7
I/O
Multiplexed I/O & Peripheral Pin PI7 (General)
Design note: Signal terminal PI7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32H563IIK3Q (ST · UFBGA-201(10x10))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32H563IIK3Q (UFBGA-201(10x10)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32H563IIK3Q (UFBGA-201(10x10)) - 2. Standard Pinout (Top View)
True package pinout (201 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32H563IIK3Q (UFBGA-201(10x10)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32H563IIK3Q (UFBGA-201(10x10)) - 4. Package Dimensions (D×E×A)
UFBGA-201(10x10) · 10.00×10.00mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32H563IIK3Q (UFBGA-201(10x10)) - 5. Recommended Land Pattern
IPC-7351B Footprint (201 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32H563IIK3Q (UFBGA-201(10x10)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for STM32H562 / STM32H563
P1 · p01_fig01881×845px
STM32H563IIK3Q (UFBGA-201(10x10)) — Arm® Cortex®-M33 32-bit MCU + TrustZone® + FPU, 375 DMIPS,
Arm® Cortex®-M33 32-bit MCU + TrustZone® + FPU, 375 DMIPS,
P64 · p64_fig011546×998px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 5. LQFP64 pinout VDD 61 1 3 4
Figure 5. LQFP64 pinout VDD 61 1 3 4
P65 · p65_fig011546×1111px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 6. VFQFPN68 pinout VDD 64
Figure 6. VFQFPN68 pinout VDD 64
P65 · p65_fig021546×1287px
STM32H563IIK3Q (UFBGA-201(10x10)) — 16
16
P66 · p66_fig011549×1326px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 8. LQFP100 pinout PB9 92
Figure 8. LQFP100 pinout PB9 92
P66 · p66_fig01P66
STM32H563IIK3Q (UFBGA-201(10x10)) — Datasheet Page 66 (p66_fig01)
Datasheet Page 66 (p66_fig01)
P125 · p125_fig011656×2111px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 21. Power supply scheme with SMPS SMPS disabled
Figure 21. Power supply scheme with SMPS SMPS disabled
P125 · p125_fig01P125
STM32H563IIK3Q (UFBGA-201(10x10)) — Datasheet Page 125 (p125_fig01)
Datasheet Page 125 (p125_fig01)
P126 · p126_fig011752×2135px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 22. Power supply scheme with LDO
Figure 22. Power supply scheme with LDO
P153 · p153_fig011546×519px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 30. Typical application with an 8 MHz crystal
Figure 30. Typical application with an 8 MHz crystal
P211 · p211_fig011550×999px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 57. ADC accuracy characteristics
Figure 57. ADC accuracy characteristics
P211 · p211_fig021548×726px
STM32H563IIK3Q (UFBGA-201(10x10)) — Figure 58. Typical connection diagram when using the ADC with FT/TT pins
Figure 58. Typical connection diagram when using the ADC with FT/TT pins
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (STM32H563IIK3Q)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32H563IIK3Q (UFBGA-201(10x10)) is a 201-pin embedded microcontroller unit (mcu) featuring a 10.00 × 10.00 × 0.58 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
250 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 0.58 mm (A1=0.20 mm)
Package family: BGA (UFBGA-201(10x10))
Pin Count & Lead PitchN / e
201 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol201 auto-grouped pins
OK
IPC-7351B Land Pattern201 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-201(10x10))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.58mm · e=0.65mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
201P / 201Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-201(10x10)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H563IIK3Q (UFBGA-201(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H563IIK3Q (UFBGA-201(10x10))?

Manufactured by ST, the STM32H563IIK3Q is housed in a UFBGA-201(10x10) package with 201 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (PI7: Multiplexed I/O & Peripheral Pin PI7 (General)), A2 (PI5: Multiplexed I/O & Peripheral Pin PI5 (General)), A3 (VCAP: Multiplexed I/O & Peripheral Pin VCAP (General)), A4 (PB9: Multiplexed I/O & Peripheral Pin PB9 (General)), A5 (BOOT0: Input-Only Pin BOOT0 (General)), A6 (PB5: Multiplexed I/O & Peripheral Pin PB5 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32H563IIK3Q?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H563IIK3Q (UFBGA-201(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.65 mm, and 201 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H563IIK3Q?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H563IIK3Q (ST, UFBGA-201(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (201 pins) & STM32H562 / STM32H563 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PI7Digital_IOSignal terminal PI7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General.
A2PI5Digital_IOSignal terminal PI5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI5. Supported peripheral buses: General.
A3VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
A4PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
A5BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
A6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
A7PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General.
A8PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: General.
A9PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
A10PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
A11PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
A12PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
A13PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
A14PI3Digital_IOSignal terminal PI3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI3. Supported peripheral buses: General.
A15PI1Digital_IOSignal terminal PI1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI1. Supported peripheral buses: General.
B1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
B3PI4Digital_IOSignal terminal PI4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General.
B4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
B5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B6PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
B7PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
B8PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General.
B9PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General.
B10PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
B11PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
B12PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
B13PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
B14PI2Digital_IOSignal terminal PI2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI2. Supported peripheral buses: General.
B15PH13Digital_IOSignal terminal PH13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: General.
C1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C2PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
C3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
C4PI6Digital_IOSignal terminal PI6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: General.
C5PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
C6PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
C7PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
C8PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: General.
C9PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General.
C10PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
C11PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
C12PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
C13PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
C14PH15Digital_IOSignal terminal PH15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH15. Supported peripheral buses: General.
C15PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
D1PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
D2PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
D3PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
D4PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
D5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D7VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D8VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D9VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D11VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D12PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
D13PH14Digital_IOSignal terminal PH14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: General.
D14VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D15PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
E1PI9Digital_IOSignal terminal PI9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI9. Supported peripheral buses: General.
E2PI8Digital_IOSignal terminal PI8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI8. Supported peripheral buses: General.
E3PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
E4VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).